static void _decode_opc(DisasContext * ctx)

{

    /* This code tries to make movcal emulation sufficiently

       accurate for Linux purposes.  This instruction writes

       memory, and prior to that, always allocates a cache line.

       It is used in two contexts:

       - in memcpy, where data is copied in blocks, the first write

       of to a block uses movca.l for performance.

       - in arch/sh/mm/cache-sh4.c, movcal.l + ocbi combination is used

       to flush the cache. Here, the data written by movcal.l is never

       written to memory, and the data written is just bogus.

       To simulate this, we simulate movcal.l, we store the value to memory,

       but we also remember the previous content. If we see ocbi, we check

       if movcal.l for that address was done previously. If so, the write should

       not have hit the memory, so we restore the previous content.

       When we see an instruction that is neither movca.l

       nor ocbi, the previous content is discarded.

       To optimize, we only try to flush stores when we're at the start of

       TB, or if we already saw movca.l in this TB and did not flush stores

       yet.  */

    if (ctx->has_movcal)

	{

	  int opcode = ctx->opcode & 0xf0ff;

	  if (opcode != 0x0093 /* ocbi */

	      && opcode != 0x00c3 /* movca.l */)

	      {

		  gen_helper_discard_movcal_backup ();

		  ctx->has_movcal = 0;

	      }

	}

#if 0

    fprintf(stderr, "Translating opcode 0x%04x\n", ctx->opcode);

#endif

    switch (ctx->opcode) {

    case 0x0019:		/* div0u */

	tcg_gen_andi_i32(cpu_sr, cpu_sr, ~(SR_M | SR_Q | SR_T));

	return;

    case 0x000b:		/* rts */

	CHECK_NOT_DELAY_SLOT

	tcg_gen_mov_i32(cpu_delayed_pc, cpu_pr);

	ctx->flags |= DELAY_SLOT;

	ctx->delayed_pc = (uint32_t) - 1;

	return;

    case 0x0028:		/* clrmac */

	tcg_gen_movi_i32(cpu_mach, 0);

	tcg_gen_movi_i32(cpu_macl, 0);

	return;

    case 0x0048:		/* clrs */

	tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_S);

	return;

    case 0x0008:		/* clrt */

	gen_clr_t();

	return;

    case 0x0038:		/* ldtlb */

	CHECK_PRIVILEGED

	gen_helper_ldtlb();

	return;

    case 0x002b:		/* rte */

	CHECK_PRIVILEGED

	CHECK_NOT_DELAY_SLOT

	tcg_gen_mov_i32(cpu_sr, cpu_ssr);

	tcg_gen_mov_i32(cpu_delayed_pc, cpu_spc);

	ctx->flags |= DELAY_SLOT;

	ctx->delayed_pc = (uint32_t) - 1;

	return;

    case 0x0058:		/* sets */

	tcg_gen_ori_i32(cpu_sr, cpu_sr, SR_S);

	return;

    case 0x0018:		/* sett */

	gen_set_t();

	return;

    case 0xfbfd:		/* frchg */

	tcg_gen_xori_i32(cpu_fpscr, cpu_fpscr, FPSCR_FR);

	ctx->bstate = BS_STOP;

	return;

    case 0xf3fd:		/* fschg */

	tcg_gen_xori_i32(cpu_fpscr, cpu_fpscr, FPSCR_SZ);

	ctx->bstate = BS_STOP;

	return;

    case 0x0009:		/* nop */

	return;

    case 0x001b:		/* sleep */

	CHECK_PRIVILEGED

	gen_helper_sleep(tcg_const_i32(ctx->pc + 2));

	return;

    }

    switch (ctx->opcode & 0xf000) {

    case 0x1000:		/* mov.l Rm,@(disp,Rn) */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, REG(B11_8), B3_0 * 4);

	    tcg_gen_qemu_st32(REG(B7_4), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x5000:		/* mov.l @(disp,Rm),Rn */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 4);

	    tcg_gen_qemu_ld32s(REG(B11_8), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0xe000:		/* mov #imm,Rn */

	tcg_gen_movi_i32(REG(B11_8), B7_0s);

	return;

    case 0x9000:		/* mov.w @(disp,PC),Rn */

	{

	    TCGv addr = tcg_const_i32(ctx->pc + 4 + B7_0 * 2);

	    tcg_gen_qemu_ld16s(REG(B11_8), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0xd000:		/* mov.l @(disp,PC),Rn */

	{

	    TCGv addr = tcg_const_i32((ctx->pc + 4 + B7_0 * 4) & ~3);

	    tcg_gen_qemu_ld32s(REG(B11_8), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x7000:		/* add #imm,Rn */

	tcg_gen_addi_i32(REG(B11_8), REG(B11_8), B7_0s);

	return;

    case 0xa000:		/* bra disp */

	CHECK_NOT_DELAY_SLOT

	ctx->delayed_pc = ctx->pc + 4 + B11_0s * 2;

	tcg_gen_movi_i32(cpu_delayed_pc, ctx->delayed_pc);

	ctx->flags |= DELAY_SLOT;

	return;

    case 0xb000:		/* bsr disp */

	CHECK_NOT_DELAY_SLOT

	tcg_gen_movi_i32(cpu_pr, ctx->pc + 4);

	ctx->delayed_pc = ctx->pc + 4 + B11_0s * 2;

	tcg_gen_movi_i32(cpu_delayed_pc, ctx->delayed_pc);

	ctx->flags |= DELAY_SLOT;

	return;

    }

    switch (ctx->opcode & 0xf00f) {

    case 0x6003:		/* mov Rm,Rn */

	tcg_gen_mov_i32(REG(B11_8), REG(B7_4));

	return;

    case 0x2000:		/* mov.b Rm,@Rn */

	tcg_gen_qemu_st8(REG(B7_4), REG(B11_8), ctx->memidx);

	return;

    case 0x2001:		/* mov.w Rm,@Rn */

	tcg_gen_qemu_st16(REG(B7_4), REG(B11_8), ctx->memidx);

	return;

    case 0x2002:		/* mov.l Rm,@Rn */

	tcg_gen_qemu_st32(REG(B7_4), REG(B11_8), ctx->memidx);

	return;

    case 0x6000:		/* mov.b @Rm,Rn */

	tcg_gen_qemu_ld8s(REG(B11_8), REG(B7_4), ctx->memidx);

	return;

    case 0x6001:		/* mov.w @Rm,Rn */

	tcg_gen_qemu_ld16s(REG(B11_8), REG(B7_4), ctx->memidx);

	return;

    case 0x6002:		/* mov.l @Rm,Rn */

	tcg_gen_qemu_ld32s(REG(B11_8), REG(B7_4), ctx->memidx);

	return;

    case 0x2004:		/* mov.b Rm,@-Rn */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_subi_i32(addr, REG(B11_8), 1);

	    tcg_gen_qemu_st8(REG(B7_4), addr, ctx->memidx);	/* might cause re-execution */

	    tcg_gen_mov_i32(REG(B11_8), addr);			/* modify register status */

	    tcg_temp_free(addr);

	}

	return;

    case 0x2005:		/* mov.w Rm,@-Rn */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_subi_i32(addr, REG(B11_8), 2);

	    tcg_gen_qemu_st16(REG(B7_4), addr, ctx->memidx);

	    tcg_gen_mov_i32(REG(B11_8), addr);

	    tcg_temp_free(addr);

	}

	return;

    case 0x2006:		/* mov.l Rm,@-Rn */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_subi_i32(addr, REG(B11_8), 4);

	    tcg_gen_qemu_st32(REG(B7_4), addr, ctx->memidx);

	    tcg_gen_mov_i32(REG(B11_8), addr);

	}

	return;

    case 0x6004:		/* mov.b @Rm+,Rn */

	tcg_gen_qemu_ld8s(REG(B11_8), REG(B7_4), ctx->memidx);

	if ( B11_8 != B7_4 )

		tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 1);

	return;

    case 0x6005:		/* mov.w @Rm+,Rn */

	tcg_gen_qemu_ld16s(REG(B11_8), REG(B7_4), ctx->memidx);

	if ( B11_8 != B7_4 )

		tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 2);

	return;

    case 0x6006:		/* mov.l @Rm+,Rn */

	tcg_gen_qemu_ld32s(REG(B11_8), REG(B7_4), ctx->memidx);

	if ( B11_8 != B7_4 )

		tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 4);

	return;

    case 0x0004:		/* mov.b Rm,@(R0,Rn) */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(B11_8), REG(0));

	    tcg_gen_qemu_st8(REG(B7_4), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x0005:		/* mov.w Rm,@(R0,Rn) */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(B11_8), REG(0));

	    tcg_gen_qemu_st16(REG(B7_4), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x0006:		/* mov.l Rm,@(R0,Rn) */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(B11_8), REG(0));

	    tcg_gen_qemu_st32(REG(B7_4), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x000c:		/* mov.b @(R0,Rm),Rn */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(B7_4), REG(0));

	    tcg_gen_qemu_ld8s(REG(B11_8), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x000d:		/* mov.w @(R0,Rm),Rn */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(B7_4), REG(0));

	    tcg_gen_qemu_ld16s(REG(B11_8), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x000e:		/* mov.l @(R0,Rm),Rn */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(B7_4), REG(0));

	    tcg_gen_qemu_ld32s(REG(B11_8), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x6008:		/* swap.b Rm,Rn */

	{

	    TCGv high, low;

	    high = tcg_temp_new();

	    tcg_gen_andi_i32(high, REG(B7_4), 0xffff0000);

	    low = tcg_temp_new();

	    tcg_gen_ext16u_i32(low, REG(B7_4));

	    tcg_gen_bswap16_i32(low, low);

	    tcg_gen_or_i32(REG(B11_8), high, low);

	    tcg_temp_free(low);

	    tcg_temp_free(high);

	}

	return;

    case 0x6009:		/* swap.w Rm,Rn */

	{

	    TCGv high, low;

	    high = tcg_temp_new();

	    tcg_gen_shli_i32(high, REG(B7_4), 16);

	    low = tcg_temp_new();

	    tcg_gen_shri_i32(low, REG(B7_4), 16);

	    tcg_gen_ext16u_i32(low, low);

	    tcg_gen_or_i32(REG(B11_8), high, low);

	    tcg_temp_free(low);

	    tcg_temp_free(high);

	}

	return;

    case 0x200d:		/* xtrct Rm,Rn */

	{

	    TCGv high, low;

	    high = tcg_temp_new();

	    tcg_gen_shli_i32(high, REG(B7_4), 16);

	    low = tcg_temp_new();

	    tcg_gen_shri_i32(low, REG(B11_8), 16);

	    tcg_gen_ext16u_i32(low, low);

	    tcg_gen_or_i32(REG(B11_8), high, low);

	    tcg_temp_free(low);

	    tcg_temp_free(high);

	}

	return;

    case 0x300c:		/* add Rm,Rn */

	tcg_gen_add_i32(REG(B11_8), REG(B11_8), REG(B7_4));

	return;

    case 0x300e:		/* addc Rm,Rn */

	gen_helper_addc(REG(B11_8), REG(B7_4), REG(B11_8));

	return;

    case 0x300f:		/* addv Rm,Rn */

	gen_helper_addv(REG(B11_8), REG(B7_4), REG(B11_8));

	return;

    case 0x2009:		/* and Rm,Rn */

	tcg_gen_and_i32(REG(B11_8), REG(B11_8), REG(B7_4));

	return;

    case 0x3000:		/* cmp/eq Rm,Rn */

	gen_cmp(TCG_COND_EQ, REG(B7_4), REG(B11_8));

	return;

    case 0x3003:		/* cmp/ge Rm,Rn */

	gen_cmp(TCG_COND_GE, REG(B7_4), REG(B11_8));

	return;

    case 0x3007:		/* cmp/gt Rm,Rn */

	gen_cmp(TCG_COND_GT, REG(B7_4), REG(B11_8));

	return;

    case 0x3006:		/* cmp/hi Rm,Rn */

	gen_cmp(TCG_COND_GTU, REG(B7_4), REG(B11_8));

	return;

    case 0x3002:		/* cmp/hs Rm,Rn */

	gen_cmp(TCG_COND_GEU, REG(B7_4), REG(B11_8));

	return;

    case 0x200c:		/* cmp/str Rm,Rn */

	{

	    int label1 = gen_new_label();

	    int label2 = gen_new_label();

	    TCGv cmp1 = tcg_temp_local_new();

	    TCGv cmp2 = tcg_temp_local_new();

	    tcg_gen_xor_i32(cmp1, REG(B7_4), REG(B11_8));

	    tcg_gen_andi_i32(cmp2, cmp1, 0xff000000);

	    tcg_gen_brcondi_i32(TCG_COND_EQ, cmp2, 0, label1);

	    tcg_gen_andi_i32(cmp2, cmp1, 0x00ff0000);

	    tcg_gen_brcondi_i32(TCG_COND_EQ, cmp2, 0, label1);

	    tcg_gen_andi_i32(cmp2, cmp1, 0x0000ff00);

	    tcg_gen_brcondi_i32(TCG_COND_EQ, cmp2, 0, label1);

	    tcg_gen_andi_i32(cmp2, cmp1, 0x000000ff);

	    tcg_gen_brcondi_i32(TCG_COND_EQ, cmp2, 0, label1);

	    tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_T);

	    tcg_gen_br(label2);

	    gen_set_label(label1);

	    tcg_gen_ori_i32(cpu_sr, cpu_sr, SR_T);

	    gen_set_label(label2);

	    tcg_temp_free(cmp2);

	    tcg_temp_free(cmp1);

	}

	return;

    case 0x2007:		/* div0s Rm,Rn */

	{

	    gen_copy_bit_i32(cpu_sr, 8, REG(B11_8), 31);	/* SR_Q */

	    gen_copy_bit_i32(cpu_sr, 9, REG(B7_4), 31);		/* SR_M */

	    TCGv val = tcg_temp_new();

	    tcg_gen_xor_i32(val, REG(B7_4), REG(B11_8));

	    gen_copy_bit_i32(cpu_sr, 0, val, 31);		/* SR_T */

	    tcg_temp_free(val);

	}

	return;

    case 0x3004:		/* div1 Rm,Rn */

	gen_helper_div1(REG(B11_8), REG(B7_4), REG(B11_8));

	return;

    case 0x300d:		/* dmuls.l Rm,Rn */

	{

	    TCGv_i64 tmp1 = tcg_temp_new_i64();

	    TCGv_i64 tmp2 = tcg_temp_new_i64();

	    tcg_gen_ext_i32_i64(tmp1, REG(B7_4));

	    tcg_gen_ext_i32_i64(tmp2, REG(B11_8));

	    tcg_gen_mul_i64(tmp1, tmp1, tmp2);

	    tcg_gen_trunc_i64_i32(cpu_macl, tmp1);

	    tcg_gen_shri_i64(tmp1, tmp1, 32);

	    tcg_gen_trunc_i64_i32(cpu_mach, tmp1);

	    tcg_temp_free_i64(tmp2);

	    tcg_temp_free_i64(tmp1);

	}

	return;

    case 0x3005:		/* dmulu.l Rm,Rn */

	{

	    TCGv_i64 tmp1 = tcg_temp_new_i64();

	    TCGv_i64 tmp2 = tcg_temp_new_i64();

	    tcg_gen_extu_i32_i64(tmp1, REG(B7_4));

	    tcg_gen_extu_i32_i64(tmp2, REG(B11_8));

	    tcg_gen_mul_i64(tmp1, tmp1, tmp2);

	    tcg_gen_trunc_i64_i32(cpu_macl, tmp1);

	    tcg_gen_shri_i64(tmp1, tmp1, 32);

	    tcg_gen_trunc_i64_i32(cpu_mach, tmp1);

	    tcg_temp_free_i64(tmp2);

	    tcg_temp_free_i64(tmp1);

	}

	return;

    case 0x600e:		/* exts.b Rm,Rn */

	tcg_gen_ext8s_i32(REG(B11_8), REG(B7_4));

	return;

    case 0x600f:		/* exts.w Rm,Rn */

	tcg_gen_ext16s_i32(REG(B11_8), REG(B7_4));

	return;

    case 0x600c:		/* extu.b Rm,Rn */

	tcg_gen_ext8u_i32(REG(B11_8), REG(B7_4));

	return;

    case 0x600d:		/* extu.w Rm,Rn */

	tcg_gen_ext16u_i32(REG(B11_8), REG(B7_4));

	return;

    case 0x000f:		/* mac.l @Rm+,@Rn+ */

	{

	    TCGv arg0, arg1;

	    arg0 = tcg_temp_new();

	    tcg_gen_qemu_ld32s(arg0, REG(B7_4), ctx->memidx);

	    arg1 = tcg_temp_new();

	    tcg_gen_qemu_ld32s(arg1, REG(B11_8), ctx->memidx);

	    gen_helper_macl(arg0, arg1);

	    tcg_temp_free(arg1);

	    tcg_temp_free(arg0);

	    tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 4);

	    tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);

	}

	return;

    case 0x400f:		/* mac.w @Rm+,@Rn+ */

	{

	    TCGv arg0, arg1;

	    arg0 = tcg_temp_new();

	    tcg_gen_qemu_ld32s(arg0, REG(B7_4), ctx->memidx);

	    arg1 = tcg_temp_new();

	    tcg_gen_qemu_ld32s(arg1, REG(B11_8), ctx->memidx);

	    gen_helper_macw(arg0, arg1);

	    tcg_temp_free(arg1);

	    tcg_temp_free(arg0);

	    tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 2);

	    tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 2);

	}

	return;

    case 0x0007:		/* mul.l Rm,Rn */

	tcg_gen_mul_i32(cpu_macl, REG(B7_4), REG(B11_8));

	return;

    case 0x200f:		/* muls.w Rm,Rn */

	{

	    TCGv arg0, arg1;

	    arg0 = tcg_temp_new();

	    tcg_gen_ext16s_i32(arg0, REG(B7_4));

	    arg1 = tcg_temp_new();

	    tcg_gen_ext16s_i32(arg1, REG(B11_8));

	    tcg_gen_mul_i32(cpu_macl, arg0, arg1);

	    tcg_temp_free(arg1);

	    tcg_temp_free(arg0);

	}

	return;

    case 0x200e:		/* mulu.w Rm,Rn */

	{

	    TCGv arg0, arg1;

	    arg0 = tcg_temp_new();

	    tcg_gen_ext16u_i32(arg0, REG(B7_4));

	    arg1 = tcg_temp_new();

	    tcg_gen_ext16u_i32(arg1, REG(B11_8));

	    tcg_gen_mul_i32(cpu_macl, arg0, arg1);

	    tcg_temp_free(arg1);

	    tcg_temp_free(arg0);

	}

	return;

    case 0x600b:		/* neg Rm,Rn */

	tcg_gen_neg_i32(REG(B11_8), REG(B7_4));

	return;

    case 0x600a:		/* negc Rm,Rn */

	gen_helper_negc(REG(B11_8), REG(B7_4));

	return;

    case 0x6007:		/* not Rm,Rn */

	tcg_gen_not_i32(REG(B11_8), REG(B7_4));

	return;

    case 0x200b:		/* or Rm,Rn */

	tcg_gen_or_i32(REG(B11_8), REG(B11_8), REG(B7_4));

	return;

    case 0x400c:		/* shad Rm,Rn */

	{

	    int label1 = gen_new_label();

	    int label2 = gen_new_label();

	    int label3 = gen_new_label();

	    int label4 = gen_new_label();

	    TCGv shift;

	    tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1);

	    /* Rm positive, shift to the left */

            shift = tcg_temp_new();

	    tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);

	    tcg_gen_shl_i32(REG(B11_8), REG(B11_8), shift);

	    tcg_temp_free(shift);

	    tcg_gen_br(label4);

	    /* Rm negative, shift to the right */

	    gen_set_label(label1);

            shift = tcg_temp_new();

	    tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);

	    tcg_gen_brcondi_i32(TCG_COND_EQ, shift, 0, label2);

	    tcg_gen_not_i32(shift, REG(B7_4));

	    tcg_gen_andi_i32(shift, shift, 0x1f);

	    tcg_gen_addi_i32(shift, shift, 1);

	    tcg_gen_sar_i32(REG(B11_8), REG(B11_8), shift);

	    tcg_temp_free(shift);

	    tcg_gen_br(label4);

	    /* Rm = -32 */

	    gen_set_label(label2);

	    tcg_gen_brcondi_i32(TCG_COND_LT, REG(B11_8), 0, label3);

	    tcg_gen_movi_i32(REG(B11_8), 0);

	    tcg_gen_br(label4);

	    gen_set_label(label3);

	    tcg_gen_movi_i32(REG(B11_8), 0xffffffff);

	    gen_set_label(label4);

	}

	return;

    case 0x400d:		/* shld Rm,Rn */

	{

	    int label1 = gen_new_label();

	    int label2 = gen_new_label();

	    int label3 = gen_new_label();

	    TCGv shift;

	    tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1);

	    /* Rm positive, shift to the left */

            shift = tcg_temp_new();

	    tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);

	    tcg_gen_shl_i32(REG(B11_8), REG(B11_8), shift);

	    tcg_temp_free(shift);

	    tcg_gen_br(label3);

	    /* Rm negative, shift to the right */

	    gen_set_label(label1);

            shift = tcg_temp_new();

	    tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);

	    tcg_gen_brcondi_i32(TCG_COND_EQ, shift, 0, label2);

	    tcg_gen_not_i32(shift, REG(B7_4));

	    tcg_gen_andi_i32(shift, shift, 0x1f);

	    tcg_gen_addi_i32(shift, shift, 1);

	    tcg_gen_shr_i32(REG(B11_8), REG(B11_8), shift);

	    tcg_temp_free(shift);

	    tcg_gen_br(label3);

	    /* Rm = -32 */

	    gen_set_label(label2);

	    tcg_gen_movi_i32(REG(B11_8), 0);

	    gen_set_label(label3);

	}

	return;

    case 0x3008:		/* sub Rm,Rn */

	tcg_gen_sub_i32(REG(B11_8), REG(B11_8), REG(B7_4));

	return;

    case 0x300a:		/* subc Rm,Rn */

	gen_helper_subc(REG(B11_8), REG(B7_4), REG(B11_8));

	return;

    case 0x300b:		/* subv Rm,Rn */

	gen_helper_subv(REG(B11_8), REG(B7_4), REG(B11_8));

	return;

    case 0x2008:		/* tst Rm,Rn */

	{

	    TCGv val = tcg_temp_new();

	    tcg_gen_and_i32(val, REG(B7_4), REG(B11_8));

	    gen_cmp_imm(TCG_COND_EQ, val, 0);

	    tcg_temp_free(val);

	}

	return;

    case 0x200a:		/* xor Rm,Rn */

	tcg_gen_xor_i32(REG(B11_8), REG(B11_8), REG(B7_4));

	return;

    case 0xf00c: /* fmov {F,D,X}Rm,{F,D,X}Rn - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	if (ctx->fpscr & FPSCR_SZ) {

	    TCGv_i64 fp = tcg_temp_new_i64();

	    gen_load_fpr64(fp, XREG(B7_4));

	    gen_store_fpr64(fp, XREG(B11_8));

	    tcg_temp_free_i64(fp);

	} else {

	    tcg_gen_mov_i32(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B7_4)]);

	}

	return;

    case 0xf00a: /* fmov {F,D,X}Rm,@Rn - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	if (ctx->fpscr & FPSCR_SZ) {

	    TCGv addr_hi = tcg_temp_new();

	    int fr = XREG(B7_4);

	    tcg_gen_addi_i32(addr_hi, REG(B11_8), 4);

	    tcg_gen_qemu_st32(cpu_fregs[fr  ], REG(B11_8), ctx->memidx);

	    tcg_gen_qemu_st32(cpu_fregs[fr+1], addr_hi,	   ctx->memidx);

	    tcg_temp_free(addr_hi);

	} else {

	    tcg_gen_qemu_st32(cpu_fregs[FREG(B7_4)], REG(B11_8), ctx->memidx);

	}

	return;

    case 0xf008: /* fmov @Rm,{F,D,X}Rn - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	if (ctx->fpscr & FPSCR_SZ) {

	    TCGv addr_hi = tcg_temp_new();

	    int fr = XREG(B11_8);

	    tcg_gen_addi_i32(addr_hi, REG(B7_4), 4);

	    tcg_gen_qemu_ld32u(cpu_fregs[fr  ], REG(B7_4), ctx->memidx);

	    tcg_gen_qemu_ld32u(cpu_fregs[fr+1], addr_hi,   ctx->memidx);

	    tcg_temp_free(addr_hi);

	} else {

	    tcg_gen_qemu_ld32u(cpu_fregs[FREG(B11_8)], REG(B7_4), ctx->memidx);

	}

	return;

    case 0xf009: /* fmov @Rm+,{F,D,X}Rn - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	if (ctx->fpscr & FPSCR_SZ) {

	    TCGv addr_hi = tcg_temp_new();

	    int fr = XREG(B11_8);

	    tcg_gen_addi_i32(addr_hi, REG(B7_4), 4);

	    tcg_gen_qemu_ld32u(cpu_fregs[fr  ], REG(B7_4), ctx->memidx);

	    tcg_gen_qemu_ld32u(cpu_fregs[fr+1], addr_hi,   ctx->memidx);

	    tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 8);

	    tcg_temp_free(addr_hi);

	} else {

	    tcg_gen_qemu_ld32u(cpu_fregs[FREG(B11_8)], REG(B7_4), ctx->memidx);

	    tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 4);

	}

	return;

    case 0xf00b: /* fmov {F,D,X}Rm,@-Rn - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	if (ctx->fpscr & FPSCR_SZ) {

	    TCGv addr = tcg_temp_new_i32();

	    int fr = XREG(B7_4);

	    tcg_gen_subi_i32(addr, REG(B11_8), 4);

	    tcg_gen_qemu_st32(cpu_fregs[fr+1], addr, ctx->memidx);

	    tcg_gen_subi_i32(addr, addr, 4);

	    tcg_gen_qemu_st32(cpu_fregs[fr  ], addr, ctx->memidx);

	    tcg_gen_mov_i32(REG(B11_8), addr);

	    tcg_temp_free(addr);

	} else {

	    TCGv addr;

	    addr = tcg_temp_new_i32();

	    tcg_gen_subi_i32(addr, REG(B11_8), 4);

	    tcg_gen_qemu_st32(cpu_fregs[FREG(B7_4)], addr, ctx->memidx);

	    tcg_gen_mov_i32(REG(B11_8), addr);

	    tcg_temp_free(addr);

	}

	return;

    case 0xf006: /* fmov @(R0,Rm),{F,D,X}Rm - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	{

	    TCGv addr = tcg_temp_new_i32();

	    tcg_gen_add_i32(addr, REG(B7_4), REG(0));

	    if (ctx->fpscr & FPSCR_SZ) {

		int fr = XREG(B11_8);

		tcg_gen_qemu_ld32u(cpu_fregs[fr	 ], addr, ctx->memidx);

		tcg_gen_addi_i32(addr, addr, 4);

		tcg_gen_qemu_ld32u(cpu_fregs[fr+1], addr, ctx->memidx);

	    } else {

		tcg_gen_qemu_ld32u(cpu_fregs[FREG(B11_8)], addr, ctx->memidx);

	    }

	    tcg_temp_free(addr);

	}

	return;

    case 0xf007: /* fmov {F,D,X}Rn,@(R0,Rn) - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(B11_8), REG(0));

	    if (ctx->fpscr & FPSCR_SZ) {

		int fr = XREG(B7_4);

		tcg_gen_qemu_ld32u(cpu_fregs[fr	 ], addr, ctx->memidx);

		tcg_gen_addi_i32(addr, addr, 4);

		tcg_gen_qemu_ld32u(cpu_fregs[fr+1], addr, ctx->memidx);

	    } else {

		tcg_gen_qemu_st32(cpu_fregs[FREG(B7_4)], addr, ctx->memidx);

	    }

	    tcg_temp_free(addr);

	}

	return;

    case 0xf000: /* fadd Rm,Rn - FPSCR: R[PR,Enable.O/U/I]/W[Cause,Flag] */

    case 0xf001: /* fsub Rm,Rn - FPSCR: R[PR,Enable.O/U/I]/W[Cause,Flag] */

    case 0xf002: /* fmul Rm,Rn - FPSCR: R[PR,Enable.O/U/I]/W[Cause,Flag] */

    case 0xf003: /* fdiv Rm,Rn - FPSCR: R[PR,Enable.O/U/I]/W[Cause,Flag] */

    case 0xf004: /* fcmp/eq Rm,Rn - FPSCR: R[PR,Enable.V]/W[Cause,Flag] */

    case 0xf005: /* fcmp/gt Rm,Rn - FPSCR: R[PR,Enable.V]/W[Cause,Flag] */

	{

	    CHECK_FPU_ENABLED

	    if (ctx->fpscr & FPSCR_PR) {

                TCGv_i64 fp0, fp1;

		if (ctx->opcode & 0x0110)

		    break; /* illegal instruction */

		fp0 = tcg_temp_new_i64();

		fp1 = tcg_temp_new_i64();

		gen_load_fpr64(fp0, DREG(B11_8));

		gen_load_fpr64(fp1, DREG(B7_4));

                switch (ctx->opcode & 0xf00f) {

                case 0xf000:		/* fadd Rm,Rn */

                    gen_helper_fadd_DT(fp0, fp0, fp1);

                    break;

                case 0xf001:		/* fsub Rm,Rn */

                    gen_helper_fsub_DT(fp0, fp0, fp1);

                    break;

                case 0xf002:		/* fmul Rm,Rn */

                    gen_helper_fmul_DT(fp0, fp0, fp1);

                    break;

                case 0xf003:		/* fdiv Rm,Rn */

                    gen_helper_fdiv_DT(fp0, fp0, fp1);

                    break;

                case 0xf004:		/* fcmp/eq Rm,Rn */

                    gen_helper_fcmp_eq_DT(fp0, fp1);

                    return;

                case 0xf005:		/* fcmp/gt Rm,Rn */

                    gen_helper_fcmp_gt_DT(fp0, fp1);

                    return;

                }

		gen_store_fpr64(fp0, DREG(B11_8));

                tcg_temp_free_i64(fp0);

                tcg_temp_free_i64(fp1);

	    } else {

                switch (ctx->opcode & 0xf00f) {

                case 0xf000:		/* fadd Rm,Rn */

                    gen_helper_fadd_FT(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B7_4)]);

                    break;

                case 0xf001:		/* fsub Rm,Rn */

                    gen_helper_fsub_FT(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B7_4)]);

                    break;

                case 0xf002:		/* fmul Rm,Rn */

                    gen_helper_fmul_FT(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B7_4)]);

                    break;

                case 0xf003:		/* fdiv Rm,Rn */

                    gen_helper_fdiv_FT(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B7_4)]);

                    break;

                case 0xf004:		/* fcmp/eq Rm,Rn */

                    gen_helper_fcmp_eq_FT(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B7_4)]);

                    return;

                case 0xf005:		/* fcmp/gt Rm,Rn */

                    gen_helper_fcmp_gt_FT(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B7_4)]);

                    return;

                }

	    }

	}

	return;

    case 0xf00e: /* fmac FR0,RM,Rn */

        {

            CHECK_FPU_ENABLED

            if (ctx->fpscr & FPSCR_PR) {

                break; /* illegal instruction */

            } else {

                gen_helper_fmac_FT(cpu_fregs[FREG(B11_8)],

                                   cpu_fregs[FREG(0)], cpu_fregs[FREG(B7_4)], cpu_fregs[FREG(B11_8)]);

                return;

            }

        }

    }

    switch (ctx->opcode & 0xff00) {

    case 0xc900:		/* and #imm,R0 */

	tcg_gen_andi_i32(REG(0), REG(0), B7_0);

	return;

    case 0xcd00:		/* and.b #imm,@(R0,GBR) */

	{

	    TCGv addr, val;

	    addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(0), cpu_gbr);

	    val = tcg_temp_new();

	    tcg_gen_qemu_ld8u(val, addr, ctx->memidx);

	    tcg_gen_andi_i32(val, val, B7_0);

	    tcg_gen_qemu_st8(val, addr, ctx->memidx);

	    tcg_temp_free(val);

	    tcg_temp_free(addr);

	}

	return;

    case 0x8b00:		/* bf label */

	CHECK_NOT_DELAY_SLOT

	    gen_conditional_jump(ctx, ctx->pc + 2,

				 ctx->pc + 4 + B7_0s * 2);

	ctx->bstate = BS_BRANCH;

	return;

    case 0x8f00:		/* bf/s label */

	CHECK_NOT_DELAY_SLOT

	gen_branch_slot(ctx->delayed_pc = ctx->pc + 4 + B7_0s * 2, 0);

	ctx->flags |= DELAY_SLOT_CONDITIONAL;

	return;

    case 0x8900:		/* bt label */

	CHECK_NOT_DELAY_SLOT

	    gen_conditional_jump(ctx, ctx->pc + 4 + B7_0s * 2,

				 ctx->pc + 2);

	ctx->bstate = BS_BRANCH;

	return;

    case 0x8d00:		/* bt/s label */

	CHECK_NOT_DELAY_SLOT

	gen_branch_slot(ctx->delayed_pc = ctx->pc + 4 + B7_0s * 2, 1);

	ctx->flags |= DELAY_SLOT_CONDITIONAL;

	return;

    case 0x8800:		/* cmp/eq #imm,R0 */

	gen_cmp_imm(TCG_COND_EQ, REG(0), B7_0s);

	return;

    case 0xc400:		/* mov.b @(disp,GBR),R0 */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, cpu_gbr, B7_0);

	    tcg_gen_qemu_ld8s(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0xc500:		/* mov.w @(disp,GBR),R0 */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, cpu_gbr, B7_0 * 2);

	    tcg_gen_qemu_ld16s(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0xc600:		/* mov.l @(disp,GBR),R0 */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, cpu_gbr, B7_0 * 4);

	    tcg_gen_qemu_ld32s(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0xc000:		/* mov.b R0,@(disp,GBR) */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, cpu_gbr, B7_0);

	    tcg_gen_qemu_st8(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0xc100:		/* mov.w R0,@(disp,GBR) */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, cpu_gbr, B7_0 * 2);

	    tcg_gen_qemu_st16(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0xc200:		/* mov.l R0,@(disp,GBR) */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, cpu_gbr, B7_0 * 4);

	    tcg_gen_qemu_st32(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x8000:		/* mov.b R0,@(disp,Rn) */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, REG(B7_4), B3_0);

	    tcg_gen_qemu_st8(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x8100:		/* mov.w R0,@(disp,Rn) */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 2);

	    tcg_gen_qemu_st16(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x8400:		/* mov.b @(disp,Rn),R0 */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, REG(B7_4), B3_0);

	    tcg_gen_qemu_ld8s(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0x8500:		/* mov.w @(disp,Rn),R0 */

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_addi_i32(addr, REG(B7_4), B3_0 * 2);

	    tcg_gen_qemu_ld16s(REG(0), addr, ctx->memidx);

	    tcg_temp_free(addr);

	}

	return;

    case 0xc700:		/* mova @(disp,PC),R0 */

	tcg_gen_movi_i32(REG(0), ((ctx->pc & 0xfffffffc) + 4 + B7_0 * 4) & ~3);

	return;

    case 0xcb00:		/* or #imm,R0 */

	tcg_gen_ori_i32(REG(0), REG(0), B7_0);

	return;

    case 0xcf00:		/* or.b #imm,@(R0,GBR) */

	{

	    TCGv addr, val;

	    addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(0), cpu_gbr);

	    val = tcg_temp_new();

	    tcg_gen_qemu_ld8u(val, addr, ctx->memidx);

	    tcg_gen_ori_i32(val, val, B7_0);

	    tcg_gen_qemu_st8(val, addr, ctx->memidx);

	    tcg_temp_free(val);

	    tcg_temp_free(addr);

	}

	return;

    case 0xc300:		/* trapa #imm */

	{

	    TCGv imm;

	    CHECK_NOT_DELAY_SLOT

	    tcg_gen_movi_i32(cpu_pc, ctx->pc);

	    imm = tcg_const_i32(B7_0);

	    gen_helper_trapa(imm);

	    tcg_temp_free(imm);

	    ctx->bstate = BS_BRANCH;

	}

	return;

    case 0xc800:		/* tst #imm,R0 */

	{

	    TCGv val = tcg_temp_new();

	    tcg_gen_andi_i32(val, REG(0), B7_0);

	    gen_cmp_imm(TCG_COND_EQ, val, 0);

	    tcg_temp_free(val);

	}

	return;

    case 0xcc00:		/* tst.b #imm,@(R0,GBR) */

	{

	    TCGv val = tcg_temp_new();

	    tcg_gen_add_i32(val, REG(0), cpu_gbr);

	    tcg_gen_qemu_ld8u(val, val, ctx->memidx);

	    tcg_gen_andi_i32(val, val, B7_0);

	    gen_cmp_imm(TCG_COND_EQ, val, 0);

	    tcg_temp_free(val);

	}

	return;

    case 0xca00:		/* xor #imm,R0 */

	tcg_gen_xori_i32(REG(0), REG(0), B7_0);

	return;

    case 0xce00:		/* xor.b #imm,@(R0,GBR) */

	{

	    TCGv addr, val;

	    addr = tcg_temp_new();

	    tcg_gen_add_i32(addr, REG(0), cpu_gbr);

	    val = tcg_temp_new();

	    tcg_gen_qemu_ld8u(val, addr, ctx->memidx);

	    tcg_gen_xori_i32(val, val, B7_0);

	    tcg_gen_qemu_st8(val, addr, ctx->memidx);

	    tcg_temp_free(val);

	    tcg_temp_free(addr);

	}

	return;

    }

    switch (ctx->opcode & 0xf08f) {

    case 0x408e:		/* ldc Rm,Rn_BANK */

	CHECK_PRIVILEGED

	tcg_gen_mov_i32(ALTREG(B6_4), REG(B11_8));

	return;

    case 0x4087:		/* ldc.l @Rm+,Rn_BANK */

	CHECK_PRIVILEGED

	tcg_gen_qemu_ld32s(ALTREG(B6_4), REG(B11_8), ctx->memidx);

	tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);

	return;

    case 0x0082:		/* stc Rm_BANK,Rn */

	CHECK_PRIVILEGED

	tcg_gen_mov_i32(REG(B11_8), ALTREG(B6_4));

	return;

    case 0x4083:		/* stc.l Rm_BANK,@-Rn */

	CHECK_PRIVILEGED

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_subi_i32(addr, REG(B11_8), 4);

	    tcg_gen_qemu_st32(ALTREG(B6_4), addr, ctx->memidx);

	    tcg_gen_mov_i32(REG(B11_8), addr);

	    tcg_temp_free(addr);

	}

	return;

    }

    switch (ctx->opcode & 0xf0ff) {

    case 0x0023:		/* braf Rn */

	CHECK_NOT_DELAY_SLOT

	tcg_gen_addi_i32(cpu_delayed_pc, REG(B11_8), ctx->pc + 4);

	ctx->flags |= DELAY_SLOT;

	ctx->delayed_pc = (uint32_t) - 1;

	return;

    case 0x0003:		/* bsrf Rn */

	CHECK_NOT_DELAY_SLOT

	tcg_gen_movi_i32(cpu_pr, ctx->pc + 4);

	tcg_gen_add_i32(cpu_delayed_pc, REG(B11_8), cpu_pr);

	ctx->flags |= DELAY_SLOT;

	ctx->delayed_pc = (uint32_t) - 1;

	return;

    case 0x4015:		/* cmp/pl Rn */

	gen_cmp_imm(TCG_COND_GT, REG(B11_8), 0);

	return;

    case 0x4011:		/* cmp/pz Rn */

	gen_cmp_imm(TCG_COND_GE, REG(B11_8), 0);

	return;

    case 0x4010:		/* dt Rn */

	tcg_gen_subi_i32(REG(B11_8), REG(B11_8), 1);

	gen_cmp_imm(TCG_COND_EQ, REG(B11_8), 0);

	return;

    case 0x402b:		/* jmp @Rn */

	CHECK_NOT_DELAY_SLOT

	tcg_gen_mov_i32(cpu_delayed_pc, REG(B11_8));

	ctx->flags |= DELAY_SLOT;

	ctx->delayed_pc = (uint32_t) - 1;

	return;

    case 0x400b:		/* jsr @Rn */

	CHECK_NOT_DELAY_SLOT

	tcg_gen_movi_i32(cpu_pr, ctx->pc + 4);

	tcg_gen_mov_i32(cpu_delayed_pc, REG(B11_8));

	ctx->flags |= DELAY_SLOT;

	ctx->delayed_pc = (uint32_t) - 1;

	return;

    case 0x400e:		/* ldc Rm,SR */

	CHECK_PRIVILEGED

	tcg_gen_andi_i32(cpu_sr, REG(B11_8), 0x700083f3);

	ctx->bstate = BS_STOP;

	return;

    case 0x4007:		/* ldc.l @Rm+,SR */

	CHECK_PRIVILEGED

	{

	    TCGv val = tcg_temp_new();

	    tcg_gen_qemu_ld32s(val, REG(B11_8), ctx->memidx);

	    tcg_gen_andi_i32(cpu_sr, val, 0x700083f3);

	    tcg_temp_free(val);

	    tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);

	    ctx->bstate = BS_STOP;

	}

	return;

    case 0x0002:		/* stc SR,Rn */

	CHECK_PRIVILEGED

	tcg_gen_mov_i32(REG(B11_8), cpu_sr);

	return;

    case 0x4003:		/* stc SR,@-Rn */

	CHECK_PRIVILEGED

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_subi_i32(addr, REG(B11_8), 4);

	    tcg_gen_qemu_st32(cpu_sr, addr, ctx->memidx);

	    tcg_gen_mov_i32(REG(B11_8), addr);

	    tcg_temp_free(addr);

	}

	return;

#define LD(reg,ldnum,ldpnum,prechk)		\

  case ldnum:							\

    prechk    							\

    tcg_gen_mov_i32 (cpu_##reg, REG(B11_8));			\

    return;							\

  case ldpnum:							\

    prechk    							\

    tcg_gen_qemu_ld32s (cpu_##reg, REG(B11_8), ctx->memidx);	\

    tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);		\

    return;

#define ST(reg,stnum,stpnum,prechk)		\

  case stnum:							\

    prechk    							\

    tcg_gen_mov_i32 (REG(B11_8), cpu_##reg);			\

    return;							\

  case stpnum:							\

    prechk    							\

    {								\

	TCGv addr = tcg_temp_new();				\

	tcg_gen_subi_i32(addr, REG(B11_8), 4);			\

	tcg_gen_qemu_st32 (cpu_##reg, addr, ctx->memidx);	\

	tcg_gen_mov_i32(REG(B11_8), addr);			\

	tcg_temp_free(addr);					\

    }								\

    return;

#define LDST(reg,ldnum,ldpnum,stnum,stpnum,prechk)		\

	LD(reg,ldnum,ldpnum,prechk)				\

	ST(reg,stnum,stpnum,prechk)

	LDST(gbr,  0x401e, 0x4017, 0x0012, 0x4013, {})

	LDST(vbr,  0x402e, 0x4027, 0x0022, 0x4023, CHECK_PRIVILEGED)

	LDST(ssr,  0x403e, 0x4037, 0x0032, 0x4033, CHECK_PRIVILEGED)

	LDST(spc,  0x404e, 0x4047, 0x0042, 0x4043, CHECK_PRIVILEGED)

	ST(sgr,  0x003a, 0x4032, CHECK_PRIVILEGED)

	LD(sgr,  0x403a, 0x4036, CHECK_PRIVILEGED if (!(ctx->features & SH_FEATURE_SH4A)) break;)

	LDST(dbr,  0x40fa, 0x40f6, 0x00fa, 0x40f2, CHECK_PRIVILEGED)

	LDST(mach, 0x400a, 0x4006, 0x000a, 0x4002, {})

	LDST(macl, 0x401a, 0x4016, 0x001a, 0x4012, {})

	LDST(pr,   0x402a, 0x4026, 0x002a, 0x4022, {})

	LDST(fpul, 0x405a, 0x4056, 0x005a, 0x4052, {CHECK_FPU_ENABLED})

    case 0x406a:		/* lds Rm,FPSCR */

	CHECK_FPU_ENABLED

	gen_helper_ld_fpscr(REG(B11_8));

	ctx->bstate = BS_STOP;

	return;

    case 0x4066:		/* lds.l @Rm+,FPSCR */

	CHECK_FPU_ENABLED

	{

	    TCGv addr = tcg_temp_new();

	    tcg_gen_qemu_ld32s(addr, REG(B11_8), ctx->memidx);

	    tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);

	    gen_helper_ld_fpscr(addr);

	    tcg_temp_free(addr);

	    ctx->bstate = BS_STOP;

	}

	return;

    case 0x006a:		/* sts FPSCR,Rn */

	CHECK_FPU_ENABLED

	tcg_gen_andi_i32(REG(B11_8), cpu_fpscr, 0x003fffff);

	return;

    case 0x4062:		/* sts FPSCR,@-Rn */

	CHECK_FPU_ENABLED

	{

	    TCGv addr, val;

	    val = tcg_temp_new();

	    tcg_gen_andi_i32(val, cpu_fpscr, 0x003fffff);

	    addr = tcg_temp_new();

	    tcg_gen_subi_i32(addr, REG(B11_8), 4);

	    tcg_gen_qemu_st32(val, addr, ctx->memidx);

	    tcg_gen_mov_i32(REG(B11_8), addr);

	    tcg_temp_free(addr);

	    tcg_temp_free(val);

	}

	return;

    case 0x00c3:		/* movca.l R0,@Rm */

        {

            TCGv val = tcg_temp_new();

            tcg_gen_qemu_ld32u(val, REG(B11_8), ctx->memidx);

            gen_helper_movcal (REG(B11_8), val);

            tcg_gen_qemu_st32(REG(0), REG(B11_8), ctx->memidx);

        }

        ctx->has_movcal = 1;

	return;

    case 0x40a9:

	/* MOVUA.L @Rm,R0 (Rm) -> R0

	   Load non-boundary-aligned data */

	tcg_gen_qemu_ld32u(REG(0), REG(B11_8), ctx->memidx);

	return;

    case 0x40e9:

	/* MOVUA.L @Rm+,R0   (Rm) -> R0, Rm + 4 -> Rm

	   Load non-boundary-aligned data */

	tcg_gen_qemu_ld32u(REG(0), REG(B11_8), ctx->memidx);

	tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);

	return;

    case 0x0029:		/* movt Rn */

	tcg_gen_andi_i32(REG(B11_8), cpu_sr, SR_T);

	return;

    case 0x0073:

        /* MOVCO.L

	       LDST -> T

               If (T == 1) R0 -> (Rn)

               0 -> LDST

        */

        if (ctx->features & SH_FEATURE_SH4A) {

	    int label = gen_new_label();

	    gen_clr_t();

	    tcg_gen_or_i32(cpu_sr, cpu_sr, cpu_ldst);

	    tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_ldst, 0, label);

	    tcg_gen_qemu_st32(REG(0), REG(B11_8), ctx->memidx);

	    gen_set_label(label);

	    tcg_gen_movi_i32(cpu_ldst, 0);

	    return;

	} else

	    break;

    case 0x0063:

        /* MOVLI.L @Rm,R0

               1 -> LDST

               (Rm) -> R0

               When interrupt/exception

               occurred 0 -> LDST

        */

	if (ctx->features & SH_FEATURE_SH4A) {

	    tcg_gen_movi_i32(cpu_ldst, 0);

	    tcg_gen_qemu_ld32s(REG(0), REG(B11_8), ctx->memidx);

	    tcg_gen_movi_i32(cpu_ldst, 1);

	    return;

	} else

	    break;

    case 0x0093:		/* ocbi @Rn */

	{

	    gen_helper_ocbi (REG(B11_8));

	}

	return;

    case 0x00a3:		/* ocbp @Rn */

	{

	    TCGv dummy = tcg_temp_new();

	    tcg_gen_qemu_ld32s(dummy, REG(B11_8), ctx->memidx);

	    tcg_temp_free(dummy);

	}

	return;

    case 0x00b3:		/* ocbwb @Rn */

	{

	    TCGv dummy = tcg_temp_new();

	    tcg_gen_qemu_ld32s(dummy, REG(B11_8), ctx->memidx);

	    tcg_temp_free(dummy);

	}

	return;

    case 0x0083:		/* pref @Rn */

	return;

    case 0x00d3:		/* prefi @Rn */

	if (ctx->features & SH_FEATURE_SH4A)

	    return;

	else

	    break;

    case 0x00e3:		/* icbi @Rn */

	if (ctx->features & SH_FEATURE_SH4A)

	    return;

	else

	    break;

    case 0x00ab:		/* synco */

	if (ctx->features & SH_FEATURE_SH4A)

	    return;

	else

	    break;

    case 0x4024:		/* rotcl Rn */

	{

	    TCGv tmp = tcg_temp_new();

	    tcg_gen_mov_i32(tmp, cpu_sr);

	    gen_copy_bit_i32(cpu_sr, 0, REG(B11_8), 31);

	    tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 1);

	    gen_copy_bit_i32(REG(B11_8), 0, tmp, 0);

	    tcg_temp_free(tmp);

	}

	return;

    case 0x4025:		/* rotcr Rn */

	{

	    TCGv tmp = tcg_temp_new();

	    tcg_gen_mov_i32(tmp, cpu_sr);

	    gen_copy_bit_i32(cpu_sr, 0, REG(B11_8), 0);

	    tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 1);

	    gen_copy_bit_i32(REG(B11_8), 31, tmp, 0);

	    tcg_temp_free(tmp);

	}

	return;

    case 0x4004:		/* rotl Rn */

	gen_copy_bit_i32(cpu_sr, 0, REG(B11_8), 31);

	tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 1);

	gen_copy_bit_i32(REG(B11_8), 0, cpu_sr, 0);

	return;

    case 0x4005:		/* rotr Rn */

	gen_copy_bit_i32(cpu_sr, 0, REG(B11_8), 0);

	tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 1);

	gen_copy_bit_i32(REG(B11_8), 31, cpu_sr, 0);

	return;

    case 0x4000:		/* shll Rn */

    case 0x4020:		/* shal Rn */

	gen_copy_bit_i32(cpu_sr, 0, REG(B11_8), 31);

	tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 1);

	return;

    case 0x4021:		/* shar Rn */

	gen_copy_bit_i32(cpu_sr, 0, REG(B11_8), 0);

	tcg_gen_sari_i32(REG(B11_8), REG(B11_8), 1);

	return;

    case 0x4001:		/* shlr Rn */

	gen_copy_bit_i32(cpu_sr, 0, REG(B11_8), 0);

	tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 1);

	return;

    case 0x4008:		/* shll2 Rn */

	tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 2);

	return;

    case 0x4018:		/* shll8 Rn */

	tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 8);

	return;

    case 0x4028:		/* shll16 Rn */

	tcg_gen_shli_i32(REG(B11_8), REG(B11_8), 16);

	return;

    case 0x4009:		/* shlr2 Rn */

	tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 2);

	return;

    case 0x4019:		/* shlr8 Rn */

	tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 8);

	return;

    case 0x4029:		/* shlr16 Rn */

	tcg_gen_shri_i32(REG(B11_8), REG(B11_8), 16);

	return;

    case 0x401b:		/* tas.b @Rn */

	{

	    TCGv addr, val;

	    addr = tcg_temp_local_new();

	    tcg_gen_mov_i32(addr, REG(B11_8));

	    val = tcg_temp_local_new();

	    tcg_gen_qemu_ld8u(val, addr, ctx->memidx);

	    gen_cmp_imm(TCG_COND_EQ, val, 0);

	    tcg_gen_ori_i32(val, val, 0x80);

	    tcg_gen_qemu_st8(val, addr, ctx->memidx);

	    tcg_temp_free(val);

	    tcg_temp_free(addr);

	}

	return;

    case 0xf00d: /* fsts FPUL,FRn - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	tcg_gen_mov_i32(cpu_fregs[FREG(B11_8)], cpu_fpul);

	return;

    case 0xf01d: /* flds FRm,FPUL - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	tcg_gen_mov_i32(cpu_fpul, cpu_fregs[FREG(B11_8)]);

	return;

    case 0xf02d: /* float FPUL,FRn/DRn - FPSCR: R[PR,Enable.I]/W[Cause,Flag] */

	CHECK_FPU_ENABLED

	if (ctx->fpscr & FPSCR_PR) {

	    TCGv_i64 fp;

	    if (ctx->opcode & 0x0100)

		break; /* illegal instruction */

	    fp = tcg_temp_new_i64();

	    gen_helper_float_DT(fp, cpu_fpul);

	    gen_store_fpr64(fp, DREG(B11_8));

	    tcg_temp_free_i64(fp);

	}

	else {

	    gen_helper_float_FT(cpu_fregs[FREG(B11_8)], cpu_fpul);

	}

	return;

    case 0xf03d: /* ftrc FRm/DRm,FPUL - FPSCR: R[PR,Enable.V]/W[Cause,Flag] */

	CHECK_FPU_ENABLED

	if (ctx->fpscr & FPSCR_PR) {

	    TCGv_i64 fp;

	    if (ctx->opcode & 0x0100)

		break; /* illegal instruction */

	    fp = tcg_temp_new_i64();

	    gen_load_fpr64(fp, DREG(B11_8));

	    gen_helper_ftrc_DT(cpu_fpul, fp);

	    tcg_temp_free_i64(fp);

	}

	else {

	    gen_helper_ftrc_FT(cpu_fpul, cpu_fregs[FREG(B11_8)]);

	}

	return;

    case 0xf04d: /* fneg FRn/DRn - FPSCR: Nothing */

	CHECK_FPU_ENABLED

	{

	    gen_helper_fneg_T(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)]);

	}

	return;

    case 0xf05d: /* fabs FRn/DRn */

	CHECK_FPU_ENABLED

	if (ctx->fpscr & FPSCR_PR) {

	    if (ctx->opcode & 0x0100)

		break; /* illegal instruction */

	    TCGv_i64 fp = tcg_temp_new_i64();

	    gen_load_fpr64(fp, DREG(B11_8));

	    gen_helper_fabs_DT(fp, fp);

	    gen_store_fpr64(fp, DREG(B11_8));

	    tcg_temp_free_i64(fp);

	} else {

	    gen_helper_fabs_FT(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)]);

	}

	return;

    case 0xf06d: /* fsqrt FRn */

	CHECK_FPU_ENABLED

	if (ctx->fpscr & FPSCR_PR) {

	    if (ctx->opcode & 0x0100)

		break; /* illegal instruction */

	    TCGv_i64 fp = tcg_temp_new_i64();

	    gen_load_fpr64(fp, DREG(B11_8));

	    gen_helper_fsqrt_DT(fp, fp);

	    gen_store_fpr64(fp, DREG(B11_8));

	    tcg_temp_free_i64(fp);

	} else {

	    gen_helper_fsqrt_FT(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)]);

	}

	return;

    case 0xf07d: /* fsrra FRn */

	CHECK_FPU_ENABLED

	break;

    case 0xf08d: /* fldi0 FRn - FPSCR: R[PR] */

	CHECK_FPU_ENABLED

	if (!(ctx->fpscr & FPSCR_PR)) {

	    tcg_gen_movi_i32(cpu_fregs[FREG(B11_8)], 0);

	}

	return;

    case 0xf09d: /* fldi1 FRn - FPSCR: R[PR] */

	CHECK_FPU_ENABLED

	if (!(ctx->fpscr & FPSCR_PR)) {

	    tcg_gen_movi_i32(cpu_fregs[FREG(B11_8)], 0x3f800000);

	}

	return;

    case 0xf0ad: /* fcnvsd FPUL,DRn */

	CHECK_FPU_ENABLED

	{

	    TCGv_i64 fp = tcg_temp_new_i64();

	    gen_helper_fcnvsd_FT_DT(fp, cpu_fpul);

	    gen_store_fpr64(fp, DREG(B11_8));

	    tcg_temp_free_i64(fp);

	}

	return;

    case 0xf0bd: /* fcnvds DRn,FPUL */

	CHECK_FPU_ENABLED

	{

	    TCGv_i64 fp = tcg_temp_new_i64();

	    gen_load_fpr64(fp, DREG(B11_8));

	    gen_helper_fcnvds_DT_FT(cpu_fpul, fp);

	    tcg_temp_free_i64(fp);

	}

	return;

    }

#if 0

    fprintf(stderr, "unknown instruction 0x%04x at pc 0x%08x\n",

	    ctx->opcode, ctx->pc);

    fflush(stderr);

#endif

    gen_helper_raise_illegal_instruction();

    ctx->bstate = BS_EXCP;

}


void wm8750_set_bclk_in(void *opaque, int hz)

{

    struct wm8750_s *s = (struct wm8750_s *) opaque;

    s->ext_adc_hz = hz;

    s->ext_dac_hz = hz;

    wm8750_clk_update(s, 1);

}


static void pmac_dma_write(BlockBackend *blk,

                         int64_t sector_num, int nb_sectors,

                         void (*cb)(void *opaque, int ret), void *opaque)

{

    DBDMA_io *io = opaque;

    MACIOIDEState *m = io->opaque;

    IDEState *s = idebus_active_if(&m->bus);

    dma_addr_t dma_addr, dma_len;

    void *mem;

    int nsector, remainder;

    int extra = 0;

    qemu_iovec_destroy(&io->iov);

    qemu_iovec_init(&io->iov, io->len / MACIO_PAGE_SIZE + 1);

    if (io->remainder_len > 0) {

        /* Return remainder of request */

        int transfer = MIN(io->remainder_len, io->len);

        MACIO_DPRINTF("--- processing write remainder %x\n", transfer);

        cpu_physical_memory_read(io->addr,

                                 &io->remainder + (0x200 - transfer),

                                 transfer);

        io->remainder_len -= transfer;

        io->len -= transfer;

        io->addr += transfer;

        s->io_buffer_index += transfer;

        s->io_buffer_size -= transfer;

        if (io->remainder_len != 0) {

            /* Still waiting for remainder */

            return;

        }

        MACIO_DPRINTF("--> prepending bounce buffer with size 0x200\n");

        /* Sector transfer complete - prepend to request */

        qemu_iovec_add(&io->iov, &io->remainder, 0x200);

        extra = 1;

    }

    if (s->drive_kind == IDE_CD) {

        sector_num = (int64_t)(s->lba << 2) + (s->io_buffer_index >> 9);

    } else {

        sector_num = ide_get_sector(s) + (s->io_buffer_index >> 9);

    }

    nsector = (io->len >> 9);

    remainder = io->len - (nsector << 9);

    MACIO_DPRINTF("--- DMA write transfer - addr: %" HWADDR_PRIx " len: %x\n",

                  io->addr, io->len);

    MACIO_DPRINTF("xxx remainder: %x\n", remainder);

    MACIO_DPRINTF("xxx sector_num: %"PRIx64"   nsector: %x\n",

                  sector_num, nsector);

    dma_addr = io->addr;

    dma_len = io->len;

    mem = dma_memory_map(&address_space_memory, dma_addr, &dma_len,

                         DMA_DIRECTION_TO_DEVICE);

    if (!remainder) {

        MACIO_DPRINTF("--- DMA write aligned - addr: %" HWADDR_PRIx

                      " len: %x\n", io->addr, io->len);

        qemu_iovec_add(&io->iov, mem, io->len);

    } else {

        /* Write up to last complete sector */

        MACIO_DPRINTF("--- DMA write unaligned - addr: %" HWADDR_PRIx

                      " len: %x\n", io->addr, (nsector << 9));

        qemu_iovec_add(&io->iov, mem, (nsector << 9));

        MACIO_DPRINTF("--- DMA write read    - bounce addr: %p "

                      "remainder_len: %x\n", &io->remainder, remainder);

        cpu_physical_memory_read(io->addr + (nsector << 9), &io->remainder,

                                 remainder);

        io->remainder_len = 0x200 - remainder;

        MACIO_DPRINTF("xxx remainder_len: %x\n", io->remainder_len);

    }

    s->io_buffer_size -= ((nsector + extra) << 9);

    s->io_buffer_index += ((nsector + extra) << 9);

    io->len = 0;

    MACIO_DPRINTF("--- Block write transfer   - sector_num: %"PRIx64"  "

                  "nsector: %x\n", sector_num, nsector + extra);

    m->aiocb = blk_aio_writev(blk, sector_num, &io->iov, nsector + extra, cb,

                              io);

}


static void bdrv_delete(BlockDriverState *bs)

{

    assert(!bs->job);

    assert(bdrv_op_blocker_is_empty(bs));

    assert(!bs->refcnt);

    assert(QLIST_EMPTY(&bs->dirty_bitmaps));

    bdrv_close(bs);

    /* remove from list, if necessary */

    bdrv_make_anon(bs);

    g_free(bs);

}


static void vtd_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)

{

    VTDAddressSpace *vtd_as = container_of(iommu_mr, VTDAddressSpace, iommu);

    IntelIOMMUState *s = vtd_as->iommu_state;

    uint8_t bus_n = pci_bus_num(vtd_as->bus);

    VTDContextEntry ce;

    /*

     * The replay can be triggered by either a invalidation or a newly

     * created entry. No matter what, we release existing mappings

     * (it means flushing caches for UNMAP-only registers).

     */

    vtd_address_space_unmap(vtd_as, n);

    if (vtd_dev_to_context_entry(s, bus_n, vtd_as->devfn, &ce) == 0) {

        trace_vtd_replay_ce_valid(bus_n, PCI_SLOT(vtd_as->devfn),

                                  PCI_FUNC(vtd_as->devfn),

                                  VTD_CONTEXT_ENTRY_DID(ce.hi),

                                  ce.hi, ce.lo);

        vtd_page_walk(&ce, 0, ~0ULL, vtd_replay_hook, (void *)n, false);

    } else {

        trace_vtd_replay_ce_invalid(bus_n, PCI_SLOT(vtd_as->devfn),

                                    PCI_FUNC(vtd_as->devfn));

    }

    return;

}


static inline int sd_wp_addr(SDState *sd, uint32_t addr)

{

    return sd->wp_groups[addr >>

            (HWBLOCK_SHIFT + SECTOR_SHIFT + WPGROUP_SHIFT)];

}


static void console_handle_escape(QemuConsole *s)

{

    int i;

    for (i=0; i<s->nb_esc_params; i++) {

        switch (s->esc_params[i]) {

            case 0: /* reset all console attributes to default */

                s->t_attrib = s->t_attrib_default;

                break;

            case 1:

                s->t_attrib.bold = 1;

                break;

            case 4:

                s->t_attrib.uline = 1;

                break;

            case 5:

                s->t_attrib.blink = 1;

                break;

            case 7:

                s->t_attrib.invers = 1;

                break;

            case 8:

                s->t_attrib.unvisible = 1;

                break;

            case 22:

                s->t_attrib.bold = 0;

                break;

            case 24:

                s->t_attrib.uline = 0;

                break;

            case 25:

                s->t_attrib.blink = 0;

                break;

            case 27:

                s->t_attrib.invers = 0;

                break;

            case 28:

                s->t_attrib.unvisible = 0;

                break;

            /* set foreground color */

            case 30:

                s->t_attrib.fgcol=COLOR_BLACK;

                break;

            case 31:

                s->t_attrib.fgcol=COLOR_RED;

                break;

            case 32:

                s->t_attrib.fgcol=COLOR_GREEN;

                break;

            case 33:

                s->t_attrib.fgcol=COLOR_YELLOW;

                break;

            case 34:

                s->t_attrib.fgcol=COLOR_BLUE;

                break;

            case 35:

                s->t_attrib.fgcol=COLOR_MAGENTA;

                break;

            case 36:

                s->t_attrib.fgcol=COLOR_CYAN;

                break;

            case 37:

                s->t_attrib.fgcol=COLOR_WHITE;

                break;

            /* set background color */

            case 40:

                s->t_attrib.bgcol=COLOR_BLACK;

                break;

            case 41:

                s->t_attrib.bgcol=COLOR_RED;

                break;

            case 42:

                s->t_attrib.bgcol=COLOR_GREEN;

                break;

            case 43:

                s->t_attrib.bgcol=COLOR_YELLOW;

                break;

            case 44:

                s->t_attrib.bgcol=COLOR_BLUE;

                break;

            case 45:

                s->t_attrib.bgcol=COLOR_MAGENTA;

                break;

            case 46:

                s->t_attrib.bgcol=COLOR_CYAN;

                break;

            case 47:

                s->t_attrib.bgcol=COLOR_WHITE;

                break;

        }

    }

}


static void write_vec_element(DisasContext *s, TCGv_i64 tcg_src, int destidx,

                              int element, TCGMemOp memop)

{

    int vect_off = vec_reg_offset(destidx, element, memop & MO_SIZE);

    switch (memop) {

    case MO_8:

        tcg_gen_st8_i64(tcg_src, cpu_env, vect_off);

        break;

    case MO_16:

        tcg_gen_st16_i64(tcg_src, cpu_env, vect_off);

        break;

    case MO_32:

        tcg_gen_st32_i64(tcg_src, cpu_env, vect_off);

        break;

    case MO_64:

        tcg_gen_st_i64(tcg_src, cpu_env, vect_off);

        break;

    default:

        g_assert_not_reached();

    }

}


static always_inline void gen_ext_h(void (*tcg_gen_ext_i64)(TCGv t0, TCGv t1),

                                    int ra, int rb, int rc,

                                    int islit, uint8_t lit)

{

    if (unlikely(rc == 31))

        return;

    if (ra != 31) {

        if (islit) {

            if (lit != 0)

                tcg_gen_shli_i64(cpu_ir[rc], cpu_ir[ra], 64 - ((lit & 7) * 8));

            else

                tcg_gen_mov_i64(cpu_ir[rc], cpu_ir[ra]);

        } else {

            TCGv tmp1, tmp2;

            tmp1 = tcg_temp_new(TCG_TYPE_I64);

            tcg_gen_andi_i64(tmp1, cpu_ir[rb], 7);

            tcg_gen_shli_i64(tmp1, tmp1, 3);

            tmp2 = tcg_const_i64(64);

            tcg_gen_sub_i64(tmp1, tmp2, tmp1);

            tcg_temp_free(tmp2);

            tcg_gen_shl_i64(cpu_ir[rc], cpu_ir[ra], tmp1);

            tcg_temp_free(tmp1);

        }

        if (tcg_gen_ext_i64)

            tcg_gen_ext_i64(cpu_ir[rc], cpu_ir[rc]);

    } else

        tcg_gen_movi_i64(cpu_ir[rc], 0);

}


void ff_h264_init_dequant_tables(H264Context *h)

{

    int i, x;

    init_dequant4_coeff_table(h);

    if (h->pps.transform_8x8_mode)

        init_dequant8_coeff_table(h);

    if (h->sps.transform_bypass) {

        for (i = 0; i < 6; i++)

            for (x = 0; x < 16; x++)

                h->dequant4_coeff[i][0][x] = 1 << 6;

        if (h->pps.transform_8x8_mode)

            for (i = 0; i < 6; i++)

                for (x = 0; x < 64; x++)

                    h->dequant8_coeff[i][0][x] = 1 << 6;

    }

}


static av_cold int g722_encode_init(AVCodecContext * avctx)

{

    G722Context *c = avctx->priv_data;

    int ret;

    if (avctx->channels != 1) {

        av_log(avctx, AV_LOG_ERROR, "Only mono tracks are allowed.\n");

        return AVERROR_INVALIDDATA;

    }

    c->band[0].scale_factor = 8;

    c->band[1].scale_factor = 2;

    c->prev_samples_pos = 22;

    if (avctx->trellis) {

        int frontier = 1 << avctx->trellis;

        int max_paths = frontier * FREEZE_INTERVAL;

        int i;

        for (i = 0; i < 2; i++) {

            c->paths[i] = av_mallocz(max_paths * sizeof(**c->paths));

            c->node_buf[i] = av_mallocz(2 * frontier * sizeof(**c->node_buf));

            c->nodep_buf[i] = av_mallocz(2 * frontier * sizeof(**c->nodep_buf));

            if (!c->paths[i] || !c->node_buf[i] || !c->nodep_buf[i]) {

                ret = AVERROR(ENOMEM);

                goto error;

            }

        }

    }

    if (avctx->frame_size) {

        /* validate frame size */

        if (avctx->frame_size & 1 || avctx->frame_size > MAX_FRAME_SIZE) {

            int new_frame_size;

            if (avctx->frame_size == 1)

                new_frame_size = 2;

            else if (avctx->frame_size > MAX_FRAME_SIZE)

                new_frame_size = MAX_FRAME_SIZE;

            else

                new_frame_size = avctx->frame_size - 1;

            av_log(avctx, AV_LOG_WARNING, "Requested frame size is not "

                   "allowed. Using %d instead of %d\n", new_frame_size,

                   avctx->frame_size);

            avctx->frame_size = new_frame_size;

        }

    } else {

        /* This is arbitrary. We use 320 because it's 20ms @ 16kHz, which is

           a common packet size for VoIP applications */

        avctx->frame_size = 320;

    }

    avctx->delay = 22;

    if (avctx->trellis) {

        /* validate trellis */

        if (avctx->trellis < MIN_TRELLIS || avctx->trellis > MAX_TRELLIS) {

            int new_trellis = av_clip(avctx->trellis, MIN_TRELLIS, MAX_TRELLIS);

            av_log(avctx, AV_LOG_WARNING, "Requested trellis value is not "

                   "allowed. Using %d instead of %d\n", new_trellis,

                   avctx->trellis);

            avctx->trellis = new_trellis;

        }

    }

    return 0;

error:

    g722_encode_close(avctx);

    return ret;

}


static uint64_t lsi_mmio_read(void *opaque, target_phys_addr_t addr,

                              unsigned size)

{

    LSIState *s = opaque;

    return lsi_reg_readb(s, addr & 0xff);

}


static int cryptodev_builtin_create_cipher_session(

                    CryptoDevBackendBuiltin *builtin,

                    CryptoDevBackendSymSessionInfo *sess_info,

                    Error **errp)

{

    int algo;

    int mode;

    QCryptoCipher *cipher;

    int index;

    CryptoDevBackendBuiltinSession *sess;

    if (sess_info->op_type != VIRTIO_CRYPTO_SYM_OP_CIPHER) {

        error_setg(errp, "Unsupported optype :%u", sess_info->op_type);

        return -1;

    }

    index = cryptodev_builtin_get_unused_session_index(builtin);

    if (index < 0) {

        error_setg(errp, "Total number of sessions created exceeds %u",

                  MAX_NUM_SESSIONS);

        return -1;

    }

    switch (sess_info->cipher_alg) {

    case VIRTIO_CRYPTO_CIPHER_AES_ECB:

        algo = cryptodev_builtin_get_aes_algo(sess_info->key_len,

                                                          errp);

        if (algo < 0)  {

            return -1;

        }

        mode = QCRYPTO_CIPHER_MODE_ECB;

        break;

    case VIRTIO_CRYPTO_CIPHER_AES_CBC:

        algo = cryptodev_builtin_get_aes_algo(sess_info->key_len,

                                                          errp);

        if (algo < 0)  {

            return -1;

        }

        mode = QCRYPTO_CIPHER_MODE_CBC;

        break;

    case VIRTIO_CRYPTO_CIPHER_AES_CTR:

        algo = cryptodev_builtin_get_aes_algo(sess_info->key_len,

                                                          errp);

        if (algo < 0)  {

            return -1;

        }

        mode = QCRYPTO_CIPHER_MODE_CTR;

        break;

    case VIRTIO_CRYPTO_CIPHER_DES_ECB:

        algo = QCRYPTO_CIPHER_ALG_DES_RFB;

        mode = QCRYPTO_CIPHER_MODE_ECB;

        break;

    default:

        error_setg(errp, "Unsupported cipher alg :%u",

                   sess_info->cipher_alg);

        return -1;

    }

    cipher = qcrypto_cipher_new(algo, mode,

                               sess_info->cipher_key,

                               sess_info->key_len,

                               errp);

    if (!cipher) {

        return -1;

    }

    sess = g_new0(CryptoDevBackendBuiltinSession, 1);

    sess->cipher = cipher;

    sess->direction = sess_info->direction;

    sess->type = sess_info->op_type;

    builtin->sessions[index] = sess;

    return index;

}


envlist_free(envlist_t *envlist)

{

	struct envlist_entry *entry;

	assert(envlist != NULL);

	while (envlist->el_entries.lh_first != NULL) {

		entry = envlist->el_entries.lh_first;

		LIST_REMOVE(entry, ev_link);

		free((char *)entry->ev_var);

		free(entry);

	}

	free(envlist);

}


static void test_hba_enable(void)

{

    AHCIQState *ahci;

    ahci = ahci_boot();

    ahci_pci_enable(ahci);

    ahci_hba_enable(ahci);

    ahci_shutdown(ahci);

}


static int writev_f(int argc, char **argv)

{

    struct timeval t1, t2;

    int Cflag = 0, qflag = 0;

    int c, cnt;

    char *buf;

    int64_t offset;

    /* Some compilers get confused and warn if this is not initialized.  */

    int total = 0;

    int nr_iov;

    int pattern = 0xcd;

    QEMUIOVector qiov;

    while ((c = getopt(argc, argv, "CqP:")) != EOF) {

        switch (c) {

        case 'C':

            Cflag = 1;

            break;

        case 'q':

            qflag = 1;

            break;

        case 'P':

            pattern = parse_pattern(optarg);

            if (pattern < 0) {

                return 0;

            }

            break;

        default:

            return command_usage(&writev_cmd);

        }

    }

    if (optind > argc - 2) {

        return command_usage(&writev_cmd);

    }

    offset = cvtnum(argv[optind]);

    if (offset < 0) {

        printf("non-numeric length argument -- %s\n", argv[optind]);

        return 0;

    }

    optind++;

    if (offset & 0x1ff) {

        printf("offset %" PRId64 " is not sector aligned\n",

               offset);

        return 0;

    }

    nr_iov = argc - optind;

    buf = create_iovec(&qiov, &argv[optind], nr_iov, pattern);

    if (buf == NULL) {

        return 0;

    }

    gettimeofday(&t1, NULL);

    cnt = do_aio_writev(&qiov, offset, &total);

    gettimeofday(&t2, NULL);

    if (cnt < 0) {

        printf("writev failed: %s\n", strerror(-cnt));

        goto out;

    }

    if (qflag) {

        goto out;

    }

    /* Finally, report back -- -C gives a parsable format */

    t2 = tsub(t2, t1);

    print_report("wrote", &t2, offset, qiov.size, total, cnt, Cflag);

out:

    qemu_io_free(buf);

    return 0;

}


static int decode_pce(AVCodecContext *avctx, MPEG4AudioConfig *m4ac,

                      enum ChannelPosition new_che_pos[4][MAX_ELEM_ID],

                      GetBitContext *gb)

{

    int num_front, num_side, num_back, num_lfe, num_assoc_data, num_cc, sampling_index;

    int comment_len;

    skip_bits(gb, 2);  // object_type

    sampling_index = get_bits(gb, 4);

    if (m4ac->sampling_index != sampling_index)

        av_log(avctx, AV_LOG_WARNING, "Sample rate index in program config element does not match the sample rate index configured by the container.\n");

    num_front       = get_bits(gb, 4);

    num_side        = get_bits(gb, 4);

    num_back        = get_bits(gb, 4);

    num_lfe         = get_bits(gb, 2);

    num_assoc_data  = get_bits(gb, 3);

    num_cc          = get_bits(gb, 4);

    if (get_bits1(gb))

        skip_bits(gb, 4); // mono_mixdown_tag

    if (get_bits1(gb))

        skip_bits(gb, 4); // stereo_mixdown_tag

    if (get_bits1(gb))

        skip_bits(gb, 3); // mixdown_coeff_index and pseudo_surround

    decode_channel_map(new_che_pos[TYPE_CPE], new_che_pos[TYPE_SCE], AAC_CHANNEL_FRONT, gb, num_front);

    decode_channel_map(new_che_pos[TYPE_CPE], new_che_pos[TYPE_SCE], AAC_CHANNEL_SIDE,  gb, num_side );

    decode_channel_map(new_che_pos[TYPE_CPE], new_che_pos[TYPE_SCE], AAC_CHANNEL_BACK,  gb, num_back );

    decode_channel_map(NULL,                  new_che_pos[TYPE_LFE], AAC_CHANNEL_LFE,   gb, num_lfe  );

    skip_bits_long(gb, 4 * num_assoc_data);

    decode_channel_map(new_che_pos[TYPE_CCE], new_che_pos[TYPE_CCE], AAC_CHANNEL_CC,    gb, num_cc   );

    align_get_bits(gb);

    /* comment field, first byte is length */

    comment_len = get_bits(gb, 8) * 8;

    if (get_bits_left(gb) < comment_len) {

    skip_bits_long(gb, comment_len);

    return 0;


static int ws_snd_decode_frame(AVCodecContext *avctx, void *data,

                               int *got_frame_ptr, AVPacket *avpkt)

{

    WSSndContext *s = avctx->priv_data;

    const uint8_t *buf = avpkt->data;

    int buf_size       = avpkt->size;

    int in_size, out_size, ret;

    int sample = 128;

    uint8_t *samples;

    uint8_t *samples_end;

    if (!buf_size)

        return 0;

    if (buf_size < 4) {

        av_log(avctx, AV_LOG_ERROR, "packet is too small\n");

        return AVERROR(EINVAL);

    }

    out_size = AV_RL16(&buf[0]);

    in_size  = AV_RL16(&buf[2]);

    buf += 4;

    if (in_size > buf_size) {

        av_log(avctx, AV_LOG_ERROR, "Frame data is larger than input buffer\n");

        return -1;

    }

    /* get output buffer */

    s->frame.nb_samples = out_size;

    if ((ret = avctx->get_buffer(avctx, &s->frame)) < 0) {

        av_log(avctx, AV_LOG_ERROR, "get_buffer() failed\n");

        return ret;

    }

    samples     = s->frame.data[0];

    samples_end = samples + out_size;

    if (in_size == out_size) {

        memcpy(samples, buf, out_size);

        *got_frame_ptr   = 1;

        *(AVFrame *)data = s->frame;

        return buf_size;

    }

    while (samples < samples_end && buf - avpkt->data < buf_size) {

        int code, smp, size;

        uint8_t count;

        code  = *buf >> 6;

        count = *buf & 0x3F;

        buf++;

        /* make sure we don't write past the output buffer */

        switch (code) {

        case 0:  smp = 4;                              break;

        case 1:  smp = 2;                              break;

        case 2:  smp = (count & 0x20) ? 1 : count + 1; break;

        default: smp = count + 1;                      break;

        }

        if (samples_end - samples < smp)

            break;

        /* make sure we don't read past the input buffer */

        size = ((code == 2 && (count & 0x20)) || code == 3) ? 0 : count + 1;

        if ((buf - avpkt->data) + size > buf_size)

            break;

        switch (code) {

        case 0: /* ADPCM 2-bit */

            for (count++; count > 0; count--) {

                code = *buf++;

                sample += ( code       & 0x3) - 2;

                sample = av_clip_uint8(sample);

                *samples++ = sample;

                sample += ((code >> 2) & 0x3) - 2;

                sample = av_clip_uint8(sample);

                *samples++ = sample;

                sample += ((code >> 4) & 0x3) - 2;

                sample = av_clip_uint8(sample);

                *samples++ = sample;

                sample +=  (code >> 6)        - 2;

                sample = av_clip_uint8(sample);

                *samples++ = sample;

            }

            break;

        case 1: /* ADPCM 4-bit */

            for (count++; count > 0; count--) {

                code = *buf++;

                sample += ws_adpcm_4bit[code & 0xF];

                sample = av_clip_uint8(sample);

                *samples++ = sample;

                sample += ws_adpcm_4bit[code >> 4];

                sample = av_clip_uint8(sample);

                *samples++ = sample;

            }

            break;

        case 2: /* no compression */

            if (count & 0x20) { /* big delta */

                int8_t t;

                t = count;

                t <<= 3;

                sample += t >> 3;

                sample = av_clip_uint8(sample);

                *samples++ = sample;

            } else { /* copy */

                memcpy(samples, buf, smp);

                samples += smp;

                buf     += smp;

                sample = buf[-1];

            }

            break;

        default: /* run */

            memset(samples, sample, smp);

            samples += smp;

        }

    }

    s->frame.nb_samples = samples - s->frame.data[0];

    *got_frame_ptr   = 1;

    *(AVFrame *)data = s->frame;

    return buf_size;

}


static av_always_inline void hyscale(SwsContext *c, int16_t *dst, int dstWidth,

                                     const uint8_t *src_in[4], int srcW, int xInc,

                                     const int16_t *hLumFilter,

                                     const int16_t *hLumFilterPos, int hLumFilterSize,

                                     uint8_t *formatConvBuffer,

                                     uint32_t *pal, int isAlpha)

{

    void (*toYV12)(uint8_t *, const uint8_t *, int, uint32_t *) = isAlpha ? c->alpToYV12 : c->lumToYV12;

    void (*convertRange)(int16_t *, int) = isAlpha ? NULL : c->lumConvertRange;

    const uint8_t *src = src_in[isAlpha ? 3 : 0];

    if (toYV12) {

        toYV12(formatConvBuffer, src, srcW, pal);

        src= formatConvBuffer;

    } else if (c->readLumPlanar && !isAlpha) {

        c->readLumPlanar(formatConvBuffer, src_in, srcW);

        src = formatConvBuffer;

    }

    if (!c->hyscale_fast) {

        c->hyScale(c, dst, dstWidth, src, hLumFilter, hLumFilterPos, hLumFilterSize);

    } else { // fast bilinear upscale / crap downscale

        c->hyscale_fast(c, dst, dstWidth, src, srcW, xInc);

    }

    if (convertRange)

        convertRange(dst, dstWidth);

}


static av_always_inline av_flatten void h264_loop_filter_chroma_c(uint8_t *pix, int xstride, int ystride, int alpha, int beta, int8_t *tc0)

{

    int i, d;

    for( i = 0; i < 4; i++ ) {

        const int tc = tc0[i];

        if( tc <= 0 ) {

            pix += 2*ystride;

            continue;

        }

        for( d = 0; d < 2; d++ ) {

            const int p0 = pix[-1*xstride];

            const int p1 = pix[-2*xstride];

            const int q0 = pix[0];

            const int q1 = pix[1*xstride];

            if( FFABS( p0 - q0 ) < alpha &&

                FFABS( p1 - p0 ) < beta &&

                FFABS( q1 - q0 ) < beta ) {

                int delta = av_clip( (((q0 - p0 ) << 2) + (p1 - q1) + 4) >> 3, -tc, tc );

                pix[-xstride] = av_clip_uint8( p0 + delta );    /* p0' */

                pix[0]        = av_clip_uint8( q0 - delta );    /* q0' */

            }

            pix += ystride;

        }

    }

}


int ff_mpeg4_decode_picture_header(MpegEncContext * s, GetBitContext *gb)

{

    int startcode, v;

    /* search next start code */

    align_get_bits(gb);

    startcode = 0xff;

    for(;;) {

        v = get_bits(gb, 8);

        startcode = ((startcode << 8) | v) & 0xffffffff;

        if(get_bits_count(gb) >= gb->size*8){

            if(gb->size==1 && s->divx_version){

                printf("frame skip %d\n", gb->size);

                return FRAME_SKIPED; //divx bug

            }else

                return -1; //end of stream

        }

        if((startcode&0xFFFFFF00) != 0x100)

            continue; //no startcode

        if(s->avctx->debug&FF_DEBUG_STARTCODE){

            printf("startcode: %3X ", startcode);

            if     (startcode<=0x11F) printf("Video Object Start");

            else if(startcode<=0x12F) printf("Video Object Layer Start");

            else if(startcode<=0x13F) printf("Reserved");

            else if(startcode<=0x15F) printf("FGS bp start");

            else if(startcode<=0x1AF) printf("Reserved");

            else if(startcode==0x1B0) printf("Visual Object Seq Start");

            else if(startcode==0x1B1) printf("Visual Object Seq End");

            else if(startcode==0x1B2) printf("User Data");

            else if(startcode==0x1B3) printf("Group of VOP start");

            else if(startcode==0x1B4) printf("Video Session Error");

            else if(startcode==0x1B5) printf("Visual Object Start");

            else if(startcode==0x1B6) printf("Video Object Plane start");

            else if(startcode==0x1B7) printf("slice start");

            else if(startcode==0x1B8) printf("extension start");

            else if(startcode==0x1B9) printf("fgs start");

            else if(startcode==0x1BA) printf("FBA Object start");

            else if(startcode==0x1BB) printf("FBA Object Plane start");

            else if(startcode==0x1BC) printf("Mesh Object start");

            else if(startcode==0x1BD) printf("Mesh Object Plane start");

            else if(startcode==0x1BE) printf("Still Textutre Object start");

            else if(startcode==0x1BF) printf("Textutre Spatial Layer start");

            else if(startcode==0x1C0) printf("Textutre SNR Layer start");

            else if(startcode==0x1C1) printf("Textutre Tile start");

            else if(startcode==0x1C2) printf("Textutre Shape Layer start");

            else if(startcode==0x1C3) printf("stuffing start");

            else if(startcode<=0x1C5) printf("reserved");

            else if(startcode<=0x1FF) printf("System start");

            printf(" at %d\n", get_bits_count(gb));

        }

        switch(startcode){

        case 0x120:

            decode_vol_header(s, gb);

            break;

        case USER_DATA_STARTCODE:

            decode_user_data(s, gb);

            break;

        case GOP_STARTCODE:

            mpeg4_decode_gop_header(s, gb);

            break;

        case VOP_STARTCODE:

            return decode_vop_header(s, gb);

        default:

            break;

        }

        align_get_bits(gb);

        startcode = 0xff;

    }

}


static void mpegvideo_extract_headers(AVCodecParserContext *s,

                                      AVCodecContext *avctx,

                                      const uint8_t *buf, int buf_size)

{

    ParseContext1 *pc = s->priv_data;

    const uint8_t *buf_end;

    const uint8_t *buf_start= buf;

    uint32_t start_code;

    int frame_rate_index, ext_type, bytes_left;

    int frame_rate_ext_n, frame_rate_ext_d;

    int picture_structure, top_field_first, repeat_first_field, progressive_frame;

    int horiz_size_ext, vert_size_ext, bit_rate_ext;

//FIXME replace the crap with get_bits()

    s->repeat_pict = 0;

    buf_end = buf + buf_size;

    while (buf < buf_end) {

        start_code= -1;

        buf= ff_find_start_code(buf, buf_end, &start_code);

        bytes_left = buf_end - buf;

        switch(start_code) {

        case PICTURE_START_CODE:

            ff_fetch_timestamp(s, buf-buf_start-4, 1);

            if (bytes_left >= 2) {

                s->pict_type = (buf[1] >> 3) & 7;

            }

            break;

        case SEQ_START_CODE:

            if (bytes_left >= 7) {

                pc->width  = (buf[0] << 4) | (buf[1] >> 4);

                pc->height = ((buf[1] & 0x0f) << 8) | buf[2];

                avcodec_set_dimensions(avctx, pc->width, pc->height);

                frame_rate_index = buf[3] & 0xf;

                pc->frame_rate.den = avctx->time_base.den = ff_frame_rate_tab[frame_rate_index].num;

                pc->frame_rate.num = avctx->time_base.num = ff_frame_rate_tab[frame_rate_index].den;

                avctx->bit_rate = ((buf[4]<<10) | (buf[5]<<2) | (buf[6]>>6))*400;

                avctx->codec_id = CODEC_ID_MPEG1VIDEO;

                avctx->sub_id = 1;

            }

            break;

        case EXT_START_CODE:

            if (bytes_left >= 1) {

                ext_type = (buf[0] >> 4);

                switch(ext_type) {

                case 0x1: /* sequence extension */

                    if (bytes_left >= 6) {

                        horiz_size_ext = ((buf[1] & 1) << 1) | (buf[2] >> 7);

                        vert_size_ext = (buf[2] >> 5) & 3;

                        bit_rate_ext = ((buf[2] & 0x1F)<<7) | (buf[3]>>1);

                        frame_rate_ext_n = (buf[5] >> 5) & 3;

                        frame_rate_ext_d = (buf[5] & 0x1f);

                        pc->progressive_sequence = buf[1] & (1 << 3);

                        avctx->has_b_frames= !(buf[5] >> 7);

                        pc->width  |=(horiz_size_ext << 12);

                        pc->height |=( vert_size_ext << 12);

                        avctx->bit_rate += (bit_rate_ext << 18) * 400;

                        avcodec_set_dimensions(avctx, pc->width, pc->height);

                        avctx->time_base.den = pc->frame_rate.den * (frame_rate_ext_n + 1) * 2;

                        avctx->time_base.num = pc->frame_rate.num * (frame_rate_ext_d + 1);

                        avctx->codec_id = CODEC_ID_MPEG2VIDEO;

                        avctx->sub_id = 2; /* forces MPEG2 */

                    }

                    break;

                case 0x8: /* picture coding extension */

                    if (bytes_left >= 5) {

                        picture_structure = buf[2]&3;

                        top_field_first = buf[3] & (1 << 7);

                        repeat_first_field = buf[3] & (1 << 1);

                        progressive_frame = buf[4] & (1 << 7);

                        /* check if we must repeat the frame */

                        s->repeat_pict = 1;

                        if (repeat_first_field) {

                            if (pc->progressive_sequence) {

                                if (top_field_first)

                                    s->repeat_pict = 5;

                                else

                                    s->repeat_pict = 3;

                            } else if (progressive_frame) {

                                s->repeat_pict = 2;

                            }

                        }

                    }

                    break;

                }

            }

            break;

        case -1:

            goto the_end;

        default:

            /* we stop parsing when we encounter a slice. It ensures

               that this function takes a negligible amount of time */

            if (start_code >= SLICE_MIN_START_CODE &&

                start_code <= SLICE_MAX_START_CODE)

                goto the_end;

            break;

        }

    }

 the_end: ;

}


static int set_chroma_format(AVCodecContext *avctx)

{

    int num_formats = sizeof(schro_pixel_format_map) /

                      sizeof(schro_pixel_format_map[0]);

    int idx;

    SchroEncoderParams *p_schro_params = avctx->priv_data;

    for (idx = 0; idx < num_formats; ++idx) {

        if (schro_pixel_format_map[idx].ff_pix_fmt == avctx->pix_fmt) {

            p_schro_params->format->chroma_format =

                            schro_pixel_format_map[idx].schro_pix_fmt;

            return 0;

        }

    }

    av_log(avctx, AV_LOG_ERROR,

           "This codec currently only supports planar YUV 4:2:0, 4:2:2"

           " and 4:4:4 formats.\n");

    return -1;

}


IEEE_ARITH2(sqrtt)

IEEE_ARITH2(cvtst)

IEEE_ARITH2(cvtts)

static void gen_cvttq(DisasContext *ctx, int rb, int rc, int fn11)

{

    TCGv vb, vc;

    /* No need to set flushzero, since we have an integer output.  */

    vb = gen_ieee_input(ctx, rb, fn11, 0);

    vc = dest_fpr(ctx, rc);

    /* Almost all integer conversions use cropped rounding, and most

       also do not have integer overflow enabled.  Special case that.  */

    switch (fn11) {

    case QUAL_RM_C:

        gen_helper_cvttq_c(vc, cpu_env, vb);

        break;

    case QUAL_V | QUAL_RM_C:

    case QUAL_S | QUAL_V | QUAL_RM_C:

    case QUAL_S | QUAL_V | QUAL_I | QUAL_RM_C:

        gen_helper_cvttq_svic(vc, cpu_env, vb);

        break;

    default:

        gen_qual_roundmode(ctx, fn11);

        gen_helper_cvttq(vc, cpu_env, vb);

        break;

    }

    gen_fp_exc_raise(rc, fn11);

}


static int virtio_serial_device_exit(DeviceState *dev)

{

    VirtIOSerial *vser = VIRTIO_SERIAL(dev);

    VirtIODevice *vdev = VIRTIO_DEVICE(dev);

    unregister_savevm(dev, "virtio-console", vser);

    g_free(vser->ivqs);

    g_free(vser->ovqs);

    g_free(vser->ports_map);

    if (vser->post_load) {

        g_free(vser->post_load->connected);

        timer_del(vser->post_load->timer);

        timer_free(vser->post_load->timer);

        g_free(vser->post_load);

    }

    virtio_cleanup(vdev);

    return 0;

}


int kvm_arch_init_vcpu(CPUState *cenv)

{

    int ret = 0;

    struct kvm_sregs sregs;

    sregs.pvr = cenv->spr[SPR_PVR];

    ret = kvm_vcpu_ioctl(cenv, KVM_SET_SREGS, &sregs);

    idle_timer = qemu_new_timer_ns(vm_clock, kvm_kick_env, cenv);

    return ret;

}


static void virtio_queue_notify_vq(VirtQueue *vq)
{
    if (vq->vring.desc && vq->handle_output) {
        VirtIODevice *vdev = vq->vdev;
        trace_virtio_queue_notify(vdev, vq - vdev->vq, vq);
        vq->handle_output(vdev, vq);


static av_cold int mp_decode_init(AVCodecContext *avctx)

{

    MotionPixelsContext *mp = avctx->priv_data;

    int w4 = (avctx->width  + 3) & ~3;

    int h4 = (avctx->height + 3) & ~3;

    if(avctx->extradata_size < 2){

        av_log(avctx, AV_LOG_ERROR, "extradata too small\n");

        return AVERROR_INVALIDDATA;

    }

    motionpixels_tableinit();

    mp->avctx = avctx;

    ff_dsputil_init(&mp->dsp, avctx);

    mp->changes_map = av_mallocz(avctx->width * h4);

    mp->offset_bits_len = av_log2(avctx->width * avctx->height) + 1;

    mp->vpt = av_mallocz(avctx->height * sizeof(YuvPixel));

    mp->hpt = av_mallocz(h4 * w4 / 16 * sizeof(YuvPixel));

    avctx->pix_fmt = AV_PIX_FMT_RGB555;

    avcodec_get_frame_defaults(&mp->frame);

    return 0;

}


static void put_payload_header(

                                AVFormatContext *s,

                                ASFStream       *stream,

                                int             presentation_time,

                                int             m_obj_size,

                                int             m_obj_offset,

                                int             payload_len

            )

{

    ASFContext *asf = s->priv_data;

    ByteIOContext *pb = &asf->pb;

    int val;

    val = stream->num;

    if (s->streams[val - 1]->codec.coded_frame->key_frame)

        val |= ASF_PL_FLAG_KEY_FRAME;

    put_byte(pb, val);

    put_byte(pb, stream->seq);  //Media object number

    put_le32(pb, m_obj_offset); //Offset Into Media Object

    // Replicated Data shall be at least 8 bytes long.

    // The first 4 bytes of data shall contain the

    // Size of the Media Object that the payload belongs to.

    // The next 4 bytes of data shall contain the

    // Presentation Time for the media object that the payload belongs to.

    put_byte(pb, ASF_PAYLOAD_REPLICATED_DATA_LENGTH);

    put_le32(pb, m_obj_size);       //Replicated Data - Media Object Size

    put_le32(pb, presentation_time);//Replicated Data - Presentation Time

    if (asf->multi_payloads_present){

        put_le16(pb, payload_len);   //payload length

    }

}


static int pcm_encode_frame(AVCodecContext *avctx,

			    unsigned char *frame, int buf_size, void *data)

{

    int n, sample_size, v;

    short *samples;

    unsigned char *dst;

    switch(avctx->codec->id) {

    case CODEC_ID_PCM_S16LE:

    case CODEC_ID_PCM_S16BE:

    case CODEC_ID_PCM_U16LE:

    case CODEC_ID_PCM_U16BE:

        sample_size = 2;

        break;

    default:

        sample_size = 1;

        break;

    }

    n = buf_size / sample_size;

    samples = data;

    dst = frame;

    switch(avctx->codec->id) {

    case CODEC_ID_PCM_S16LE:

        for(;n>0;n--) {

            v = *samples++;

            dst[0] = v & 0xff;

            dst[1] = v >> 8;

            dst += 2;

        }

        break;

    case CODEC_ID_PCM_S16BE:

        for(;n>0;n--) {

            v = *samples++;

            dst[0] = v >> 8;

            dst[1] = v;

            dst += 2;

        }

        break;

    case CODEC_ID_PCM_U16LE:

        for(;n>0;n--) {

            v = *samples++;

            v += 0x8000;

            dst[0] = v & 0xff;

            dst[1] = v >> 8;

            dst += 2;

        }

        break;

    case CODEC_ID_PCM_U16BE:

        for(;n>0;n--) {

            v = *samples++;

            v += 0x8000;

            dst[0] = v >> 8;

            dst[1] = v;

            dst += 2;

        }

        break;

    case CODEC_ID_PCM_S8:

        for(;n>0;n--) {

            v = *samples++;

            dst[0] = (v + 128) >> 8;

            dst++;

        }

        break;

    case CODEC_ID_PCM_U8:

        for(;n>0;n--) {

            v = *samples++;

            dst[0] = ((v + 128) >> 8) + 128;

            dst++;

        }

        break;

    case CODEC_ID_PCM_ALAW:

        for(;n>0;n--) {

            v = *samples++;

            dst[0] = linear_to_alaw[(v + 32768) >> 2];

            dst++;

        }

        break;

    case CODEC_ID_PCM_MULAW:

        for(;n>0;n--) {

            v = *samples++;

            dst[0] = linear_to_ulaw[(v + 32768) >> 2];

            dst++;

        }

        break;

    default:

        return -1;

    }

    avctx->key_frame = 1;

    //avctx->frame_size = (dst - frame) / (sample_size * avctx->channels);

    return dst - frame;

}


static inline void hScale_altivec_real(int16_t *dst, int dstW, uint8_t *src, int srcW, int xInc, int16_t *filter, int16_t *filterPos, int filterSize) {

  register int i;

  int __attribute__ ((aligned (16))) tempo[4];

  if (filterSize % 4) {

    for(i=0; i<dstW; i++) {

      register int j;

      register int srcPos = filterPos[i];

      register int val = 0;

      for(j=0; j<filterSize; j++) {

	val += ((int)src[srcPos + j])*filter[filterSize*i + j];

      }

      dst[i] = av_clip(val>>7, 0, (1<<15)-1);

    }

  }

  else

  switch (filterSize) {

  case 4:

    {

      for(i=0; i<dstW; i++) {

	register int srcPos = filterPos[i];

	vector unsigned char src_v0 = vec_ld(srcPos, src);

	vector unsigned char src_v1, src_vF;

	vector signed short src_v, filter_v;

	vector signed int val_vEven, val_s;

	if ((((int)src + srcPos)% 16) > 12) {

	  src_v1 = vec_ld(srcPos + 16, src);

	}

	src_vF = vec_perm(src_v0, src_v1, vec_lvsl(srcPos, src));

	src_v = // vec_unpackh sign-extends...

	  (vector signed short)(vec_mergeh((vector unsigned char)vzero, src_vF));

	// now put our elements in the even slots

	src_v = vec_mergeh(src_v, (vector signed short)vzero);

	filter_v = vec_ld(i << 3, filter);

        // the 3 above is 2 (filterSize == 4) + 1 (sizeof(short) == 2)

        // the neat trick : we only care for half the elements,

        // high or low depending on (i<<3)%16 (it's 0 or 8 here),

        // and we're going to use vec_mule, so we chose

        // carefully how to "unpack" the elements into the even slots

	if ((i << 3) % 16)

	  filter_v = vec_mergel(filter_v,(vector signed short)vzero);

	else

	  filter_v = vec_mergeh(filter_v,(vector signed short)vzero);

	val_vEven = vec_mule(src_v, filter_v);

	val_s = vec_sums(val_vEven, vzero);

	vec_st(val_s, 0, tempo);

	dst[i] = av_clip(tempo[3]>>7, 0, (1<<15)-1);

      }

    }

    break;

  case 8:

    {

      for(i=0; i<dstW; i++) {

	register int srcPos = filterPos[i];

	vector unsigned char src_v0 = vec_ld(srcPos, src);

	vector unsigned char src_v1, src_vF;

	vector signed short src_v, filter_v;

	vector signed int val_v, val_s;

	if ((((int)src + srcPos)% 16) > 8) {

	  src_v1 = vec_ld(srcPos + 16, src);

	}

	src_vF = vec_perm(src_v0, src_v1, vec_lvsl(srcPos, src));

	src_v = // vec_unpackh sign-extends...

	  (vector signed short)(vec_mergeh((vector unsigned char)vzero, src_vF));

	filter_v = vec_ld(i << 4, filter);

        // the 4 above is 3 (filterSize == 8) + 1 (sizeof(short) == 2)

	val_v = vec_msums(src_v, filter_v, (vector signed int)vzero);

	val_s = vec_sums(val_v, vzero);

	vec_st(val_s, 0, tempo);

	dst[i] = av_clip(tempo[3]>>7, 0, (1<<15)-1);

      }

    }

    break;

  case 16:

    {

      for(i=0; i<dstW; i++) {

	register int srcPos = filterPos[i];

	vector unsigned char src_v0 = vec_ld(srcPos, src);

	vector unsigned char src_v1 = vec_ld(srcPos + 16, src);

	vector unsigned char src_vF = vec_perm(src_v0, src_v1, vec_lvsl(srcPos, src));

	vector signed short src_vA = // vec_unpackh sign-extends...

	  (vector signed short)(vec_mergeh((vector unsigned char)vzero, src_vF));

	vector signed short src_vB = // vec_unpackh sign-extends...

	  (vector signed short)(vec_mergel((vector unsigned char)vzero, src_vF));

	vector signed short filter_v0 = vec_ld(i << 5, filter);

       	vector signed short filter_v1 = vec_ld((i << 5) + 16, filter);

        // the 5 above are 4 (filterSize == 16) + 1 (sizeof(short) == 2)

	vector signed int val_acc = vec_msums(src_vA, filter_v0, (vector signed int)vzero);

	vector signed int val_v = vec_msums(src_vB, filter_v1, val_acc);

	vector signed int val_s = vec_sums(val_v, vzero);

	vec_st(val_s, 0, tempo);

	dst[i] = av_clip(tempo[3]>>7, 0, (1<<15)-1);

      }

    }

    break;

  default:

    {

      for(i=0; i<dstW; i++) {

	register int j;

	register int srcPos = filterPos[i];

        vector signed int val_s, val_v = (vector signed int)vzero;

	vector signed short filter_v0R = vec_ld(i * 2 * filterSize, filter);

        vector unsigned char permF = vec_lvsl((i * 2 * filterSize), filter);

        vector unsigned char src_v0 = vec_ld(srcPos, src);

        vector unsigned char permS = vec_lvsl(srcPos, src);

        for (j = 0 ; j < filterSize - 15; j += 16) {

          vector unsigned char src_v1 = vec_ld(srcPos + j + 16, src);

          vector unsigned char src_vF = vec_perm(src_v0, src_v1, permS);

          vector signed short src_vA = // vec_unpackh sign-extends...

            (vector signed short)(vec_mergeh((vector unsigned char)vzero, src_vF));

          vector signed short src_vB = // vec_unpackh sign-extends...

            (vector signed short)(vec_mergel((vector unsigned char)vzero, src_vF));

          vector signed short filter_v1R = vec_ld((i * 2 * filterSize) + (j * 2) + 16, filter);

          vector signed short filter_v2R = vec_ld((i * 2 * filterSize) + (j * 2) + 32, filter);

          vector signed short filter_v0 = vec_perm(filter_v0R, filter_v1R, permF);

          vector signed short filter_v1 = vec_perm(filter_v1R, filter_v2R, permF);

          vector signed int val_acc = vec_msums(src_vA, filter_v0, val_v);

          val_v = vec_msums(src_vB, filter_v1, val_acc);

          filter_v0R = filter_v2R;

          src_v0 = src_v1;

        }

        if (j < (filterSize-7)) {

          // loading src_v0 is useless, it's already done above

          //vector unsigned char src_v0 = vec_ld(srcPos + j, src);

          vector unsigned char src_v1, src_vF;

          vector signed short src_v, filter_v1R, filter_v;

          if ((((int)src + srcPos)% 16) > 8) {

            src_v1 = vec_ld(srcPos + j + 16, src);

          }

          src_vF = vec_perm(src_v0, src_v1, permS);

          src_v = // vec_unpackh sign-extends...

            (vector signed short)(vec_mergeh((vector unsigned char)vzero, src_vF));

          // loading filter_v0R is useless, it's already done above

          //vector signed short filter_v0R = vec_ld((i * 2 * filterSize) + j, filter);

          filter_v1R = vec_ld((i * 2 * filterSize) + (j * 2) + 16, filter);

          filter_v = vec_perm(filter_v0R, filter_v1R, permF);

          val_v = vec_msums(src_v, filter_v, val_v);

        }

        val_s = vec_sums(val_v, vzero);

        vec_st(val_s, 0, tempo);

        dst[i] = av_clip(tempo[3]>>7, 0, (1<<15)-1);

      }

    }

  }

}


void ppc_store_xer (CPUPPCState *env, uint32_t value)

{

    xer_so = (value >> XER_SO) & 0x01;

    xer_ov = (value >> XER_OV) & 0x01;

    xer_ca = (value >> XER_CA) & 0x01;

    xer_cmp = (value >> XER_CMP) & 0xFF;

    xer_bc = (value >> XER_BC) & 0x3F;

}


static void property_get_enum(Object *obj, Visitor *v, void *opaque,

                              const char *name, Error **errp)

{

    EnumProperty *prop = opaque;

    int value;

    value = prop->get(obj, errp);

    visit_type_enum(v, &value, prop->strings, NULL, name, errp);

}


static int path_has_protocol(const char *path)

{

#ifdef _WIN32

    if (is_windows_drive(path) ||

        is_windows_drive_prefix(path)) {

        return 0;

    }

#endif

    return strchr(path, ':') != NULL;

}


static int mch_init(PCIDevice *d)

{

    int i;

    MCHPCIState *mch = MCH_PCI_DEVICE(d);

    /* setup pci memory regions */

    memory_region_init_alias(&mch->pci_hole, OBJECT(mch), "pci-hole",

                             mch->pci_address_space,

                             mch->below_4g_mem_size,

                             0x100000000ULL - mch->below_4g_mem_size);

    memory_region_add_subregion(mch->system_memory, mch->below_4g_mem_size,

                                &mch->pci_hole);

    pc_init_pci64_hole(&mch->pci_info, 0x100000000ULL + mch->above_4g_mem_size,

                       mch->pci_hole64_size);

    memory_region_init_alias(&mch->pci_hole_64bit, OBJECT(mch), "pci-hole64",

                             mch->pci_address_space,

                             mch->pci_info.w64.begin,

                             mch->pci_hole64_size);

    if (mch->pci_hole64_size) {

        memory_region_add_subregion(mch->system_memory,

                                    mch->pci_info.w64.begin,

                                    &mch->pci_hole_64bit);

    }

    /* smram */

    cpu_smm_register(&mch_set_smm, mch);

    memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-region",

                             mch->pci_address_space, 0xa0000, 0x20000);

    memory_region_add_subregion_overlap(mch->system_memory, 0xa0000,

                                        &mch->smram_region, 1);

    memory_region_set_enabled(&mch->smram_region, false);

    init_pam(DEVICE(mch), mch->ram_memory, mch->system_memory, mch->pci_address_space,

             &mch->pam_regions[0], PAM_BIOS_BASE, PAM_BIOS_SIZE);

    for (i = 0; i < 12; ++i) {

        init_pam(DEVICE(mch), mch->ram_memory, mch->system_memory, mch->pci_address_space,

                 &mch->pam_regions[i+1], PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE,

                 PAM_EXPAN_SIZE);

    }

    return 0;

}


static int h261_find_frame_end(ParseContext *pc, AVCodecContext* avctx, const uint8_t *buf, int buf_size){

    int vop_found, i, j, bits_left, last_bits;

    uint32_t state;

    H261Context *h = avctx->priv_data;

    if(h){

        bits_left = h->bits_left;

        last_bits = h->last_bits;

    }

    else{

        bits_left = 0;

        last_bits = 0;

    }

    vop_found= pc->frame_start_found;

    state= pc->state;

    if(bits_left!=0 && !vop_found)

        state = state << (8-bits_left) | last_bits;

    i=0;

    if(!vop_found){

        for(i=0; i<buf_size; i++){

            state= (state<<8) | buf[i];

            for(j=0; j<8; j++){

                if(( (  (state<<j)  |  (buf[i]>>(8-j))  )>>(32-20) == 0x10 )&&(((state >> (17-j)) & 0x4000) == 0x0)){

                    i++;

                    vop_found=1;

                    break;

                }

            }

            if(vop_found)

                    break;

        }

    }

    if(vop_found){

        for(; i<buf_size; i++){

            if(avctx->flags & CODEC_FLAG_TRUNCATED)//XXX ffplay workaround, someone a better solution?

                state= (state<<8) | buf[i];

            for(j=0; j<8; j++){

                if(( (  (state<<j)  |  (buf[i]>>(8-j))  )>>(32-20) == 0x10 )&&(((state >> (17-j)) & 0x4000) == 0x0)){

                    pc->frame_start_found=0;

                    pc->state=-1;

                    return i-3;

                }

            }

        }

    }

    pc->frame_start_found= vop_found;

    pc->state= state;

    return END_NOT_FOUND;

}


void address_space_write(AddressSpace *as, target_phys_addr_t addr,

                         const uint8_t *buf, int len)

{

    address_space_rw(as, addr, (uint8_t *)buf, len, true);

}


static void audio_run_capture (AudioState *s)

{

    CaptureVoiceOut *cap;

    for (cap = s->cap_head.lh_first; cap; cap = cap->entries.le_next) {

        int live, rpos, captured;

        HWVoiceOut *hw = &cap->hw;

        SWVoiceOut *sw;

        captured = live = audio_pcm_hw_get_live_out (hw);

        rpos = hw->rpos;

        while (live) {

            int left = hw->samples - rpos;

            int to_capture = audio_MIN (live, left);

            st_sample_t *src;

            struct capture_callback *cb;

            src = hw->mix_buf + rpos;

            hw->clip (cap->buf, src, to_capture);

            mixeng_clear (src, to_capture);

            for (cb = cap->cb_head.lh_first; cb; cb = cb->entries.le_next) {

                cb->ops.capture (cb->opaque, cap->buf,

                                 to_capture << hw->info.shift);

            }

            rpos = (rpos + to_capture) % hw->samples;

            live -= to_capture;

        }

        hw->rpos = rpos;

        for (sw = hw->sw_head.lh_first; sw; sw = sw->entries.le_next) {

            if (!sw->active && sw->empty) {

                continue;

            }

            if (audio_bug (AUDIO_FUNC, captured > sw->total_hw_samples_mixed)) {

                dolog ("captured=%d sw->total_hw_samples_mixed=%d\n",

                       captured, sw->total_hw_samples_mixed);

                captured = sw->total_hw_samples_mixed;

            }

            sw->total_hw_samples_mixed -= captured;

            sw->empty = sw->total_hw_samples_mixed == 0;

        }

    }

}


CharDriverState *qemu_chr_alloc(void)

{

    CharDriverState *chr = g_malloc0(sizeof(CharDriverState));

    return chr;

}


static void ecc_init(target_phys_addr_t base, qemu_irq irq, uint32_t version)

{

    DeviceState *dev;

    SysBusDevice *s;

    dev = qdev_create(NULL, "eccmemctl");

    qdev_prop_set_uint32(dev, "version", version);

    qdev_init(dev);

    s = sysbus_from_qdev(dev);

    sysbus_connect_irq(s, 0, irq);

    sysbus_mmio_map(s, 0, base);

    if (version == 0) { // SS-600MP only

        sysbus_mmio_map(s, 1, base + 0x1000);

    }

}


int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr,

                        uint8_t ar)

{

    CPUS390XState *env = &cpu->env;

    S390PCIBusDevice *pbdev;

    MemoryRegion *mr;

    int i;

    uint32_t fh;

    uint8_t pcias;

    uint8_t len;

    uint8_t buffer[128];

    if (env->psw.mask & PSW_MASK_PSTATE) {

        program_interrupt(env, PGM_PRIVILEGED, 6);

        return 0;

    }

    fh = env->regs[r1] >> 32;

    pcias = (env->regs[r1] >> 16) & 0xf;

    len = env->regs[r1] & 0xff;

    if (pcias > 5) {

        DPRINTF("pcistb invalid space\n");

        setcc(cpu, ZPCI_PCI_LS_ERR);

        s390_set_status_code(env, r1, ZPCI_PCI_ST_INVAL_AS);

        return 0;

    }

    switch (len) {

    case 16:

    case 32:

    case 64:

    case 128:

        break;

    default:

        program_interrupt(env, PGM_SPECIFICATION, 6);

        return 0;

    }

    pbdev = s390_pci_find_dev_by_fh(fh);

    if (!pbdev || !(pbdev->fh & FH_MASK_ENABLE)) {

        DPRINTF("pcistb no pci dev fh 0x%x\n", fh);

        setcc(cpu, ZPCI_PCI_LS_INVAL_HANDLE);

        return 0;

    }

    if (pbdev->lgstg_blocked) {

        setcc(cpu, ZPCI_PCI_LS_ERR);

        s390_set_status_code(env, r1, ZPCI_PCI_ST_BLOCKED);

        return 0;

    }

    mr = pbdev->pdev->io_regions[pcias].memory;

    if (!memory_region_access_valid(mr, env->regs[r3], len, true)) {

        program_interrupt(env, PGM_ADDRESSING, 6);

        return 0;

    }

    if (s390_cpu_virt_mem_read(cpu, gaddr, ar, buffer, len)) {

        return 0;

    }

    for (i = 0; i < len / 8; i++) {

        memory_region_dispatch_write(mr, env->regs[r3] + i * 8,

                                     ldq_p(buffer + i * 8), 8,

                                     MEMTXATTRS_UNSPECIFIED);

    }

    setcc(cpu, ZPCI_PCI_LS_OK);

    return 0;

}


static gboolean monitor_unblocked(GIOChannel *chan, GIOCondition cond,

                                  void *opaque)

{

    monitor_flush(opaque);

    return FALSE;

}


static always_inline void gen_store_spr(int reg, TCGv t)

{

    tcg_gen_st_tl(t, cpu_env, offsetof(CPUState, spr[reg]));

}


int bdrv_is_read_only(BlockDriverState *bs)

{

    return bs->read_only;

}


static void bw_conf1_write(void *opaque, target_phys_addr_t addr,

                           uint64_t val, unsigned size)

{

    PCIBus *b = opaque;

    pci_data_write(b, addr, val, size);

}


void tlb_fill(target_ulong addr, int is_write, int is_user, void *retaddr)

{

    TranslationBlock *tb;

    int ret;

    unsigned long pc;

    CPUX86State *saved_env;

    /* XXX: hack to restore env in all cases, even if not called from

       generated code */

    saved_env = env;

    env = cpu_single_env;

    ret = cpu_x86_handle_mmu_fault(env, addr, is_write, is_user, 1);

    if (ret) {

        if (retaddr) {

            /* now we have a real cpu fault */

            pc = (unsigned long)retaddr;

            tb = tb_find_pc(pc);

            if (tb) {

                /* the PC is inside the translated code. It means that we have

                   a virtual CPU fault */

                cpu_restore_state(tb, env, pc, NULL);

            }

        }

        if (retaddr)

            raise_exception_err(EXCP0E_PAGE, env->error_code);

        else

            raise_exception_err_norestore(EXCP0E_PAGE, env->error_code);

    }

    env = saved_env;

}