File size: 11,991 Bytes
5aefcf4
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
Ticket Name: TDA2: VCOP register allocation failed error while compiling

Query Text:
Part Number: TDA2 Hi, I have written a code in Kernel C for an algorithm. I am trying to compile the code through CCS7.4, but I get the following error while compiling: Can anyone please help me understand why this error is generated? Regards, Shruti

Responses:
Shruti, This means that your loop needs more registers than available register in VCOP. Without looking at the kernel code its difficult to comment more. If you can share your kernel then we can have look at it and comment more. If not then you should check the generated assembly code and see the registers used by the VCOP. Regards, Anshu

Shruti, Were you able to make progress on this issue? If yes, please close this thread. If not then let us know about it. Regards, Anshu

Hi Anshu, Sorry for the late response. I tried looking into the assembly code, but not found any lead. I am attaching my kernel C code here for reference. Can you please have a look at it? sobel.txt /*==========================================================================*/
/*      Copyright (C) 2009-2013 Texas Instruments Incorporated.             */
/*                      All Rights Reserved                                 */
/*==========================================================================*/

/*----------------------------------------------------------------------------*/
/* NAME: eve_sobel_edge_detect                                              */
/*                                                                            */
/*                                                                            */
/* DESCRIPTION:                                                               */
/*                                                                            */
/* The function "eve_sobel_edge_detect" takes input image                     */
/* inptr, and runs the sobel operator on it and writes it out to              */
/* the output array "optr". The input and output arrays are 2D arrays         */
/* of the form [width * height].                                              */
/*                                                                            */
/* The function has the following prototype:                                  */
/*                                                                            */
/* void eve_sobel_edge_detect                                                 */
/* (                                                                          */
/*    __vptr_uint8  inptr,            // input data pointer                   */
/*    __vptr_uint8  optr,             // output data pointer                  */
/*    unsigned int width,           // width of input image                   */
/*    unsigned int height           // height of input image                  */
/* )                                                                          */
/*                                                                            */
/*----------------------------------------------------------------------------*/

#define ELEMSZ           sizeof(*inptr)
#define VECTORSZ        (VCOP_SIMD_WIDTH*ELEMSZ)
#define ELEMSZ_OUT       sizeof(*optr)
#define VECTORSZ_OUT     (VCOP_SIMD_WIDTH * ELEMSZ_OUT)
#define VCOP_2SIMD_WIDTH    (2 * VCOP_SIMD_WIDTH)

void vcop_detectEdge(
__vptr_uint8  inptr,
__vptr_uint8  optr,
__vptr_uint8 intsumx,
unsigned int width,
unsigned int height)
{
  __vector Vin, Vin1;
  __vector Vout, Vout1;
  __vector Vreg1, Vreg11;
  __vector Vreg2, Vreg12;
  __vector Vreg3, Vreg13;
  __vector Vreg4, Vreg14;
  __vector Vreg5, Vreg15;
  __vector Vsumx, Vsumx1;
  __vector Vsumy, Vsumy1;
  
  __vector Vshift = -1;
  __vector Vin01, Vin02;
  __vector Vin03, Vin13;
  __vector Vin04, Vin14;


  for(int Irow = 0; Irow < (height - 2); Irow++)
  {
      for(int Icol = 0; Icol < (width / VCOP_2SIMD_WIDTH); Icol++)
      {
        __agen addr;
        addr = Irow * (width * ELEMSZ) + Icol* (VCOP_SIMD_WIDTH* ELEMSZ);

        (Vin, Vin1) = inptr[addr].deinterleave();
        (Vreg1, Vreg11) = (inptr + (2*width) +(2 * sizeof(*inptr)))[addr].deinterleave();
        Vreg1 = Vreg1 - Vin;
        Vreg11 = Vreg11 - Vin1;

        (Vreg2, Vreg12) = (inptr + (2*width))[addr].deinterleave();
        (Vreg3, Vreg13) = (inptr + (2*sizeof(*inptr)))[addr].deinterleave();
        Vreg3 = Vreg3 - Vreg2;
        Vreg13 = Vreg13 - Vreg12;

        (Vreg4, Vreg14) = (inptr + width)[addr].deinterleave();
        (Vreg5, Vreg15) = (inptr + width + (2 * sizeof(*inptr)))[addr].deinterleave();

       // Vtemp1 = Vreg4 + Vreg4;
        Vreg14 += Vreg14;
        Vsumx = Vreg5 + Vreg5;
        Vsumx -= Vreg4;// - Vreg4
        Vsumx -= Vreg4;

        Vreg15 += Vreg15;

        //Vsumx = Vtemp2 - Vtemp1;
        Vsumx += Vreg1 + Vreg3;

        Vsumx1 = Vreg15 - Vreg14;
        Vsumx1 = Vreg11 + Vreg13;
        //Vsumx1 = Vtemp12 - Vtemp11;


        //Vsumx += Vdata2;

        Vsumx = abs(Vsumx);
        Vsumx1 = abs(Vsumx1);

        (intsumx + width + sizeof(*inptr))[addr].interleave() = (Vsumx, Vsumx1);
        //(optr + width + sizeof(*inptr))[addr] = Vsumx;
      }
  }


  for(int Irow = 0; Irow < (height - 2); Irow++)
  {
      for(int Icol = 0; Icol < (width / VCOP_2SIMD_WIDTH); Icol++)
      {
          __agen addr;
          addr = Irow * (width * ELEMSZ) + Icol* (2 * VCOP_SIMD_WIDTH * ELEMSZ);

          (Vsumx, Vsumx1) = (intsumx + width + sizeof(*inptr))[addr].deinterleave();
          (Vin, Vin1) = inptr[addr].deinterleave();
          (Vreg1, Vreg11) = (inptr + (2*width) +(2 * sizeof(*inptr)))[addr].deinterleave();

          Vreg1 = Vreg1 - Vin;
          Vreg11 = Vreg11 - Vin1;


          (Vreg2, Vreg12) = (inptr + (2*width))[addr].deinterleave();
          (Vreg3, Vreg13) = (inptr + (2*sizeof(*inptr)))[addr].deinterleave();
          Vreg3 = Vreg3 - Vreg2;
          Vreg13 = Vreg13 - Vreg12;

          (Vreg4, Vreg14) = (inptr + (sizeof(*inptr)))[addr].deinterleave();
          (Vreg5, Vreg15) = (inptr + (2*width) + (sizeof(*inptr)))[addr].deinterleave();

          Vreg4 += Vreg4;
          Vreg14 += Vreg14;

          Vreg5 += Vreg5;
          Vreg15 += Vreg15;

          Vreg4 -= Vreg5;
          Vreg14 -= Vreg15;

          Vreg1 -= Vreg3;
          Vreg1-= Vreg4;

          Vreg11 -= Vreg13;
          Vreg11 -= Vreg14;

          Vreg1 = abs(Vreg1);
          Vreg11 = abs(Vreg11);


          Vout = Vsumx + Vreg1;
          Vout1 = Vsumx1 + Vreg11;

          Vout = Vout << Vshift;
          Vout1 = Vout1 << Vshift;

         // Vsumy = Vout << Vshift;
          //Vsumy1 = Vout1 << Vshift;


          //(optr + width + sizeof(*inptr))[addr].interleave() = (Vsumy, Vsumy1);
          (optr + width + sizeof(*inptr))[addr].interleave() = (Vout, Vout1);
      }
  }

  for(int col= 0;col < height-1; col++)
               {
                   __agen AddrIn  = col* width *ELEMSZ;
                   __agen AddrOut = col*width *ELEMSZ_OUT;

                   Vin01= (optr + (width+1) * sizeof(*optr))[AddrIn].onept();
                   Vin02= (optr+(2*width-2)*sizeof(*optr))[AddrIn].onept();

                   (optr + width  * sizeof(*optr))[AddrOut].onept() = Vin01;
                   (optr+(2*width)-sizeof(*optr))[AddrOut].onept() = Vin02;

               }

               for(int col = 0; col < width/VCOP_2SIMD_WIDTH; col++)

               {

                 __agen Addr1= col*(2 * VECTORSZ_OUT);
                 (Vin03, Vin13) = (optr+width)[Addr1].deinterleave();
                 (Vin04, Vin14) = (optr+width *(height-2))[Addr1].deinterleave();

               (optr)[Addr1].interleave() = (Vin03, Vin13);
               (optr+width*(height-1))[Addr1].interleave() = (Vin04, Vin14);
               }

#if 0
  for(int Irow = 0; Irow < (height); Irow++)
  {
      for(int Icol = 0; Icol < (width / VCOP_SIMD_WIDTH); Icol++)
      {
        __agen addr;
        addr = Irow * (width * ELEMSZ) + Icol* (VCOP_SIMD_WIDTH* ELEMSZ);

        Vin = inptr[addr];
        Vreg1 = (inptr +(2 * sizeof(*inptr)))[addr];
        Vdata1 = Vreg1 - Vin;

        Vreg2 = (inptr + (width*2))[addr];
        Vreg3 = (inptr + (width*2) + (2 * sizeof(*inptr)))[addr];
        Vdata2 = Vreg3 - Vreg2;

        Vreg4 = (inptr + width)[addr];
        Vreg5 = (inptr + width + (2 * sizeof(*inptr)))[addr];

        Vtemp1 = Vreg4 + Vreg4;
        Vtemp2 = Vreg5 + Vreg5;

        Vsumx = Vtemp2 - Vtemp1;
        Vsumx += Vdata1 + Vdata2;
        //Vsumx += Vdata2;

        Vsumx = abs(Vsumx);

        intsumx[addr] = Vsumx;
      }
  }
  for(int Irow = 0; Irow < (height); Irow++)
  {
      for(int Icol = 0; Icol < (width / VCOP_SIMD_WIDTH); Icol++)
      {
        __agen addr;
        addr = Irow * (width * ELEMSZ) + Icol* (VCOP_SIMD_WIDTH* ELEMSZ);

        Vsumx = intsumx[addr];
        Vin = inptr[addr];
        Vreg1 = (inptr + (width*2))[addr];
        Vdata1 = Vreg1 - Vin;

        Vreg2 = (inptr + (2*sizeof(*inptr)))[addr];
        Vreg3 = (inptr + (width*2) + (2*sizeof(*inptr)))[addr];
        Vdata2 = Vreg3 - Vreg2;

        Vreg4 = (inptr + (sizeof(*inptr)))[addr];
        Vreg5 = (inptr + (width*2) + (sizeof(*inptr)))[addr];

        Vtemp1 = Vreg4 + Vreg4;
        Vtemp2 = Vreg5 + Vreg5;

        Vsumy = Vtemp2 - vtemp1;
        Vsumy+=Vdata1;
        Vsumy+=Vdata2;

        Vsumy = abs(Vsumy);

        Vout = Vsumx + Vsumy;
        Vout = Vout << Vshift;

        outptr[addr] = Vout;
      }
  }
#endif
}

 The code is for the Sobel edge detection algorithm. The commented part is the original algorithm, which is later converted to interleaved format. Regards, Shruti

Shruti, I tried compiling the code you shared and I don't see any build error. Following are my compiler options. Can you make sure the compiler options are the same : C:\ti\ccsv7.3\tools\compiler\arp32_1.0.9\bin\cl-arp32 -g --opt_for_speed=5 -kh --silicon_version=v210 -lu --display_error_number --diag_suppress=26066 --diag_suppress=10063 -IC:\ti\ccsv7.3\tools\compiler\arp32_1.0.9\include -IC:\ti\ccsv7.3\tools\compiler\arp32_1.0.9\include\vcop -I"..\inc" -I"..\..\..\inc" --temp_directory="..\..\..\inc" --obj_directory="..\src_kernelC" ..\src_kernelC\vcop_sobel_xy_kernel.k Regards, Anshu

Hi Anshu, There are few differences in my compiler options. Below is my compiler log: "C:\\ti\\ccsv7\\utils\\bin\\gmake" -k -j 4 all -O 'Building file: "../main.c"' 'Invoking: EVE Compiler' "C:/ti/ccsv7/tools/compiler/arp32_1.0.9/bin/cl-arp32" -v210 -g --include_path="C:/ti/ccsv7/tools/compiler/arp32_1.0.9/include/vcop" --include_path="C:/Users/shruti.joshi/workspace_v7/Sobel_interleave" --include_path="C:/ti/ccsv7/tools/compiler/arp32_1.0.9/include" --diag_warning=225 --display_error_number --diag_wrap=off --preproc_with_compile --preproc_dependency="main.d_raw" "../main.c" 'Finished building: "../main.c"' 'Building file: "../sobel.k"' 'Invoking: EVE Compiler' "C:/ti/ccsv7/tools/compiler/arp32_1.0.9/bin/cl-arp32" -v210 -g --include_path="C:/ti/ccsv7/tools/compiler/arp32_1.0.9/include/vcop" --include_path="C:/Users/shruti.joshi/workspace_v7/Sobel_interleave" --include_path="C:/ti/ccsv7/tools/compiler/arp32_1.0.9/include" --diag_warning=225 --display_error_number --diag_wrap=off --preproc_with_compile --preproc_dependency="sobel.d_raw" "../sobel.k" >> Compilation failure subdir_rules.mk:16: recipe for target 'sobel.obj' failed error: VCOP register allocation failed. Please restructure and/or hand-allocate the kernel function. gmake: *** [sobel.obj] Error 1 gmake: Target 'all' not remade because of errors. **** Build Finished **** I will try to match the configurations with yours and let you know the results. Regards, Shruti

Hi Shruti, Were you able to make these compiler option changes? If yes are you still seeing "VCOP register allocation failed" error? Regards, Anshu

Shruti, I am closing this thread as we haven't heard back from you. If required please re-open this thread again. Regards, Anshu