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Ticket Name: TDA3LX: McASP / DISPLAY DRIVE

Query Text:
Part Number: TDA3LX Other Parts Discussed in Thread: TDA2, TDA3LA, DS90UB940-Q1 HELLO HERE WE'RE DESIGNING DISPLAY CONTROL UNIT USING TDA3. AND HAVE SOME QUESTIONS ABOUT McASP AND DISPLAY DRIVE 1. HOW CAN WE ROUTE DIFFERENT AUDIO SOURCE FROM McASP 1 / 2 / 3? IS SOME REGISTER TABLE CONTAINS IN SDK / RTOS ? 2. CAN WE SET EITHER ONE OF McASP BYPASS MODE TO ANOTHER OUT FOR CODEC? 3. HOW CAN WE SET UP RELATIVE VALUES IN M4 DISPLAY CONTROLLER FOR DIMMING UP PANEL TO FIT IN DIFFERENT SPECIFICATION OF DISPLAY?

Responses:
Hi, Which software are you using? The PDK drivers have an example for the audio, which you can refer. Regarding the Display brightness, This is usually controlled by the LCD panel. Which panel are you using? And can you check if it has any brightness programming through any control interface may be I2C. Regards, Prasad

HELLO PRASAD ABOUT WHAT YOU ASKED "WHICH SOFTWARE ARE YOU USING". I'M NOT REALLY SURE WHAT DID YOU MEAN BY THAT. HERE ARE VERY FEW INSTRUCTIONS TO BRING UP TDA3 WITHOUT BUILT-IN ARM A15 CORE AND GPU BUT ONLY LISTED TOOLS IN TI'S WEBSITE AS BELOW: 1. SDK WITH LINUX AND RTOS PURPOSE FOR TDA2 PROCESSOR AT LEAST FOR TDAX WITH BUILT-IN A15 CORE AND GPU WHICH IS NOT SPECIFIC FOR TDA3 1-1. SO MY QUESTION IS WHERE CAN WE GET COMPLETE GUIDELINE FOR TDA3 ESPECIALLY 1-1-1. SYSTEM BRING UP USING TI RTOS 1-1-2. DDR CALIBRATION TOOL 1-1-3. PIN MUX TOOL 2. WHERE IS THE MENTIONED PDK DRIVERS? 2-1. CAN WE USE BUILT-IN DSP AS AUDIO DECODER? (WMA / MP3 / MP4) / OR THE DSP IS DESIGNED PURPOSED ON AUDIO ROUTING / SWITCH ONLY? 3. ABOUT DISPLAY HERE IS IT http://crm.steliau-technology.com/assets/files/spe_technique/G121XGE-L01%20ver%203_0.pdf WHAT WE ASKED IS HOW TO LIGHT UP / DRIVE THE SELECTED DISPLAY? USUALLY HERE NEED A TABLE TO CONFIGURE RELATIVE PARAMETERS IN ACCORDANCE WITH TFT DISPLAY'S SPECIFICATION. IT'S NOT CONTROLLED BY LCD PANEL. IT'S CONTROL BY BACKLIGHT DRIVER TO DECIDE IN VOLTAGE LEVEL OR ADJUSTED IN PROCESSOR. FOR TDA3 CASE BUILT-IN M4 IS INTENDED FOR DISPLAY CONTROL.

HELLO JUST CONFIRM CAN WE USE DISPLAY SUBSYSTEM FOR HORIZONTAL / VERTICAL 90 DEGREE SHIFT? THIS QUESTION IS ALSO POSTED IN FOLLOWING THREAD BUT NO BODY ANSWERED. https://e2e.ti.com/support/processors/f/791/t/789317 WE CURRENTLY DESIGN DISPLAY UNIT WITH 12.1 INCH DISPLAY. THIS DISPLAY IS LANDSCAPE 1024*768 COMPLIANT WITH PORTRAIT (VERTICAL). IT MEANS WE NEED SOC SUPPORT REQUIRED CONVERSION BY DISPLAY SUBSYSTEM OR MAPPING IN MEMORY (DDR). THIS IS VERY IMPORTANT TO US DUE TO OUR DESIGN PURPOSE OF DISPLAY CONTROL.

Hi, The TDA3xx doesnot have the A15 and it doesnot have the linux support. You can use the Vision SDK package which supports TDA3xx with RTOS. The PDK is the driver package and is part of the Vision SDK package. Can you tell the use case you are trying to develope. For the McASP, which audio codec are you using? who is the master? Regards, Prasad

Hello Our Use Case Is A Display Controller Designed With TDA3LA / LX (ACCORDING TO PRODUCT PAGE TDA3LA DESIGNED WITHOUT ISS AND ONLY HAS ONE DSP) Which Must Be Capable Of Processing 2 - 4 CH 1080P Input Video At 60 FPS Frame Rate And Controlling Display For Wanted Orientation (Landscape To Portrait). That Why I Began My Post From The Question About Using DSS (Display Subsystem) Frame Buffer For Mentioned Conversion (90 Degree Rotation). Once DSS Cannot Directly Support Rotation By 90 Degree By Means Of Configurable Size Of Frame Buffer In DDR. Can We Use VIP (Video Port Frame Buffer) / ISS To Do That? Our Most Wanted Use Case Are Listed Below 1. Select Any Of 2 CH Video Input From VIP / MIPI CSI-2 2. Overlay The 2 Video Stream Into One 3. Rotate Video Frames By 90 Degree 4. Memcopy To DSS Frame Buffer 5. OSD Overlay 6. Output In Video Port We May Use FPD-LINK Deserializer / HDMI RX / SD-TV RX / HD-TVI RX Connect To VIP / MIPI-CSI2 Each Time Our System Requires 2 - 4 CH Video Input In The Meantime With 1080P Resolution @60FPS. The 2 CH Video Stream Must Be Overlaid Together (Video Over Video / PIP) Then Be Converted Into 90 Degree From The Original For Portrait Compliant Display. My Question Is 1. Is That Possible For My Use Case With Required Frame Rate / Resolution 2. Does It Perform Well In Target Frame Rate / Resolution 3. If I Need Video Overlay / PIP / OSD Processing The Frame Buffer Size And DMA Should Be The Factor Which May Limit Performance Due To Data Rate. So My Question Is Can I Set The Size Of Frame Buffer? Video Pipeline Supportability? Is DMA Independent With Enough Channels For Fast-To-Memory? FUNCTION MANDATORY FUNCTION POSSIBLE HARDWARE SUPPORTABILITY POSSIBLE PROCESS VIDEO OVERLAY (2 VIDEO) ISS DDR ON-THE-FLY (IN FRAME BUFFER) VIDEO OVERLAY (2 VIDEO) DSS DDR ON-THE-FLY (IN FRAME BUFFER) IMAGE OVERLAY (GRAPHIC / VIDEO) DSS DDR ON-THE-FLY (IN FRAME BUFFER) ROTATION (90 DEGREE) ISS / EVE DDR ON-THE-FLY (IN FRAME BUFFER) RESIZE / SCALER DSS DDR ON-THE-FLY (IN FRAME BUFFER) DISPLAY DRIVE DSS DISPLAY CONTROLLER DEVICE LIST EACH DEVICE REQUIRE LOAD TABLE AND INITIATION (I2C) VIDEO DEVICE INPUT INTERFACE DUAL PORT FPD-LINK TTL 24BIT / YUV422 MIPI-CSI2 1X HDMI RECEIVER TTL 24BIT / YUV422 MIPI-CSI2 / LVDS 4X HD-TVI RECEIVER TTL 24BIT / YUV422 MIPI-CSI2 4X S-VIDEO RECEIVER TTL 24BIT / YUV422 MIPI-CSI2 HERE IS MY ANOTHER POST FOR SAME QUESTION https://e2e.ti.com/support/processors/f/791/p/789317/2932161?tisearch=e2e-sitesearch&keymatch=%252520user%25253A219093#2932161 YOU CAN SEE BLOCK DIAGRAM IN THE POST.

Hi Bright I believe the flow for you would be as below: ISS Capture (4 Ch 1080p capture RGB) --> Select 2 channels --> Resize 2 channels (60 FPS - assume 1/2 resizing) --> Overlay 2 channels --> Buffer rotate with EDMA --> Display with DSS To answer your original question regarding what software you can use to do this. You can download the Processor SDK Vision which supports TDA3x and also have examples for ISS capture and display and being able to select channels and resize them. You would need to create a custom link on top of Processor SDK vision to rotate the image by 90 deg as this is something that is not supported by any hardware block in TDA3x. The SDK can be downloaded from http://software-dl.ti.com/processor-sdk-vision/esd/TDAx/vision-sdk/latest/index_FDS.html 1-1-1. SYSTEM BRING UP USING TI RTOS - This package contains the TI-RTOS support to bring up the system 2. WHERE IS THE MENTIONED PDK DRIVERS? - This package contains the PDK drivers. 1-1-2. DDR CALIBRATION TOOL - http://www.ti.com/lit/an/sprac36e/sprac36e.pdf - This mentions TDA2x but this also supports TDA3x family of devices. 1-1-3. PIN MUX TOOL : The pin mux tool can be accessed from http://www.ti.com/tool/PINMUXTOOL 2-1. CAN WE USE BUILT-IN DSP AS AUDIO DECODER? (WMA / MP3 / MP4) / OR THE DSP IS DESIGNED PURPOSED ON AUDIO ROUTING / SWITCH ONLY? The DSP can be used as an audio decoder as well. You would need to have software libraries which support the decoding operation. https://processors.wiki.ti.com/index.php/Software_libraries#Codecs 3. ABOUT DISPLAY: You would need to drive the input of the LCD from the DSS and the M4 would be responsible to program the clocking for the DSS corresponding to the timing requirements for this LCD. CAN WE USE DISPLAY SUBSYSTEM FOR HORIZONTAL / VERTICAL 90 DEGREE SHIFT? No DSS does not support 90 deg shift. This needs to be done using EDMA. The system performance is sufficient for your usecase in terms of DDR performance. Where you would struggle in the current flow is ISS hardware base resizing of 2 channels of 1080p. If you can resize only one channel then you should be able to fit it in the ISS hardware. Also note the ISS resizer works with input of YUV422 images. So if you are inputting RGB565 you would need an additional color space conversion from RGB565 to YUV422 to use the ISS resizer. Stage H W FPS Num Bytes per pixel Number of Channels DDR Bandwidth Available on TDA3x Remarks CSI output (YUV422) 1920 1080 60 2 4 949.21875 Resize Input 1920 1080 60 2 2 474.609375 Resize Output 960 540 60 2 2 118.6523438 Rotation 90 deg Input 1920 1080 60 2 1 237.3046875 Rotation 90 deg Output 1920 1080 60 2 1 237.3046875 Display Input 1920 1080 60 2 1 237.3046875 Total DDR bandwidth 2254.394531 4256 Required is less than 60% of ideal DDR throughput Stage H W FPS Num Bytes per pixel Number of Channels IP MHz Resizer Mpix/s 1920 1080 60 NA 2 248.832 212.8 MHz This is more than what the ISS Resizer can support. Can you run the resize pipe at 30 FPS and have the display refresh at 60 FPS instead? Thanks and Regards Piyali

PIYALI KINDLY THANK YOU FOR YOUR FAVOR TO ANSWER MY QUESTIONS. IT REALLY HELPS. NOW MY FINAL QUESTIONS ARE ABOUT DMA AND BANDWIDTH. ABOUT COLOVER CONVERSION IN MIPI-CSI2 RX INTERFACE AND RX CONTROLLLER 1. SO ISS HARDWARE DOESN'T SUPPORT CONVERSION ACCELERATION BY SOME REGISTER SETTING? 1-1. I GUESS HERE IS NO PROBLEM BECAUSE YOUR POWERFUL FPD-LINK DESERIALIZER CAN RESOLVE FORMATTING PROBLEM. FOR EXAMPLE WE USE 1-1-1. DS90UB940-Q1 IT SUPPORT LVDS RGB TO YUV OUT FOR MIPI-CSI2 TX TO TDA3 MIPI-CSI2 RX 1-1-2. FOR HDMI RX TO MIPI-CSI2 ADV7481 IS APPLIED IN OUR DESIGN TO INTERFACE WITH MIPI-CSI2 RX OF TDA3. IT DOES SUPPORT FOR RESOLVING THE SAME FORMATTING PROBLEM: 1-1-3. FOR HD-TVI RX WE USE TECHPOINT TP2854 WITH DEFAULT SUPPORT FOR YUV FORMAT 1-1-4. FOR SD-TV ADV7282A IS ADOPTED. SO I BELIEVE COLOR CONVERSION IS NOT NECESSARY. 2. ABOUT ROTATION AND OVERLAY FEATURES AS YOU DESCRIBED ABOVE. MY PROBLEMS FOR THESE TWO FEATURES ARE: 2-1. IS HERE A FRAME BUFFER SETUP FOR DSS? 2-2. IS THAT FRAME BUFFER SIZE CONFIGURABLE? 2-3. ARE THE TWO FUNTIONS POSSIBLE TO BE DONE ON THE FLY IN DDS FRAME BUFFER? 2-4. HERE IS OSD OVERLAY SUPPORTED BY DSS SO I GUESS OVERLAYING 2 VIDEO STREAMS IN DSS PHASE WITH ITS FRAME BUFFER SHOULD BE BETTER THAN DOING THAT IN ISS. (ROTATION REQUIRED 90 DEGREE NOT FLIP IN 180 DEGREE) I KNOW THAT YOU HAVE ANSWER THAT SHOULD BE DONE IS DSS BUT I WONDER FOR OVERLAY. 3. FOR RATION / OVERLAY CAN YOU DO ME A FAVOR TO POINT OUT WHERE SHOULD I MODIFY IN VISIONSDK? 3-1. WHERE CAN WE SET UP FRAME BUFFER SIZE IN VISIONSDK / RTOS FILE IF POSSIBLE? 3-2. ALSO CAN THAT FRAME BUFFER TO BE ALLOCATED IN SPECIFIC ADDRESSES?