Ticket Name: Downscaled image looks not proper when compared with original image

Query Text:
Other Parts Discussed in Thread: TDA2 Hi All, We have down-scaled a picture of lines in VID2 pipeline of DSS from 1280*720 to 1120*630.But we see the down-scaled picture looks distorted than the original image. The original image format is ARGB. In original picture lines are smooth but in the downscaled image ,the lines look discontinuous with some minor breaks at some interval. Following are the registers configured in DSS. reg_write(DISPC_VID2_FIR, 0x04920492);//downscaling ratio FIR_Coefficients : 5 taps reg_write(DISPC_VID2_FIR_COEF_H_0, 0xA720AFD); reg_write(DISPC_VID2_FIR_COEF_H_1, 0x186F00FF); reg_write(DISPC_VID2_FIR_COEF_H_2, 0x2867F900); reg_write(DISPC_VID2_FIR_COEF_H_3, 0x3A5BF501); reg_write(DISPC_VID2_FIR_COEF_H_4, 0xF44C4CF4); reg_write(DISPC_VID2_FIR_COEF_H_5, 0xF55B3AF5); reg_write(DISPC_VID2_FIR_COEF_H_6, 0xF96728F8); reg_write(DISPC_VID2_FIR_COEF_H_7, 0x6F18FA); reg_mod(DISPC_VID2_FIR_COEF_HV_0, 0xA720AFD, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_1, 0x186F00FA, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_2, 0x2867F9F8, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_3, 0x3A5BF5F5, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_4, 0xF44C4C00, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_5, 0xF55B3A01, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_6, 0xF9672800, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_HV_7, 0x6F18FF, 31, 8); reg_mod(DISPC_VID2_FIR_COEF_V_0, 0xFDFD, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_1, 0xFAFF, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_2, 0xF800, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_3, 0xF501, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_4, 0xF4, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_5, 0x1F5, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_6, 0xF8, 15, 0); reg_mod(DISPC_VID2_FIR_COEF_V_7, 0xFFFA, 15, 0); reg_mod(DISPC_VID2_ATTRIBUTES, 0x1, 21, 21); // 5 -vertical taps reg_mod(DISPC_VID2_ATTRIBUTES, 0x3, 6, 5); // resize both horizontal & vertical Please find attached the original and the down-scaled images attached. Can you let us know what could be the issue. Is all the configuration Ok or else any other additional configuration also needed to be done? With regards, Jeyaseelan

Responses:
Hi Jeyaseelan, What is the SoC you are using: TDA2 or TDA3? Regards, Rishabh

Hi Rishabh, We use DRA74xx SoC only. It is for back camera(reverse gear) application. With regards, Jeyaseelan

Hi Jeyaseelan, Ok. Have you tried using the same coefficients that you were using earlier: e2e.ti.com/.../704763 Sometime back I had faced same issue during driver development on a different SoC. It was an issue with coefficients and I got proper output with correct coefficients. Regards, Rishabh

Hi Jeyaseelan, You might also want to check if you have set input and output height and width appropriately. Regards, Rishabh

FIR_Calculation.zipHi Rishabh, For FIR co-efficients we have used the file referred by you on the processor_sdk only . coeff = halDssVidGetScalarCoeff(1280,1120); v_coeff = halDssVidGetScalarCoeff(720,630); It returns the table {9, 9, coefM9 }, for the downscaling ratio of 1280->1120 and 720->630 static const VpsHal_DssScCoeff coefM9[8] = { {-((Int16) 3), 10, 114, 10, -((Int16) 3)}, {-((Int16) 6), 24, 111, 0, -((Int16) 1)}, {-((Int16) 8), 40, 103, -((Int16) 7), 0}, {-((Int16) 11), 58, 91, -((Int16) 11), 1}, {0, -((Int16) 12), 76, 76, -((Int16) 12)}, {1, -((Int16) 11), 91, 58, -((Int16) 11)}, {0, -((Int16) 7), 103, 40, -((Int16) 8)}, {-((Int16) 1), 0, 111, 24, -((Int16) 6)}, }; Using the above table only coefficients are calculated.Have attached the test files used.Can you confirm if the calculation is fine? With regards, Jeyaseelan

Hi Jeyaseelan, Kindly ignore my previous reply (I have deleted it to avoid confusion). I have a simple suggestion. Can you use the TI DSS driver and see if you get the correct output. You should run the TI driver and take DSS register dump and compare with dump of custom driver. You can easily check if you have a driver issue from the comparison of two dumps. The turnaround time will be very low with this approach. If you see the wrong output even with TI driver kindly post a reply here. Regards, Rishabh

Hi Rishabh, TI DSS driver ,you mean running file "vpshal_dssDispcVid.c"directly? If so i will try to do run this and feedback in a couple of days. With regards, Jeyaseelan

Hi, Display example is present here: PROCESSOR_SDK_VISION_03_04_00_00\ti_components\drivers\pdk_01_10_00_08\packages\ti\drv\vps\examples\dss\displayDss. This example works on TI EVM. You can modify this example to use the custom input parameters. You can run this to get the register dump. Regards, Rishabh

Hi Rishabh, I am trying to set up for CCS for building the above source.Once done ,i will share the updates. With regards, Jeyaseelan

Hi Jeyaseelan, To build the source you don't need CCS. This example is makefile based. Regards, Rishabh

Hi Rishabh, I am trying to install vision sdk (PROCESSOR_SDK_VISION_03_04_00_00_setuplinux.bin)in linux systems.But it says unsupported file type.Please find the attached screen shot of installing.Can you let know to do installation in Linux side With regards, Jeyaseelan

Hi, Can you try "sudo chmod +x ./PROCESSOR_SDK_VISION_03_04_00_00_setuplinux.bin" and then "sudo ./PROCESSOR_SDK_VISION_03_04_00_00_setuplinux.bin". Regards, Rishabh

Hi Jeyaseelan, Are you able to get the proper image using Vision SDK? Regards, Rishabh

Hi Rishabh, Now i can able to install with the steps you told above and make the vision sdk example -displayDss with default settings. It generated the below file vps_examples_displayDss_ipu1_0_release.xem4 Have the below questions. 1. Now i have to customize this for SoC DRA7xx and for custom board. Do you have any suggestion which files needed to be changed for this change 2. The bin file generated is in .xem4 extension. But we have it to be .out file for flashing.Can i directly rename it into .out file With regards, Jeyaseelan

Hi Jeyaseelan, The answers are given below: 1. Can you check if this binary is under tda2xx folder. If yes then you don't need to customize it for SoC. The idea is that you should use this binary on TDA2xx EVM. Customizing the example for board requires a tangible effort and will not be useful to you. You can modify one of the test cases of this example depending on the display setup you have to exactly match the input and output height/width. 2. .xem4 is same as .out. You can use CCS to load and run this binary. Regards, Rishabh

Hi Rishabh, Thanks for your reply. Currently in our board JTAG port is disabled and do not have access to CCS as well.Normally we flash the .out file and during u-boot time(A15) ,m4-IPU1 reset line is released after image is copied from flash to ram. So i changed the extension from .xem4 to .out and did our regular type of flashing and IPU1 run. But when tried to take register dump of DSS FIR co-efficient registers, all looks not initialized. => md.size 0x580010F0 580010f0: 00000000 00000000 00000000 00000000 ................ 58001100: 00000000 00000000 00000000 00000000 ................ 58001110: 00000000 00000000 00000000 00000000 ................ 58001120: 00000000 00000000 00000000 00000000 ................ 58001130: 00000000 00000000 00000000 00000000 ................ 58001140: 00000000 00000000 00000000 00000000 ................ 58001150: 00000000 00000000 00000000 00008400 ................ 58001160: 07ff07f8 00000800 00000001 00000001 ................ 58001170: 04000400 00000000 00000000 00000000 ................ 58001180: 00000000 00000000 00000000 00000000 ................ 58001190: 00000000 00000000 00000000 00000000 ................ 580011a0: 00000000 00000000 00000000 00000000 ................ 580011b0: 00000000 00000000 00000000 00000000 ................ 580011c0: 00000000 00000000 00000000 00000000 ................ 580011d0: 00000000 00000000 00000000 00000000 ................ 580011e0: 00000000 00000000 00000000 00000000 So i have a doubt if this binary is running. I will try to debug further and keep you updated. With regards, Jeyaseelan

Hi Jeyaseelan, You can run this binary using SBL MLO (not uboot). Can you check Vision SDK documentation for details on how to create app image and run using SBL. Regards, Rishabh

Hi, Can we close this thread if the issue is resolved. Regards, Rishabh

Hi Rishabh, I am yet to validate the solution with SDK example . Still we can close this thread with the resolution "FIR Coefficient".If needed i will open a new thread in continuation when try to run the Vision example. With regards, Jeyaseelan

Hi Jeyaseelan, Ok thanks for the update. Let me know if you face any issues with Vision example. Regards, Rishabh