Datasets and Benchmarks
Collection
A collection of the released datasets, tokenizer training split and evaluated benchmarks for the ObscuraCoder paper.
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/**
* \file
*
* \brief SAM Temperature Sensor (TSENS) Driver
*
* Copyright (C) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#include "tsens.h"
#define WINDOW_MIN_VALUE -40
#define WINDOW_MAX_VALUE 105
/**
* \internal Writes an TSENS configuration to the hardware module
*
* Writes out a given TSENS module configuration to the hardware module.
*
* \param[in] config Pointer to configuration struct
*
* \return Status of the configuration procedure.
* \retval STATUS_OK The configuration was successful
* \retval STATUS_ERR_INVALID_ARG Invalid argument(s) were provided
*/
static enum status_code _tsens_set_config(struct tsens_config *const config)
{
/* Configure GCLK channel and enable clock */
struct system_gclk_chan_config gclk_chan_conf;
system_gclk_chan_get_config_defaults(&gclk_chan_conf);
gclk_chan_conf.source_generator = config->clock_source;
system_gclk_chan_set_config(TSENS_GCLK_ID, &gclk_chan_conf);
system_gclk_chan_enable(TSENS_GCLK_ID);
/* Configure run in standby */
TSENS->CTRLA.reg = (config->run_in_standby << TSENS_CTRLA_RUNSTDBY_Pos);
/* Check validity of window thresholds */
if (config->window.window_mode != TSENS_WINDOW_MODE_DISABLE) {
if((config->window.window_lower_value < WINDOW_MIN_VALUE) || \
(config->window.window_upper_value > WINDOW_MAX_VALUE)) {
return STATUS_ERR_INVALID_ARG;
}
}
/* Configure CTRLC */
TSENS->CTRLC.reg =
(config->free_running << TSENS_CTRLC_FREERUN_Pos) | \
(config->window.window_mode);
#if ERRATA_14476
/* Configure lower threshold */
TSENS->WINLT.reg = TSENS_WINLT_WINLT(config->window.window_upper_value);
/* Configure upper threshold */
TSENS->WINUT.reg = TSENS_WINLT_WINLT(config->window.window_lower_value);
#else
/* Configure lower threshold */
TSENS->WINLT.reg = TSENS_WINLT_WINLT(config->window.window_lower_value);
/* Configure upper threshold */
TSENS->WINUT.reg = TSENS_WINLT_WINLT(config->window.window_upper_value);
#endif
/* Configure events */
TSENS->EVCTRL.reg = config->event_action;
/* Disable all interrupts */
TSENS->INTENCLR.reg =
(1 << TSENS_INTENCLR_OVF_Pos) | (1 << TSENS_INTENCLR_WINMON_Pos) | \
(1 << TSENS_INTENCLR_OVERRUN_Pos) | (1 << TSENS_INTENCLR_RESRDY_Pos);
/* Read calibration from NVM */
uint32_t tsens_bits = *((uint32_t *)NVMCTRL_TEMP_LOG);
uint32_t tsens_tcal = \
((tsens_bits & TSENS_FUSES_TCAL_Msk) >> TSENS_FUSES_TCAL_Pos);
uint32_t tsens_fcal = \
((tsens_bits & TSENS_FUSES_FCAL_Msk) >> TSENS_FUSES_FCAL_Pos);
TSENS->CAL.reg = TSENS_CAL_TCAL(tsens_tcal) | TSENS_CAL_FCAL(tsens_fcal);
TSENS->GAIN.reg = TSENS_GAIN_GAIN(config->calibration.gain);
TSENS->OFFSET.reg = TSENS_OFFSET_OFFSETC(config->calibration.offset);
return STATUS_OK;
}
/**
* \brief Initializes the TSENS.
*
* Initializes the TSENS device struct and the hardware module based on the
* given configuration struct values.
*
* \param[in] config Pointer to the configuration struct
*
* \return Status of the initialization procedure.
* \retval STATUS_OK The initialization was successful
* \retval STATUS_ERR_INVALID_ARG Invalid argument(s) were provided
* \retval STATUS_BUSY The module is busy with a reset operation
* \retval STATUS_ERR_DENIED The module is enabled
*/
enum status_code tsens_init(struct tsens_config *config)
{
/* Sanity check arguments */
Assert(config);
/* Turn on the digital interface clock */
system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBA, MCLK_APBAMASK_TSENS);
if (TSENS->CTRLA.reg & TSENS_CTRLA_SWRST) {
/* We are in the middle of a reset. Abort. */
return STATUS_BUSY;
}
if (TSENS->CTRLA.reg & TSENS_CTRLA_ENABLE) {
/* Module must be disabled before initialization. Abort. */
return STATUS_ERR_DENIED;
}
/* Write configuration to module */
return _tsens_set_config(config);
}
/**
* \brief Initializes an TSENS configuration structure to defaults.
*
* Initializes a given TSENS configuration struct to a set of known default
* values. This function should be called on any new instance of the
* configuration struct before being modified by the user application.
*
* The default configuration is as follows:
* \li GCLK generator 0 (GCLK main) clock source
* \li All events (input and generation) disabled
* \li Free running disabled
* \li Run in standby disabled
* \li Window monitor disabled
* \li Register GAIN value
* \li Register OFFSET value
*
* \note Register GAIN and OFFSET is loaded from NVM, or can also be fixed.
* If this bitfield is to be fixed, pay attention to the relationship between GCLK
* frequency, GAIN, and resolution. See \ref asfdoc_sam0_tsens_module_overview
* "Chapter Module Overview".
*
* \param[out] config Pointer to configuration struct to initialize to
* default values
*/
void tsens_get_config_defaults(struct tsens_config *const config)
{
Assert(config);
config->clock_source = GCLK_GENERATOR_0;
config->free_running = false;
config->run_in_standby = false;
config->window.window_mode = TSENS_WINDOW_MODE_DISABLE;
config->window.window_upper_value = 0;
config->window.window_lower_value = 0;
config->event_action = TSENS_EVENT_ACTION_DISABLED;
uint32_t tsens_bits[2];
tsens_bits[0] = *((uint32_t *)NVMCTRL_TEMP_LOG);
tsens_bits[1] = *(((uint32_t *)NVMCTRL_TEMP_LOG) + 1);
config->calibration.offset = \
((tsens_bits[0] & TSENS_FUSES_OFFSET_Msk) >> TSENS_FUSES_OFFSET_Pos);
config->calibration.gain = \
((tsens_bits[0] & TSENS_FUSES_GAIN_0_Msk) >> TSENS_FUSES_GAIN_0_Pos) | \
((tsens_bits[1] & TSENS_FUSES_GAIN_1_Msk) >> TSENS_FUSES_GAIN_1_Pos);
}
/**
* \brief Reads the TSENS result.
*
* Reads the result from a TSENS conversion that was previously started.
*
* \param[out] result Pointer to store the result value in
*
* \return Status of the TSENS read request.
* \retval STATUS_OK The result was retrieved successfully
* \retval STATUS_BUSY A conversion result was not ready
* \retval STATUS_ERR_OVERFLOW The result register has been overwritten by the
* TSENS module before the result was read by the software
*/
enum status_code tsens_read(int32_t *result)
{
Assert(result);
if (!(tsens_get_status() & TSENS_STATUS_RESULT_READY)) {
/* Result not ready */
return STATUS_BUSY;
}
if (TSENS->STATUS.reg & TSENS_STATUS_OVF) {
/* The result is not valid */
return STATUS_ERR_BAD_DATA;
}
/* Get TSENS result */
uint32_t temp = TSENS->VALUE.reg;
if(temp & 0x00800000) {
temp |= ~TSENS_VALUE_MASK;
}
#if (ERRATA_14476)
*result = temp * (-1);
#endif
/* Reset ready flag */
tsens_clear_status(TSENS_STATUS_RESULT_READY);
if (tsens_get_status() & TSENS_STATUS_OVERRUN) {
tsens_clear_status(TSENS_STATUS_OVERRUN);
return STATUS_ERR_OVERFLOW;
}
return STATUS_OK;
}
| /**
* \file
*
* \brief SAM Temperature Sensor (TSENS) Driver
*
* Copyright (C) 2015 Atmel Corporation. All rights reserved.
*
* \asf_license_start
*
* \page License
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an
* Atmel microcontroller product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* \asf_license_stop
*
*/
/*
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
*/
#include "tsens.h"
#define VAR_0 -40
#define WINDOW_MAX_VALUE 105
/**
* \internal Writes an TSENS configuration to the hardware module
*
* Writes out a given TSENS module configuration to the hardware module.
*
* \param[in] config Pointer to configuration struct
*
* \return Status of the configuration procedure.
* \retval STATUS_OK The configuration was successful
* \retval STATUS_ERR_INVALID_ARG Invalid argument(s) were provided
*/
static enum status_code FUNC_0(struct tsens_config *const config)
{
/* Configure GCLK channel and enable clock */
struct CLASS_0 gclk_chan_conf;
FUNC_1(&gclk_chan_conf);
gclk_chan_conf.source_generator = config->VAR_1;
system_gclk_chan_set_config(VAR_2, &gclk_chan_conf);
system_gclk_chan_enable(VAR_2);
/* Configure run in standby */
VAR_3->VAR_4.VAR_5 = (config->run_in_standby << VAR_6);
/* Check validity of window thresholds */
if (config->VAR_7.VAR_8 != TSENS_WINDOW_MODE_DISABLE) {
if((config->VAR_7.window_lower_value < VAR_0) || \
(config->VAR_7.window_upper_value > WINDOW_MAX_VALUE)) {
return VAR_9;
}
}
/* Configure CTRLC */
VAR_3->VAR_10.VAR_5 =
(config->VAR_11 << VAR_12) | \
(config->VAR_7.VAR_8);
#if ERRATA_14476
/* Configure lower threshold */
VAR_3->VAR_13.VAR_5 = FUNC_2(config->VAR_7.window_upper_value);
/* Configure upper threshold */
VAR_3->WINUT.VAR_5 = FUNC_2(config->VAR_7.window_lower_value);
#else
/* Configure lower threshold */
VAR_3->VAR_13.VAR_5 = FUNC_2(config->VAR_7.window_lower_value);
/* Configure upper threshold */
VAR_3->WINUT.VAR_5 = FUNC_2(config->VAR_7.window_upper_value);
#endif
/* Configure events */
VAR_3->EVCTRL.VAR_5 = config->VAR_14;
/* Disable all interrupts */
VAR_3->INTENCLR.VAR_5 =
(1 << VAR_15) | (1 << VAR_16) | \
(1 << TSENS_INTENCLR_OVERRUN_Pos) | (1 << VAR_17);
/* Read calibration from NVM */
uint32_t tsens_bits = *((uint32_t *)NVMCTRL_TEMP_LOG);
uint32_t tsens_tcal = \
((tsens_bits & TSENS_FUSES_TCAL_Msk) >> VAR_18);
uint32_t tsens_fcal = \
((tsens_bits & VAR_19) >> TSENS_FUSES_FCAL_Pos);
VAR_3->VAR_20.VAR_5 = TSENS_CAL_TCAL(tsens_tcal) | TSENS_CAL_FCAL(tsens_fcal);
VAR_3->GAIN.VAR_5 = FUNC_3(config->VAR_21.gain);
VAR_3->OFFSET.VAR_5 = FUNC_4(config->VAR_21.VAR_22);
return VAR_23;
}
/**
* \brief Initializes the TSENS.
*
* Initializes the TSENS device struct and the hardware module based on the
* given configuration struct values.
*
* \param[in] config Pointer to the configuration struct
*
* \return Status of the initialization procedure.
* \retval STATUS_OK The initialization was successful
* \retval STATUS_ERR_INVALID_ARG Invalid argument(s) were provided
* \retval STATUS_BUSY The module is busy with a reset operation
* \retval STATUS_ERR_DENIED The module is enabled
*/
enum status_code tsens_init(struct tsens_config *config)
{
/* Sanity check arguments */
Assert(config);
/* Turn on the digital interface clock */
FUNC_5(VAR_24, MCLK_APBAMASK_TSENS);
if (VAR_3->VAR_4.VAR_5 & VAR_25) {
/* We are in the middle of a reset. Abort. */
return VAR_26;
}
if (VAR_3->VAR_4.VAR_5 & TSENS_CTRLA_ENABLE) {
/* Module must be disabled before initialization. Abort. */
return STATUS_ERR_DENIED;
}
/* Write configuration to module */
return FUNC_0(config);
}
/**
* \brief Initializes an TSENS configuration structure to defaults.
*
* Initializes a given TSENS configuration struct to a set of known default
* values. This function should be called on any new instance of the
* configuration struct before being modified by the user application.
*
* The default configuration is as follows:
* \li GCLK generator 0 (GCLK main) clock source
* \li All events (input and generation) disabled
* \li Free running disabled
* \li Run in standby disabled
* \li Window monitor disabled
* \li Register GAIN value
* \li Register OFFSET value
*
* \note Register GAIN and OFFSET is loaded from NVM, or can also be fixed.
* If this bitfield is to be fixed, pay attention to the relationship between GCLK
* frequency, GAIN, and resolution. See \ref asfdoc_sam0_tsens_module_overview
* "Chapter Module Overview".
*
* \param[out] config Pointer to configuration struct to initialize to
* default values
*/
void FUNC_6(struct tsens_config *const config)
{
Assert(config);
config->VAR_1 = VAR_27;
config->VAR_11 = false;
config->run_in_standby = false;
config->VAR_7.VAR_8 = TSENS_WINDOW_MODE_DISABLE;
config->VAR_7.window_upper_value = 0;
config->VAR_7.window_lower_value = 0;
config->VAR_14 = VAR_28;
uint32_t tsens_bits[2];
tsens_bits[0] = *((uint32_t *)NVMCTRL_TEMP_LOG);
tsens_bits[1] = *(((uint32_t *)NVMCTRL_TEMP_LOG) + 1);
config->VAR_21.VAR_22 = \
((tsens_bits[0] & TSENS_FUSES_OFFSET_Msk) >> VAR_29);
config->VAR_21.gain = \
((tsens_bits[0] & VAR_30) >> VAR_31) | \
((tsens_bits[1] & VAR_32) >> TSENS_FUSES_GAIN_1_Pos);
}
/**
* \brief Reads the TSENS result.
*
* Reads the result from a TSENS conversion that was previously started.
*
* \param[out] result Pointer to store the result value in
*
* \return Status of the TSENS read request.
* \retval STATUS_OK The result was retrieved successfully
* \retval STATUS_BUSY A conversion result was not ready
* \retval STATUS_ERR_OVERFLOW The result register has been overwritten by the
* TSENS module before the result was read by the software
*/
enum status_code FUNC_7(int32_t *result)
{
Assert(result);
if (!(tsens_get_status() & TSENS_STATUS_RESULT_READY)) {
/* Result not ready */
return VAR_26;
}
if (VAR_3->VAR_33.VAR_5 & VAR_34) {
/* The result is not valid */
return STATUS_ERR_BAD_DATA;
}
/* Get TSENS result */
uint32_t VAR_35 = VAR_3->VALUE.VAR_5;
if(VAR_35 & 0x00800000) {
VAR_35 |= ~TSENS_VALUE_MASK;
}
#if (ERRATA_14476)
*result = VAR_35 * (-1);
#endif
/* Reset ready flag */
tsens_clear_status(TSENS_STATUS_RESULT_READY);
if (tsens_get_status() & VAR_36) {
tsens_clear_status(VAR_36);
return VAR_37;
}
return VAR_23;
}
| 0.553354 | {'VAR_0': 'WINDOW_MIN_VALUE', 'FUNC_0': '_tsens_set_config', 'CLASS_0': 'system_gclk_chan_config', 'FUNC_1': 'system_gclk_chan_get_config_defaults', 'VAR_1': 'clock_source', 'VAR_2': 'TSENS_GCLK_ID', 'VAR_3': 'TSENS', 'VAR_4': 'CTRLA', 'VAR_5': 'reg', 'VAR_6': 'TSENS_CTRLA_RUNSTDBY_Pos', 'VAR_7': 'window', 'VAR_8': 'window_mode', 'VAR_9': 'STATUS_ERR_INVALID_ARG', 'VAR_10': 'CTRLC', 'VAR_11': 'free_running', 'VAR_12': 'TSENS_CTRLC_FREERUN_Pos', 'VAR_13': 'WINLT', 'FUNC_2': 'TSENS_WINLT_WINLT', 'VAR_14': 'event_action', 'VAR_15': 'TSENS_INTENCLR_OVF_Pos', 'VAR_16': 'TSENS_INTENCLR_WINMON_Pos', 'VAR_17': 'TSENS_INTENCLR_RESRDY_Pos', 'VAR_18': 'TSENS_FUSES_TCAL_Pos', 'VAR_19': 'TSENS_FUSES_FCAL_Msk', 'VAR_20': 'CAL', 'FUNC_3': 'TSENS_GAIN_GAIN', 'VAR_21': 'calibration', 'FUNC_4': 'TSENS_OFFSET_OFFSETC', 'VAR_22': 'offset', 'VAR_23': 'STATUS_OK', 'FUNC_5': 'system_apb_clock_set_mask', 'VAR_24': 'SYSTEM_CLOCK_APB_APBA', 'VAR_25': 'TSENS_CTRLA_SWRST', 'VAR_26': 'STATUS_BUSY', 'FUNC_6': 'tsens_get_config_defaults', 'VAR_27': 'GCLK_GENERATOR_0', 'VAR_28': 'TSENS_EVENT_ACTION_DISABLED', 'VAR_29': 'TSENS_FUSES_OFFSET_Pos', 'VAR_30': 'TSENS_FUSES_GAIN_0_Msk', 'VAR_31': 'TSENS_FUSES_GAIN_0_Pos', 'VAR_32': 'TSENS_FUSES_GAIN_1_Msk', 'FUNC_7': 'tsens_read', 'VAR_33': 'STATUS', 'VAR_34': 'TSENS_STATUS_OVF', 'VAR_35': 'temp', 'VAR_36': 'TSENS_STATUS_OVERRUN', 'VAR_37': 'STATUS_ERR_OVERFLOW'} |
//
// Created by Dado on 01/01/2018.
//
#pragma once
void mainLoop( const CLIParamMap& params, std::unique_ptr<RunLoopBackEndBase>&& _be );
| //
// Created by Dado on 01/01/2018.
//
#pragma once
void FUNC_0( const CLASS_0& VAR_0, CLASS_1::VAR_1<VAR_2>&& VAR_3 );
| 0.719202 | {'FUNC_0': 'mainLoop', 'CLASS_0': 'CLIParamMap', 'VAR_0': 'params', 'CLASS_1': 'std', 'VAR_1': 'unique_ptr', 'VAR_2': 'RunLoopBackEndBase', 'VAR_3': '_be'} |
#include "uart.h"
int main(int argc, char **argv)
{
int fd;
int baud;
char dev_name[128];
printf("Serial Test Start... (%s)\n", __DATE__);
strcpy(dev_name, "/dev/ttyACM0");
baud = 115200;
fd = open_serial(dev_name, baud, 10, 32);
if(fd < 0)
return -2;
gsm_msg_send(fd, "01029807183", "Hello BitAI");
close_serial(fd);
printf("Message Send Success\n");
return 0;
}
| #include "IMPORT_0"
int FUNC_0(int VAR_0, char **VAR_1)
{
int VAR_2;
int baud;
char VAR_3[128];
printf("Serial Test Start... (%s)\n", VAR_4);
strcpy(VAR_3, "/dev/ttyACM0");
baud = 115200;
VAR_2 = FUNC_1(VAR_3, baud, 10, 32);
if(VAR_2 < 0)
return -2;
FUNC_2(VAR_2, "01029807183", "Hello BitAI");
FUNC_3(VAR_2);
printf("Message Send Success\n");
return 0;
}
| 0.717216 | {'IMPORT_0': 'uart.h', 'FUNC_0': 'main', 'VAR_0': 'argc', 'VAR_1': 'argv', 'VAR_2': 'fd', 'VAR_3': 'dev_name', 'VAR_4': '__DATE__', 'FUNC_1': 'open_serial', 'FUNC_2': 'gsm_msg_send', 'FUNC_3': 'close_serial'} |
#include <stdio.h>
int main ()
{
int counter;
int a = -1;
printf("--- Contador Regressivo ---\n");
printf("Em que numero pretende começar? ");
scanf("%i", &counter);
while (a < counter)
{
printf("%i\n", counter);
counter--;
}
} | #include <stdio.h>
int main ()
{
int counter;
int a = -1;
printf("--- Contador Regressivo ---\n");
printf("Em que numero pretende começar? ");
scanf("%i", &counter);
while (a < counter)
{
printf("%i\n", counter);
counter--;
}
} | 0.201941 | {} |
#include<stdio.h>
main()
{
int a[3][3],b[3][3],c[3][3],i,j,k,sum;
printf("Enter 9 number for first matrix\n");
for(i=0;i<=2;i++)
{
for(j=0;j<=2;j++)
scanf("%d",&a[i][j]);
}
printf("Enter 9 number for second matrix\n");
for(i=0;i<=2;i++)
{
for(j=0;j<=2;j++)
scanf("%d",&b[i][j]);
}
printf("multiplication of matrix\n");
for(i=0;i<=2;i++)
{
for(j=0;j<=2;j++)
{
sum=0;
for(k=0;k<=2;k++)
sum=sum+a[i][k]*b[k][j];
c[i][j]=sum;
}
}
for(i=0;i<=2;i++)
{
for(j=0;j<=2;j++)
printf("%d ",c[i][j]);
printf("\n");
}
printf("\n");
}
| #include<stdio.h>
FUNC_0()
{
int VAR_0[3][3],b[3][3],VAR_1[3][3],i,j,k,VAR_2;
printf("Enter 9 number for first matrix\n");
for(i=0;i<=2;i++)
{
for(j=0;j<=2;j++)
scanf("%d",&VAR_0[i][j]);
}
printf("Enter 9 number for second matrix\n");
for(i=0;i<=2;i++)
{
for(j=0;j<=2;j++)
scanf("%d",&b[i][j]);
}
printf("multiplication of matrix\n");
for(i=0;i<=2;i++)
{
for(j=0;j<=2;j++)
{
VAR_2=0;
for(k=0;k<=2;k++)
VAR_2=VAR_2+VAR_0[i][k]*b[k][j];
VAR_1[i][j]=VAR_2;
}
}
for(i=0;i<=2;i++)
{
for(j=0;j<=2;j++)
printf("%d ",VAR_1[i][j]);
printf("\n");
}
printf("\n");
}
| 0.506353 | {'FUNC_0': 'main', 'VAR_0': 'a', 'VAR_1': 'c', 'VAR_2': 'sum'} |
//
// match.c
// machodiff
//
// Created by <NAME> on 3/19/14.
// Copyright (c) 2014 <NAME>. All rights reserved.
//
#ifndef machodiff_match_c
#define machodiff_match_c
#include "match.h"
struct loader_match_tree * SDMBuildMatchTree(CoreRange buffer1, CoreRange buffer2) {
struct loader_match_tree *root = calloc(1, sizeof(struct loader_match_tree));
root->parent = NULL;
struct loader_match_tree *current_node = root;
uint64_t counter = 1;
bool match_result = false;
uint64_t lesser_length = (buffer1.length < buffer2.length ? buffer1.length : buffer2.length);
uint64_t compare_length = 0;
uint8_t *offset1 = PtrCast(Ptr(buffer1.offset), uint8_t *);
uint8_t *offset2 = PtrCast(Ptr(buffer2.offset), uint8_t *);
while (compare_length < lesser_length) {
match_result = (memcmp(offset1, offset2, sizeof(char[counter])) == 0);
if (match_result) {
counter++;
compare_length++;
}
else {
if (counter > 1) {
// SDM: break in chain
current_node->matched1 = CoreRangeCreate((uint64_t)offset1, counter);
current_node->matched2 = CoreRangeCreate((uint64_t)offset2, counter);
struct loader_match_tree *child = calloc(1, sizeof(struct loader_match_tree));
child->parent = current_node;
current_node->child = child;
current_node = child;
}
else {
compare_length++;
}
offset1 = (uint8_t*)PtrAdd(offset1, counter);
offset2 = (uint8_t*)PtrAdd(offset2, counter);
counter = 1;
}
}
return root;
}
uint8_t SDMMatchPercentFromTree(struct loader_match_tree *tree, uint64_t total_length) {
uint64_t matched_length = SDMMatchLengthFromTree(tree);
double matched = (double)matched_length;
double total = (double)total_length;
uint8_t result = (uint8_t)round((matched/total)*100);
return result;
}
uint64_t SDMMatchLengthFromTree(struct loader_match_tree *tree) {
uint64_t matched_length = 0;
if (tree) {
struct loader_match_tree *node = tree->child;
if (node) {
matched_length += SDMMatchLengthFromTree(node);
}
matched_length += tree->matched1.length;
}
return matched_length;
}
void SDMReleaseMatchTree(struct loader_match_tree *tree) {
if (tree) {
struct loader_match_tree *node = tree->child;
if (node) {
SDMReleaseMatchTree(node);
}
free(tree);
}
}
#endif
| //
// match.c
// machodiff
//
// Created by <NAME> on 3/19/14.
// Copyright (c) 2014 <NAME>. All rights reserved.
//
#ifndef machodiff_match_c
#define machodiff_match_c
#include "IMPORT_0"
struct CLASS_0 * SDMBuildMatchTree(CLASS_1 VAR_0, CLASS_1 buffer2) {
struct CLASS_0 *VAR_1 = FUNC_0(1, sizeof(struct CLASS_0));
VAR_1->VAR_2 = NULL;
struct CLASS_0 *VAR_3 = VAR_1;
uint64_t VAR_4 = 1;
bool match_result = false;
uint64_t lesser_length = (VAR_0.VAR_5 < buffer2.VAR_5 ? VAR_0.VAR_5 : buffer2.VAR_5);
uint64_t VAR_6 = 0;
uint8_t *VAR_7 = PtrCast(FUNC_1(VAR_0.offset), uint8_t *);
uint8_t *VAR_8 = PtrCast(FUNC_1(buffer2.offset), uint8_t *);
while (VAR_6 < lesser_length) {
match_result = (FUNC_2(VAR_7, VAR_8, sizeof(char[VAR_4])) == 0);
if (match_result) {
VAR_4++;
VAR_6++;
}
else {
if (VAR_4 > 1) {
// SDM: break in chain
VAR_3->VAR_9 = CoreRangeCreate((uint64_t)VAR_7, VAR_4);
VAR_3->VAR_10 = CoreRangeCreate((uint64_t)VAR_8, VAR_4);
struct CLASS_0 *VAR_11 = FUNC_0(1, sizeof(struct CLASS_0));
VAR_11->VAR_2 = VAR_3;
VAR_3->VAR_11 = VAR_11;
VAR_3 = VAR_11;
}
else {
VAR_6++;
}
VAR_7 = (uint8_t*)PtrAdd(VAR_7, VAR_4);
VAR_8 = (uint8_t*)PtrAdd(VAR_8, VAR_4);
VAR_4 = 1;
}
}
return VAR_1;
}
uint8_t SDMMatchPercentFromTree(struct CLASS_0 *tree, uint64_t VAR_12) {
uint64_t VAR_13 = SDMMatchLengthFromTree(tree);
double VAR_14 = (double)VAR_13;
double VAR_15 = (double)VAR_12;
uint8_t result = (uint8_t)round((VAR_14/VAR_15)*100);
return result;
}
uint64_t SDMMatchLengthFromTree(struct CLASS_0 *tree) {
uint64_t VAR_13 = 0;
if (tree) {
struct CLASS_0 *VAR_16 = tree->VAR_11;
if (VAR_16) {
VAR_13 += SDMMatchLengthFromTree(VAR_16);
}
VAR_13 += tree->VAR_9.VAR_5;
}
return VAR_13;
}
void SDMReleaseMatchTree(struct CLASS_0 *tree) {
if (tree) {
struct CLASS_0 *VAR_16 = tree->VAR_11;
if (VAR_16) {
SDMReleaseMatchTree(VAR_16);
}
FUNC_3(tree);
}
}
#endif
| 0.442198 | {'IMPORT_0': 'match.h', 'CLASS_0': 'loader_match_tree', 'CLASS_1': 'CoreRange', 'VAR_0': 'buffer1', 'VAR_1': 'root', 'FUNC_0': 'calloc', 'VAR_2': 'parent', 'VAR_3': 'current_node', 'VAR_4': 'counter', 'VAR_5': 'length', 'VAR_6': 'compare_length', 'VAR_7': 'offset1', 'FUNC_1': 'Ptr', 'VAR_8': 'offset2', 'FUNC_2': 'memcmp', 'VAR_9': 'matched1', 'VAR_10': 'matched2', 'VAR_11': 'child', 'VAR_12': 'total_length', 'VAR_13': 'matched_length', 'VAR_14': 'matched', 'VAR_15': 'total', 'VAR_16': 'node', 'FUNC_3': 'free'} |
#ifndef _PPS_H_
#define _PPS_H_
/* ************************************************************************** */
/* Notes on using the PPS (Peripheral Pin Select)
The PIC18 K42 family microcontrollers has a Peripheral Pin Select module
that allows the remapping of digital I/O pins.
*/
/* ************************************************************************** */
/* Notes on managing the PPS Lock
These macros are designed to help each software module manage its own PPS
settings. Writes to PPS registers while the system is locked are ignored.
Each software module is responsible for putting its required PPS setup code
in it's module_init(). If all the various module_init() calls are collected
into one place, like startup(), then the block of _init() calls can be
wrapped with these two macros, and the entire system's PPS requirements can
be satisfied in one shot.
*/
extern void pps_unlock(void);
extern void pps_lock(void);
/* ************************************************************************** */
/* PPS Input Registers
Example PPS Input assignments:
Connecting the Timer 3 Clock input to pin RB0:
pps_in_TIMER3_CLOCK(PPS_IN(B, 0));
Connecting the UART 1 Recieve input to pin RC7:
pps_in_UART1_RX(PPS_IN(C, 7));
Connecting the ADC Trigger input to RA4, through a function call:
void some_init(pps_input_t pin){
pps_in_ADC_TRIGGER(pin);
}
void some_other_function(void) {
some_init(PPS_IN(A, 4));
}
*/
// Can be used to pass PPS pins into a function
typedef unsigned char pps_input_t;
// macro to help abbreviate
#define PPS_INPUT(port, pin) (PPS_PORT_##port & PPS_PIN_##pin)
/* -------------------------------------------------------------------------- */
// Input pin assignment macros
#define PPS_PORT_A 0b11000111
#define PPS_PORT_B 0b11001111
#define PPS_PORT_C 0b11010111
#define PPS_PORT_D 0b11011111
#define PPS_PORT_E 0b11100111
#define PPS_PORT_F 0b11101111
#define PPS_PIN_0 0b11111000
#define PPS_PIN_1 0b11111001
#define PPS_PIN_2 0b11111010
#define PPS_PIN_3 0b11111011
#define PPS_PIN_4 0b11111100
#define PPS_PIN_5 0b11111101
#define PPS_PIN_6 0b11111110
#define PPS_PIN_7 0b11111111
/* -------------------------------------------------------------------------- */
extern void pps_in_INTERRUPT0(pps_input_t pin);
extern void pps_in_INTERRUPT1(pps_input_t pin);
extern void pps_in_INTERRUPT2(pps_input_t pin);
/* -------------------------------------------------------------------------- */
extern void pps_in_TIMER0_CLOCK(pps_input_t pin);
extern void pps_in_TIMER1_CLOCK(pps_input_t pin);
extern void pps_in_TIMER1_GATE(pps_input_t pin);
extern void pps_in_TIMER3_CLOCK(pps_input_t pin);
extern void pps_in_TIMER3_GATE(pps_input_t pin);
extern void pps_in_TIMER5_CLOCK(pps_input_t pin);
extern void pps_in_TIMER5_GATE(pps_input_t pin);
extern void pps_in_TIMER2_CLOCK(pps_input_t pin);
extern void pps_in_TIMER4_CLOCK(pps_input_t pin);
extern void pps_in_TIMER6_CLOCK(pps_input_t pin);
/* -------------------------------------------------------------------------- */
extern void pps_in_CCP1(pps_input_t pin);
extern void pps_in_CCP2(pps_input_t pin);
extern void pps_in_CCP3(pps_input_t pin);
extern void pps_in_CCP4(pps_input_t pin); //* K42 only
/* -------------------------------------------------------------------------- */
extern void pps_in_PWM_Input_0(pps_input_t pin); //* Q43 only
extern void pps_in_PWM_Input_1(pps_input_t pin); //* Q43 only
extern void pps_in_PWM1_External_Reset(pps_input_t pin); //* Q43 only
extern void pps_in_PWM2_External_Reset(pps_input_t pin); //* Q43 only
extern void pps_in_PWM3_External_Reset(pps_input_t pin); //* Q43 only
/* -------------------------------------------------------------------------- */
extern void pps_in_SMT1_WINDOW(pps_input_t pin);
extern void pps_in_SMT1_SIGNAL(pps_input_t pin);
/* -------------------------------------------------------------------------- */
extern void pps_in_CWG1(pps_input_t pin); //* Q43 only (by mistake)
extern void pps_in_CWG2(pps_input_t pin); //* Q43 only (by mistake)
extern void pps_in_CWG3(pps_input_t pin); //* Q43 only (by mistake)
/* -------------------------------------------------------------------------- */
extern void pps_in_DSM_CARRIER_LOW(pps_input_t pin);
extern void pps_in_DSM_CARRIER_HIGH(pps_input_t pin);
extern void pps_in_DSM_SOURCE(pps_input_t pin);
/* -------------------------------------------------------------------------- */
extern void pps_in_CLC1_INPUT(pps_input_t pin);
extern void pps_in_CLC2_INPUT(pps_input_t pin);
extern void pps_in_CLC3_INPUT(pps_input_t pin);
extern void pps_in_CLC4_INPUT(pps_input_t pin);
extern void pps_in_CLC5_INPUT(pps_input_t pin); //* Q43 only
extern void pps_in_CLC6_INPUT(pps_input_t pin); //* Q43 only
extern void pps_in_CLC7_INPUT(pps_input_t pin); //* Q43 only
extern void pps_in_CLC8_INPUT(pps_input_t pin); //* Q43 only
/* -------------------------------------------------------------------------- */
extern void pps_in_ADC_TRIGGER(pps_input_t pin);
/* -------------------------------------------------------------------------- */
extern void pps_in_SPI1_CLOCK(pps_input_t pin);
extern void pps_in_SPI1_DATA_IN(pps_input_t pin);
extern void pps_in_SPI1_SS(pps_input_t pin);
extern void pps_in_SPI2_CLOCK(pps_input_t pin); //* Q43 only
extern void pps_in_SPI2_DATA_IN(pps_input_t pin); //* Q43 only
extern void pps_in_SPI2_SS(pps_input_t pin); //* Q43 only
/* -------------------------------------------------------------------------- */
extern void pps_in_I2C1_CLOCK(pps_input_t pin);
extern void pps_in_I2C1_DATA(pps_input_t pin);
extern void pps_in_I2C2_CLOCK(pps_input_t pin); //* K42 only
extern void pps_in_I2C2_DATA(pps_input_t pin); //* K42 only
/* -------------------------------------------------------------------------- */
extern void pps_in_UART1_RX(pps_input_t pin);
extern void pps_in_UART1_CTS(pps_input_t pin);
extern void pps_in_UART2_RX(pps_input_t pin);
extern void pps_in_UART2_CTS(pps_input_t pin);
extern void pps_in_UART3_RX(pps_input_t pin); //* Q43 only
extern void pps_in_UART3_CTS(pps_input_t pin); //* Q43 only
extern void pps_in_UART4_RX(pps_input_t pin); //* Q43 only
extern void pps_in_UART4_CTS(pps_input_t pin); //* Q43 only
extern void pps_in_UART5_RX(pps_input_t pin); //* Q43 only
extern void pps_in_UART5_CTS(pps_input_t pin); //* Q43 only
/* ************************************************************************** */
/* PPS Output Registers
Example PPS Output assignments:
Assigning UART1 TX to pin RC6:
pps_out_UART1_TX(RC6PPS)
Assigning the output of PWM5 to RB2, through a function call:
void some_init(pps_output_t* outputPin){
pps_out_PWM5(outputPin);
}
void some_other_function(void) {
some_init(PPS_OUT(B, 2));
}
*/
// Can be used to pass PPS pins into a function
typedef volatile unsigned char pps_output_t;
//
#define PPS_OUTPUT(port, pin) (&R##port##pin##PPS)
/* -------------------------------------------------------------------------- */
// ADC Guard Ring Outputs
extern void pps_out_ADC_GUARD_RING_B(pps_output_t *pin);
extern void pps_out_ADC_GUARD_RING_A(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// Complementary Waveform Generator 3
extern void pps_out_CWG3D(pps_output_t *pin);
extern void pps_out_CWG3C(pps_output_t *pin);
extern void pps_out_CWG3B(pps_output_t *pin);
extern void pps_out_CWG3A(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// Complementary Waveform Generator 3
extern void pps_out_CWG2D(pps_output_t *pin);
extern void pps_out_CWG2C(pps_output_t *pin);
extern void pps_out_CWG2B(pps_output_t *pin);
extern void pps_out_CWG2A(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// Complementary Waveform Generator 3
extern void pps_out_CWG1D(pps_output_t *pin);
extern void pps_out_CWG1C(pps_output_t *pin);
extern void pps_out_CWG1B(pps_output_t *pin);
extern void pps_out_CWG1A(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// Digital Signal Modulater
extern void pps_out_DSM1(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// Reference Clock Output
extern void pps_out_CLKR(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// Numerically Controller Oscillator
extern void pps_out_NCO3(pps_output_t *pin); //* Q43 only
extern void pps_out_NCO2(pps_output_t *pin); //* Q43 only
extern void pps_out_NCO1(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// Timer 0 Output
extern void pps_out_TIMER0(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// I2C
extern void pps_out_I2C1_DATA(pps_output_t *pin);
extern void pps_out_I2C1_CLOCK(pps_output_t *pin);
extern void pps_out_I2C2_DATA(pps_output_t *pin); //* K42 only
extern void pps_out_I2C2_CLOCK(pps_output_t *pin); //* K42 only
/* -------------------------------------------------------------------------- */
// SPI
extern void pps_out_SPI1_SS(pps_output_t *pin);
extern void pps_out_SPI1_DATA_OUT(pps_output_t *pin);
extern void pps_out_SPI1_CLOCK(pps_output_t *pin);
extern void pps_out_SPI2_SS(pps_output_t *pin); //* Q43 only
extern void pps_out_SPI2_DATA_OUT(pps_output_t *pin); //* Q43 only
extern void pps_out_SPI2_CLOCK(pps_output_t *pin); //* Q43 only
/* -------------------------------------------------------------------------- */
// Comparator
extern void pps_out_COMPARATOR_2(pps_output_t *pin);
extern void pps_out_COMPARATOR_1(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// UART 5
extern void pps_out_UART5_RTS(pps_output_t *pin); //* Q43 only
extern void pps_out_UART5_TXDE(pps_output_t *pin); //* Q43 only
extern void pps_out_UART5_TX(pps_output_t *pin); //* Q43 only
/* -------------------------------------------------------------------------- */
// UART 4
extern void pps_out_UART4_RTS(pps_output_t *pin); //* Q43 only
extern void pps_out_UART4_TXDE(pps_output_t *pin); //* Q43 only
extern void pps_out_UART4_TX(pps_output_t *pin); //* Q43 only
/* -------------------------------------------------------------------------- */
// UART 3
extern void pps_out_UART3_RTS(pps_output_t *pin); //* Q43 only
extern void pps_out_UART3_TXDE(pps_output_t *pin); //* Q43 only
extern void pps_out_UART3_TX(pps_output_t *pin); //* Q43 only
/* -------------------------------------------------------------------------- */
// UART 2
extern void pps_out_UART2_RTS(pps_output_t *pin);
extern void pps_out_UART2_TXDE(pps_output_t *pin);
extern void pps_out_UART2_TX(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// UART 1
extern void pps_out_UART1_RTS(pps_output_t *pin);
extern void pps_out_UART1_TXDE(pps_output_t *pin);
extern void pps_out_UART1_TX(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// PWM
extern void pps_out_PWM8(pps_output_t *pin); //* K42 only
extern void pps_out_PWM7(pps_output_t *pin); //* K42 only
extern void pps_out_PWM6(pps_output_t *pin); //* K42 only
extern void pps_out_PWM5(pps_output_t *pin); //* K42 only
extern void pps_out_PWM3S1P2(pps_output_t *pin); //* Q43 only
extern void pps_out_PWM3S1P1(pps_output_t *pin); //* Q43 only
extern void pps_out_PWM2S1P2(pps_output_t *pin); //* Q43 only
extern void pps_out_PWM2S1P1(pps_output_t *pin); //* Q43 only
extern void pps_out_PWM1S1P2(pps_output_t *pin); //* Q43 only
extern void pps_out_PWM1S1P1(pps_output_t *pin); //* Q43 only
/* -------------------------------------------------------------------------- */
// Capture/Compare
extern void pps_out_CCP4(pps_output_t *pin); //* K42 only
extern void pps_out_CCP3(pps_output_t *pin);
extern void pps_out_CCP2(pps_output_t *pin);
extern void pps_out_CCP1(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// Configurable Logic Cell
extern void pps_out_CLC8_OUTPUT(pps_output_t *pin); //* Q43 only
extern void pps_out_CLC7_OUTPUT(pps_output_t *pin); //* Q43 only
extern void pps_out_CLC6_OUTPUT(pps_output_t *pin); //* Q43 only
extern void pps_out_CLC5_OUTPUT(pps_output_t *pin); //* Q43 only
extern void pps_out_CLC4_OUTPUT(pps_output_t *pin);
extern void pps_out_CLC3_OUTPUT(pps_output_t *pin);
extern void pps_out_CLC2_OUTPUT(pps_output_t *pin);
extern void pps_out_CLC1_OUTPUT(pps_output_t *pin);
/* -------------------------------------------------------------------------- */
// Default value of all RXYPPS registers at RESET
// Primarily used to revert a PPS configuration
extern void pps_out_LATCH(pps_output_t *pin);
/* ************************************************************************** */
#endif /* _PPS_H_ */ | #ifndef _PPS_H_
#define _PPS_H_
/* ************************************************************************** */
/* Notes on using the PPS (Peripheral Pin Select)
The PIC18 K42 family microcontrollers has a Peripheral Pin Select module
that allows the remapping of digital I/O pins.
*/
/* ************************************************************************** */
/* Notes on managing the PPS Lock
These macros are designed to help each software module manage its own PPS
settings. Writes to PPS registers while the system is locked are ignored.
Each software module is responsible for putting its required PPS setup code
in it's module_init(). If all the various module_init() calls are collected
into one place, like startup(), then the block of _init() calls can be
wrapped with these two macros, and the entire system's PPS requirements can
be satisfied in one shot.
*/
extern void FUNC_0(void);
extern void pps_lock(void);
/* ************************************************************************** */
/* PPS Input Registers
Example PPS Input assignments:
Connecting the Timer 3 Clock input to pin RB0:
pps_in_TIMER3_CLOCK(PPS_IN(B, 0));
Connecting the UART 1 Recieve input to pin RC7:
pps_in_UART1_RX(PPS_IN(C, 7));
Connecting the ADC Trigger input to RA4, through a function call:
void some_init(pps_input_t pin){
pps_in_ADC_TRIGGER(pin);
}
void some_other_function(void) {
some_init(PPS_IN(A, 4));
}
*/
// Can be used to pass PPS pins into a function
typedef unsigned char pps_input_t;
// macro to help abbreviate
#define PPS_INPUT(port, VAR_0) (PPS_PORT_##port & PPS_PIN_##pin)
/* -------------------------------------------------------------------------- */
// Input pin assignment macros
#define PPS_PORT_A 0b11000111
#define VAR_1 0b11001111
#define VAR_2 0b11010111
#define PPS_PORT_D 0b11011111
#define VAR_3 0b11100111
#define PPS_PORT_F 0b11101111
#define PPS_PIN_0 0b11111000
#define PPS_PIN_1 0b11111001
#define VAR_4 0b11111010
#define PPS_PIN_3 0b11111011
#define PPS_PIN_4 0b11111100
#define PPS_PIN_5 0b11111101
#define VAR_5 0b11111110
#define VAR_6 0b11111111
/* -------------------------------------------------------------------------- */
extern void pps_in_INTERRUPT0(pps_input_t VAR_0);
extern void FUNC_1(pps_input_t VAR_0);
extern void FUNC_2(pps_input_t VAR_0);
/* -------------------------------------------------------------------------- */
extern void pps_in_TIMER0_CLOCK(pps_input_t VAR_0);
extern void pps_in_TIMER1_CLOCK(pps_input_t VAR_0);
extern void FUNC_3(pps_input_t VAR_0);
extern void pps_in_TIMER3_CLOCK(pps_input_t VAR_0);
extern void pps_in_TIMER3_GATE(pps_input_t VAR_0);
extern void pps_in_TIMER5_CLOCK(pps_input_t VAR_0);
extern void pps_in_TIMER5_GATE(pps_input_t VAR_0);
extern void pps_in_TIMER2_CLOCK(pps_input_t VAR_0);
extern void pps_in_TIMER4_CLOCK(pps_input_t VAR_0);
extern void pps_in_TIMER6_CLOCK(pps_input_t VAR_0);
/* -------------------------------------------------------------------------- */
extern void pps_in_CCP1(pps_input_t VAR_0);
extern void FUNC_4(pps_input_t VAR_0);
extern void FUNC_5(pps_input_t VAR_0);
extern void pps_in_CCP4(pps_input_t VAR_0); //* K42 only
/* -------------------------------------------------------------------------- */
extern void pps_in_PWM_Input_0(pps_input_t VAR_0); //* Q43 only
extern void FUNC_6(pps_input_t VAR_0); //* Q43 only
extern void pps_in_PWM1_External_Reset(pps_input_t VAR_0); //* Q43 only
extern void pps_in_PWM2_External_Reset(pps_input_t VAR_0); //* Q43 only
extern void pps_in_PWM3_External_Reset(pps_input_t VAR_0); //* Q43 only
/* -------------------------------------------------------------------------- */
extern void FUNC_7(pps_input_t VAR_0);
extern void FUNC_8(pps_input_t VAR_0);
/* -------------------------------------------------------------------------- */
extern void pps_in_CWG1(pps_input_t VAR_0); //* Q43 only (by mistake)
extern void FUNC_9(pps_input_t VAR_0); //* Q43 only (by mistake)
extern void pps_in_CWG3(pps_input_t VAR_0); //* Q43 only (by mistake)
/* -------------------------------------------------------------------------- */
extern void FUNC_10(pps_input_t VAR_0);
extern void FUNC_11(pps_input_t VAR_0);
extern void FUNC_12(pps_input_t VAR_0);
/* -------------------------------------------------------------------------- */
extern void pps_in_CLC1_INPUT(pps_input_t VAR_0);
extern void FUNC_13(pps_input_t VAR_0);
extern void pps_in_CLC3_INPUT(pps_input_t VAR_0);
extern void FUNC_14(pps_input_t VAR_0);
extern void pps_in_CLC5_INPUT(pps_input_t VAR_0); //* Q43 only
extern void pps_in_CLC6_INPUT(pps_input_t VAR_0); //* Q43 only
extern void pps_in_CLC7_INPUT(pps_input_t VAR_0); //* Q43 only
extern void pps_in_CLC8_INPUT(pps_input_t VAR_0); //* Q43 only
/* -------------------------------------------------------------------------- */
extern void FUNC_15(pps_input_t VAR_0);
/* -------------------------------------------------------------------------- */
extern void pps_in_SPI1_CLOCK(pps_input_t VAR_0);
extern void pps_in_SPI1_DATA_IN(pps_input_t VAR_0);
extern void pps_in_SPI1_SS(pps_input_t VAR_0);
extern void FUNC_16(pps_input_t VAR_0); //* Q43 only
extern void pps_in_SPI2_DATA_IN(pps_input_t VAR_0); //* Q43 only
extern void FUNC_17(pps_input_t VAR_0); //* Q43 only
/* -------------------------------------------------------------------------- */
extern void pps_in_I2C1_CLOCK(pps_input_t VAR_0);
extern void FUNC_18(pps_input_t VAR_0);
extern void FUNC_19(pps_input_t VAR_0); //* K42 only
extern void pps_in_I2C2_DATA(pps_input_t VAR_0); //* K42 only
/* -------------------------------------------------------------------------- */
extern void pps_in_UART1_RX(pps_input_t VAR_0);
extern void pps_in_UART1_CTS(pps_input_t VAR_0);
extern void pps_in_UART2_RX(pps_input_t VAR_0);
extern void pps_in_UART2_CTS(pps_input_t VAR_0);
extern void FUNC_20(pps_input_t VAR_0); //* Q43 only
extern void pps_in_UART3_CTS(pps_input_t VAR_0); //* Q43 only
extern void pps_in_UART4_RX(pps_input_t VAR_0); //* Q43 only
extern void pps_in_UART4_CTS(pps_input_t VAR_0); //* Q43 only
extern void pps_in_UART5_RX(pps_input_t VAR_0); //* Q43 only
extern void FUNC_21(pps_input_t VAR_0); //* Q43 only
/* ************************************************************************** */
/* PPS Output Registers
Example PPS Output assignments:
Assigning UART1 TX to pin RC6:
pps_out_UART1_TX(RC6PPS)
Assigning the output of PWM5 to RB2, through a function call:
void some_init(pps_output_t* outputPin){
pps_out_PWM5(outputPin);
}
void some_other_function(void) {
some_init(PPS_OUT(B, 2));
}
*/
// Can be used to pass PPS pins into a function
typedef volatile unsigned char ID_0;
//
#define PPS_OUTPUT(port, VAR_0) (&R##port##pin##PPS)
/* -------------------------------------------------------------------------- */
// ADC Guard Ring Outputs
extern void pps_out_ADC_GUARD_RING_B(CLASS_0 *VAR_0);
extern void FUNC_22(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// Complementary Waveform Generator 3
extern void pps_out_CWG3D(CLASS_0 *VAR_0);
extern void pps_out_CWG3C(CLASS_0 *VAR_0);
extern void pps_out_CWG3B(CLASS_0 *VAR_0);
extern void FUNC_23(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// Complementary Waveform Generator 3
extern void pps_out_CWG2D(CLASS_0 *VAR_0);
extern void pps_out_CWG2C(CLASS_0 *VAR_0);
extern void FUNC_24(CLASS_0 *VAR_0);
extern void pps_out_CWG2A(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// Complementary Waveform Generator 3
extern void pps_out_CWG1D(CLASS_0 *VAR_0);
extern void pps_out_CWG1C(CLASS_0 *VAR_0);
extern void pps_out_CWG1B(CLASS_0 *VAR_0);
extern void FUNC_25(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// Digital Signal Modulater
extern void pps_out_DSM1(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// Reference Clock Output
extern void pps_out_CLKR(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// Numerically Controller Oscillator
extern void pps_out_NCO3(CLASS_0 *VAR_0); //* Q43 only
extern void FUNC_26(CLASS_0 *VAR_0); //* Q43 only
extern void FUNC_27(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// Timer 0 Output
extern void FUNC_28(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// I2C
extern void pps_out_I2C1_DATA(CLASS_0 *VAR_0);
extern void FUNC_29(CLASS_0 *VAR_0);
extern void pps_out_I2C2_DATA(CLASS_0 *VAR_0); //* K42 only
extern void pps_out_I2C2_CLOCK(CLASS_0 *VAR_0); //* K42 only
/* -------------------------------------------------------------------------- */
// SPI
extern void FUNC_30(CLASS_0 *VAR_0);
extern void pps_out_SPI1_DATA_OUT(CLASS_0 *VAR_0);
extern void pps_out_SPI1_CLOCK(CLASS_0 *VAR_0);
extern void pps_out_SPI2_SS(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_SPI2_DATA_OUT(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_SPI2_CLOCK(CLASS_0 *VAR_0); //* Q43 only
/* -------------------------------------------------------------------------- */
// Comparator
extern void pps_out_COMPARATOR_2(CLASS_0 *VAR_0);
extern void pps_out_COMPARATOR_1(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// UART 5
extern void FUNC_31(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_UART5_TXDE(CLASS_0 *VAR_0); //* Q43 only
extern void FUNC_32(CLASS_0 *VAR_0); //* Q43 only
/* -------------------------------------------------------------------------- */
// UART 4
extern void pps_out_UART4_RTS(CLASS_0 *VAR_0); //* Q43 only
extern void FUNC_33(CLASS_0 *VAR_0); //* Q43 only
extern void FUNC_34(CLASS_0 *VAR_0); //* Q43 only
/* -------------------------------------------------------------------------- */
// UART 3
extern void pps_out_UART3_RTS(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_UART3_TXDE(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_UART3_TX(CLASS_0 *VAR_0); //* Q43 only
/* -------------------------------------------------------------------------- */
// UART 2
extern void pps_out_UART2_RTS(CLASS_0 *VAR_0);
extern void FUNC_35(CLASS_0 *VAR_0);
extern void FUNC_36(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// UART 1
extern void pps_out_UART1_RTS(CLASS_0 *VAR_0);
extern void pps_out_UART1_TXDE(CLASS_0 *VAR_0);
extern void FUNC_37(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// PWM
extern void pps_out_PWM8(CLASS_0 *VAR_0); //* K42 only
extern void pps_out_PWM7(CLASS_0 *VAR_0); //* K42 only
extern void pps_out_PWM6(CLASS_0 *VAR_0); //* K42 only
extern void pps_out_PWM5(CLASS_0 *VAR_0); //* K42 only
extern void pps_out_PWM3S1P2(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_PWM3S1P1(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_PWM2S1P2(CLASS_0 *VAR_0); //* Q43 only
extern void FUNC_38(CLASS_0 *VAR_0); //* Q43 only
extern void FUNC_39(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_PWM1S1P1(CLASS_0 *VAR_0); //* Q43 only
/* -------------------------------------------------------------------------- */
// Capture/Compare
extern void pps_out_CCP4(CLASS_0 *VAR_0); //* K42 only
extern void pps_out_CCP3(CLASS_0 *VAR_0);
extern void FUNC_40(CLASS_0 *VAR_0);
extern void pps_out_CCP1(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// Configurable Logic Cell
extern void FUNC_41(CLASS_0 *VAR_0); //* Q43 only
extern void FUNC_42(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_CLC6_OUTPUT(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_CLC5_OUTPUT(CLASS_0 *VAR_0); //* Q43 only
extern void pps_out_CLC4_OUTPUT(CLASS_0 *VAR_0);
extern void FUNC_43(CLASS_0 *VAR_0);
extern void pps_out_CLC2_OUTPUT(CLASS_0 *VAR_0);
extern void FUNC_44(CLASS_0 *VAR_0);
/* -------------------------------------------------------------------------- */
// Default value of all RXYPPS registers at RESET
// Primarily used to revert a PPS configuration
extern void pps_out_LATCH(CLASS_0 *VAR_0);
/* ************************************************************************** */
#endif /* _PPS_H_ */ | 0.395734 | {'FUNC_0': 'pps_unlock', 'VAR_0': 'pin', 'VAR_1': 'PPS_PORT_B', 'VAR_2': 'PPS_PORT_C', 'VAR_3': 'PPS_PORT_E', 'VAR_4': 'PPS_PIN_2', 'VAR_5': 'PPS_PIN_6', 'VAR_6': 'PPS_PIN_7', 'FUNC_1': 'pps_in_INTERRUPT1', 'FUNC_2': 'pps_in_INTERRUPT2', 'FUNC_3': 'pps_in_TIMER1_GATE', 'FUNC_4': 'pps_in_CCP2', 'FUNC_5': 'pps_in_CCP3', 'FUNC_6': 'pps_in_PWM_Input_1', 'FUNC_7': 'pps_in_SMT1_WINDOW', 'FUNC_8': 'pps_in_SMT1_SIGNAL', 'FUNC_9': 'pps_in_CWG2', 'FUNC_10': 'pps_in_DSM_CARRIER_LOW', 'FUNC_11': 'pps_in_DSM_CARRIER_HIGH', 'FUNC_12': 'pps_in_DSM_SOURCE', 'FUNC_13': 'pps_in_CLC2_INPUT', 'FUNC_14': 'pps_in_CLC4_INPUT', 'FUNC_15': 'pps_in_ADC_TRIGGER', 'FUNC_16': 'pps_in_SPI2_CLOCK', 'FUNC_17': 'pps_in_SPI2_SS', 'FUNC_18': 'pps_in_I2C1_DATA', 'FUNC_19': 'pps_in_I2C2_CLOCK', 'FUNC_20': 'pps_in_UART3_RX', 'FUNC_21': 'pps_in_UART5_CTS', 'ID_0': 'pps_output_t', 'CLASS_0': 'pps_output_t', 'FUNC_22': 'pps_out_ADC_GUARD_RING_A', 'FUNC_23': 'pps_out_CWG3A', 'FUNC_24': 'pps_out_CWG2B', 'FUNC_25': 'pps_out_CWG1A', 'FUNC_26': 'pps_out_NCO2', 'FUNC_27': 'pps_out_NCO1', 'FUNC_28': 'pps_out_TIMER0', 'FUNC_29': 'pps_out_I2C1_CLOCK', 'FUNC_30': 'pps_out_SPI1_SS', 'FUNC_31': 'pps_out_UART5_RTS', 'FUNC_32': 'pps_out_UART5_TX', 'FUNC_33': 'pps_out_UART4_TXDE', 'FUNC_34': 'pps_out_UART4_TX', 'FUNC_35': 'pps_out_UART2_TXDE', 'FUNC_36': 'pps_out_UART2_TX', 'FUNC_37': 'pps_out_UART1_TX', 'FUNC_38': 'pps_out_PWM2S1P1', 'FUNC_39': 'pps_out_PWM1S1P2', 'FUNC_40': 'pps_out_CCP2', 'FUNC_41': 'pps_out_CLC8_OUTPUT', 'FUNC_42': 'pps_out_CLC7_OUTPUT', 'FUNC_43': 'pps_out_CLC3_OUTPUT', 'FUNC_44': 'pps_out_CLC1_OUTPUT'} |
/*
* (C) Copyright 2000-2004
* <NAME>, DENX Software Engineering, <EMAIL>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _PART_H
#define _PART_H
#include <ide.h>
typedef struct block_dev_desc {
int if_type; /* type of the interface */
int dev; /* device number */
unsigned char part_type; /* partition type */
unsigned char target; /* target SCSI ID */
unsigned char lun; /* target LUN */
unsigned char type; /* device type */
unsigned char removable; /* removable device */
#ifdef CONFIG_LBA48
unsigned char lba48; /* device can use 48bit addr (ATA/ATAPI v7) */
#endif
lbaint_t lba; /* number of blocks */
unsigned long blksz; /* block size */
char vendor [40+1]; /* IDE model, SCSI Vendor */
char product[20+1]; /* IDE Serial no, SCSI product */
char revision[8+1]; /* firmware revision */
unsigned long (*block_read)(int dev,
unsigned long start,
lbaint_t blkcnt,
void *buffer);
unsigned long (*block_write)(int dev,
unsigned long start,
lbaint_t blkcnt,
const void *buffer);
unsigned long (*block_erase)(int dev,
unsigned long start,
lbaint_t blkcnt);
void *priv; /* driver private struct pointer */
}block_dev_desc_t;
/* Interface types: */
#define IF_TYPE_UNKNOWN 0
#define IF_TYPE_IDE 1
#define IF_TYPE_SCSI 2
#define IF_TYPE_ATAPI 3
#define IF_TYPE_USB 4
#define IF_TYPE_DOC 5
#define IF_TYPE_MMC 6
#define IF_TYPE_SD 7
#define IF_TYPE_SATA 8
/* Part types */
#define PART_TYPE_UNKNOWN 0x00
#define PART_TYPE_MAC 0x01
#define PART_TYPE_DOS 0x02
#define PART_TYPE_ISO 0x03
#define PART_TYPE_AMIGA 0x04
#define PART_TYPE_EFI 0x05
/*
* Type string for U-Boot bootable partitions
*/
#define BOOT_PART_TYPE "U-Boot" /* primary boot partition type */
#define BOOT_PART_COMP "PPCBoot" /* PPCBoot compatibility type */
/* device types */
#define DEV_TYPE_UNKNOWN 0xff /* not connected */
#define DEV_TYPE_HARDDISK 0x00 /* harddisk */
#define DEV_TYPE_TAPE 0x01 /* Tape */
#define DEV_TYPE_CDROM 0x05 /* CD-ROM */
#define DEV_TYPE_OPDISK 0x07 /* optical disk */
typedef struct disk_partition {
ulong start; /* # of first block in partition */
ulong size; /* number of blocks in partition */
ulong blksz; /* block size in bytes */
uchar name[32]; /* partition name */
uchar type[32]; /* string type description */
int bootable; /* Active/Bootable flag is set */
#ifdef CONFIG_PARTITION_UUIDS
char uuid[37]; /* filesystem UUID as string, if exists */
#endif
} disk_partition_t;
/* Misc _get_dev functions */
#ifdef CONFIG_PARTITIONS
block_dev_desc_t *get_dev(const char *ifname, int dev);
block_dev_desc_t* ide_get_dev(int dev);
block_dev_desc_t* sata_get_dev(int dev);
block_dev_desc_t* scsi_get_dev(int dev);
block_dev_desc_t* usb_stor_get_dev(int dev);
block_dev_desc_t* mmc_get_dev(int dev);
block_dev_desc_t* systemace_get_dev(int dev);
block_dev_desc_t* mg_disk_get_dev(int dev);
/* disk/part.c */
int get_partition_info (block_dev_desc_t * dev_desc, int part, disk_partition_t *info);
void print_part (block_dev_desc_t *dev_desc);
void init_part (block_dev_desc_t *dev_desc);
void dev_print(block_dev_desc_t *dev_desc);
int get_device(const char *ifname, const char *dev_str,
block_dev_desc_t **dev_desc);
int get_device_and_partition(const char *ifname, const char *dev_part_str,
block_dev_desc_t **dev_desc,
disk_partition_t *info, int allow_whole_dev);
#else
static inline block_dev_desc_t *get_dev(const char *ifname, int dev)
{ return NULL; }
static inline block_dev_desc_t* ide_get_dev(int dev) { return NULL; }
static inline block_dev_desc_t* sata_get_dev(int dev) { return NULL; }
static inline block_dev_desc_t* scsi_get_dev(int dev) { return NULL; }
static inline block_dev_desc_t* usb_stor_get_dev(int dev) { return NULL; }
static inline block_dev_desc_t* mmc_get_dev(int dev) { return NULL; }
static inline block_dev_desc_t* systemace_get_dev(int dev) { return NULL; }
static inline block_dev_desc_t* mg_disk_get_dev(int dev) { return NULL; }
static inline int get_partition_info (block_dev_desc_t * dev_desc, int part,
disk_partition_t *info) { return -1; }
static inline void print_part (block_dev_desc_t *dev_desc) {}
static inline void init_part (block_dev_desc_t *dev_desc) {}
static inline void dev_print(block_dev_desc_t *dev_desc) {}
static inline int get_device(const char *ifname, const char *dev_str,
block_dev_desc_t **dev_desc)
{ return -1; }
static inline int get_device_and_partition(const char *ifname,
const char *dev_part_str,
block_dev_desc_t **dev_desc,
disk_partition_t *info,
int allow_whole_dev)
{ *dev_desc = NULL; return -1; }
#endif
#ifdef CONFIG_MAC_PARTITION
/* disk/part_mac.c */
int get_partition_info_mac (block_dev_desc_t * dev_desc, int part, disk_partition_t *info);
void print_part_mac (block_dev_desc_t *dev_desc);
int test_part_mac (block_dev_desc_t *dev_desc);
#endif
#ifdef CONFIG_DOS_PARTITION
/* disk/part_dos.c */
int get_partition_info_dos (block_dev_desc_t * dev_desc, int part, disk_partition_t *info);
void print_part_dos (block_dev_desc_t *dev_desc);
int test_part_dos (block_dev_desc_t *dev_desc);
#endif
#ifdef CONFIG_ISO_PARTITION
/* disk/part_iso.c */
int get_partition_info_iso (block_dev_desc_t * dev_desc, int part, disk_partition_t *info);
void print_part_iso (block_dev_desc_t *dev_desc);
int test_part_iso (block_dev_desc_t *dev_desc);
#endif
#ifdef CONFIG_AMIGA_PARTITION
/* disk/part_amiga.c */
int get_partition_info_amiga (block_dev_desc_t * dev_desc, int part, disk_partition_t *info);
void print_part_amiga (block_dev_desc_t *dev_desc);
int test_part_amiga (block_dev_desc_t *dev_desc);
#endif
#ifdef CONFIG_EFI_PARTITION
#include <part_efi.h>
/* disk/part_efi.c */
int get_partition_info_efi (block_dev_desc_t * dev_desc, int part, disk_partition_t *info);
void print_part_efi (block_dev_desc_t *dev_desc);
int test_part_efi (block_dev_desc_t *dev_desc);
/**
* write_gpt_table() - Write the GUID Partition Table to disk
*
* @param dev_desc - block device descriptor
* @param gpt_h - pointer to GPT header representation
* @param gpt_e - pointer to GPT partition table entries
*
* @return - zero on success, otherwise error
*/
int write_gpt_table(block_dev_desc_t *dev_desc,
gpt_header *gpt_h, gpt_entry *gpt_e);
/**
* gpt_fill_pte(): Fill the GPT partition table entry
*
* @param gpt_h - GPT header representation
* @param gpt_e - GPT partition table entries
* @param partitions - list of partitions
* @param parts - number of partitions
*
* @return zero on success
*/
int gpt_fill_pte(gpt_header *gpt_h, gpt_entry *gpt_e,
disk_partition_t *partitions, int parts);
/**
* gpt_fill_header(): Fill the GPT header
*
* @param dev_desc - block device descriptor
* @param gpt_h - GPT header representation
* @param str_guid - disk guid string representation
* @param parts_count - number of partitions
*
* @return - error on str_guid conversion error
*/
int gpt_fill_header(block_dev_desc_t *dev_desc, gpt_header *gpt_h,
char *str_guid, int parts_count);
/**
* gpt_restore(): Restore GPT partition table
*
* @param dev_desc - block device descriptor
* @param str_disk_guid - disk GUID
* @param partitions - list of partitions
* @param parts - number of partitions
*
* @return zero on success
*/
int gpt_restore(block_dev_desc_t *dev_desc, char *str_disk_guid,
disk_partition_t *partitions, const int parts_count);
#endif
#endif /* _PART_H */
| /*
* (C) Copyright 2000-2004
* <NAME>, DENX Software Engineering, <EMAIL>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef VAR_0
#define VAR_0
#include <IMPORT_0>
typedef struct CLASS_0 {
int VAR_1; /* type of the interface */
int VAR_2; /* device number */
unsigned char VAR_3; /* partition type */
unsigned char VAR_4; /* target SCSI ID */
unsigned char lun; /* target LUN */
unsigned char VAR_5; /* device type */
unsigned char removable; /* removable device */
#ifdef VAR_6
unsigned char VAR_7; /* device can use 48bit addr (ATA/ATAPI v7) */
#endif
CLASS_1 VAR_8; /* number of blocks */
unsigned long VAR_9; /* block size */
char VAR_10 [40+1]; /* IDE model, SCSI Vendor */
char VAR_11[20+1]; /* IDE Serial no, SCSI product */
char VAR_12[8+1]; /* firmware revision */
unsigned long (*FUNC_0)(int VAR_2,
unsigned long VAR_13,
CLASS_1 blkcnt,
void *VAR_14);
unsigned long (*FUNC_1)(int VAR_2,
unsigned long VAR_13,
CLASS_1 blkcnt,
const void *VAR_14);
unsigned long (*block_erase)(int VAR_2,
unsigned long VAR_13,
CLASS_1 blkcnt);
void *VAR_15; /* driver private struct pointer */
}block_dev_desc_t;
/* Interface types: */
#define VAR_16 0
#define VAR_17 1
#define VAR_18 2
#define VAR_19 3
#define VAR_20 4
#define VAR_21 5
#define VAR_22 6
#define VAR_23 7
#define VAR_24 8
/* Part types */
#define VAR_25 0x00
#define VAR_26 0x01
#define VAR_27 0x02
#define VAR_28 0x03
#define VAR_29 0x04
#define VAR_30 0x05
/*
* Type string for U-Boot bootable partitions
*/
#define VAR_31 "U-Boot" /* primary boot partition type */
#define VAR_32 "PPCBoot" /* PPCBoot compatibility type */
/* device types */
#define VAR_33 0xff /* not connected */
#define DEV_TYPE_HARDDISK 0x00 /* harddisk */
#define VAR_34 0x01 /* Tape */
#define VAR_35 0x05 /* CD-ROM */
#define VAR_36 0x07 /* optical disk */
typedef struct CLASS_2 {
CLASS_3 VAR_13; /* # of first block in partition */
CLASS_3 size; /* number of blocks in partition */
CLASS_3 VAR_9; /* block size in bytes */
CLASS_4 VAR_37[32]; /* partition name */
CLASS_4 VAR_5[32]; /* string type description */
int VAR_38; /* Active/Bootable flag is set */
#ifdef VAR_39
char VAR_40[37]; /* filesystem UUID as string, if exists */
#endif
} ID_0;
/* Misc _get_dev functions */
#ifdef CONFIG_PARTITIONS
block_dev_desc_t *get_dev(const char *ifname, int VAR_2);
block_dev_desc_t* FUNC_2(int VAR_2);
block_dev_desc_t* FUNC_3(int VAR_2);
block_dev_desc_t* FUNC_4(int VAR_2);
block_dev_desc_t* FUNC_5(int VAR_2);
block_dev_desc_t* mmc_get_dev(int VAR_2);
block_dev_desc_t* FUNC_6(int VAR_2);
block_dev_desc_t* FUNC_7(int VAR_2);
/* disk/part.c */
int FUNC_8 (block_dev_desc_t * VAR_41, int VAR_42, CLASS_5 *VAR_43);
void FUNC_9 (block_dev_desc_t *VAR_41);
void FUNC_10 (block_dev_desc_t *VAR_41);
void FUNC_11(block_dev_desc_t *VAR_41);
int FUNC_12(const char *ifname, const char *VAR_44,
block_dev_desc_t **VAR_41);
int FUNC_13(const char *ifname, const char *dev_part_str,
block_dev_desc_t **VAR_41,
CLASS_5 *VAR_43, int VAR_45);
#else
static inline block_dev_desc_t *get_dev(const char *ifname, int VAR_2)
{ return NULL; }
static inline block_dev_desc_t* FUNC_2(int VAR_2) { return NULL; }
static inline block_dev_desc_t* FUNC_3(int VAR_2) { return NULL; }
static inline block_dev_desc_t* FUNC_4(int VAR_2) { return NULL; }
static inline block_dev_desc_t* FUNC_5(int VAR_2) { return NULL; }
static inline block_dev_desc_t* mmc_get_dev(int VAR_2) { return NULL; }
static inline block_dev_desc_t* FUNC_6(int VAR_2) { return NULL; }
static inline block_dev_desc_t* FUNC_7(int VAR_2) { return NULL; }
static inline int FUNC_8 (block_dev_desc_t * VAR_41, int VAR_42,
CLASS_5 *VAR_43) { return -1; }
static inline void FUNC_9 (block_dev_desc_t *VAR_41) {}
static inline void FUNC_10 (block_dev_desc_t *VAR_41) {}
static inline void FUNC_11(block_dev_desc_t *VAR_41) {}
static inline int FUNC_12(const char *ifname, const char *VAR_44,
block_dev_desc_t **VAR_41)
{ return -1; }
static inline int FUNC_13(const char *ifname,
const char *dev_part_str,
block_dev_desc_t **VAR_41,
CLASS_5 *VAR_43,
int VAR_45)
{ *VAR_41 = NULL; return -1; }
#endif
#ifdef VAR_46
/* disk/part_mac.c */
int FUNC_14 (block_dev_desc_t * VAR_41, int VAR_42, CLASS_5 *VAR_43);
void FUNC_15 (block_dev_desc_t *VAR_41);
int FUNC_16 (block_dev_desc_t *VAR_41);
#endif
#ifdef VAR_47
/* disk/part_dos.c */
int FUNC_17 (block_dev_desc_t * VAR_41, int VAR_42, CLASS_5 *VAR_43);
void FUNC_18 (block_dev_desc_t *VAR_41);
int FUNC_19 (block_dev_desc_t *VAR_41);
#endif
#ifdef VAR_48
/* disk/part_iso.c */
int FUNC_20 (block_dev_desc_t * VAR_41, int VAR_42, CLASS_5 *VAR_43);
void FUNC_21 (block_dev_desc_t *VAR_41);
int test_part_iso (block_dev_desc_t *VAR_41);
#endif
#ifdef VAR_49
/* disk/part_amiga.c */
int FUNC_22 (block_dev_desc_t * VAR_41, int VAR_42, CLASS_5 *VAR_43);
void FUNC_23 (block_dev_desc_t *VAR_41);
int FUNC_24 (block_dev_desc_t *VAR_41);
#endif
#ifdef VAR_50
#include <IMPORT_1>
/* disk/part_efi.c */
int FUNC_25 (block_dev_desc_t * VAR_41, int VAR_42, CLASS_5 *VAR_43);
void FUNC_26 (block_dev_desc_t *VAR_41);
int FUNC_27 (block_dev_desc_t *VAR_41);
/**
* write_gpt_table() - Write the GUID Partition Table to disk
*
* @param dev_desc - block device descriptor
* @param gpt_h - pointer to GPT header representation
* @param gpt_e - pointer to GPT partition table entries
*
* @return - zero on success, otherwise error
*/
int FUNC_28(block_dev_desc_t *VAR_41,
gpt_header *VAR_51, CLASS_6 *VAR_52);
/**
* gpt_fill_pte(): Fill the GPT partition table entry
*
* @param gpt_h - GPT header representation
* @param gpt_e - GPT partition table entries
* @param partitions - list of partitions
* @param parts - number of partitions
*
* @return zero on success
*/
int FUNC_29(gpt_header *VAR_51, CLASS_6 *VAR_52,
CLASS_5 *VAR_53, int parts);
/**
* gpt_fill_header(): Fill the GPT header
*
* @param dev_desc - block device descriptor
* @param gpt_h - GPT header representation
* @param str_guid - disk guid string representation
* @param parts_count - number of partitions
*
* @return - error on str_guid conversion error
*/
int FUNC_30(block_dev_desc_t *VAR_41, gpt_header *VAR_51,
char *VAR_54, int VAR_55);
/**
* gpt_restore(): Restore GPT partition table
*
* @param dev_desc - block device descriptor
* @param str_disk_guid - disk GUID
* @param partitions - list of partitions
* @param parts - number of partitions
*
* @return zero on success
*/
int gpt_restore(block_dev_desc_t *VAR_41, char *VAR_56,
CLASS_5 *VAR_53, const int VAR_55);
#endif
#endif /* _PART_H */
| 0.890367 | {'VAR_0': '_PART_H', 'IMPORT_0': 'ide.h', 'CLASS_0': 'block_dev_desc', 'VAR_1': 'if_type', 'VAR_2': 'dev', 'VAR_3': 'part_type', 'VAR_4': 'target', 'VAR_5': 'type', 'VAR_6': 'CONFIG_LBA48', 'VAR_7': 'lba48', 'CLASS_1': 'lbaint_t', 'VAR_8': 'lba', 'VAR_9': 'blksz', 'VAR_10': 'vendor', 'VAR_11': 'product', 'VAR_12': 'revision', 'FUNC_0': 'block_read', 'VAR_13': 'start', 'VAR_14': 'buffer', 'FUNC_1': 'block_write', 'VAR_15': 'priv', 'VAR_16': 'IF_TYPE_UNKNOWN', 'VAR_17': 'IF_TYPE_IDE', 'VAR_18': 'IF_TYPE_SCSI', 'VAR_19': 'IF_TYPE_ATAPI', 'VAR_20': 'IF_TYPE_USB', 'VAR_21': 'IF_TYPE_DOC', 'VAR_22': 'IF_TYPE_MMC', 'VAR_23': 'IF_TYPE_SD', 'VAR_24': 'IF_TYPE_SATA', 'VAR_25': 'PART_TYPE_UNKNOWN', 'VAR_26': 'PART_TYPE_MAC', 'VAR_27': 'PART_TYPE_DOS', 'VAR_28': 'PART_TYPE_ISO', 'VAR_29': 'PART_TYPE_AMIGA', 'VAR_30': 'PART_TYPE_EFI', 'VAR_31': 'BOOT_PART_TYPE', 'VAR_32': 'BOOT_PART_COMP', 'VAR_33': 'DEV_TYPE_UNKNOWN', 'VAR_34': 'DEV_TYPE_TAPE', 'VAR_35': 'DEV_TYPE_CDROM', 'VAR_36': 'DEV_TYPE_OPDISK', 'CLASS_2': 'disk_partition', 'CLASS_3': 'ulong', 'CLASS_4': 'uchar', 'VAR_37': 'name', 'VAR_38': 'bootable', 'VAR_39': 'CONFIG_PARTITION_UUIDS', 'VAR_40': 'uuid', 'ID_0': 'disk_partition_t', 'CLASS_5': 'disk_partition_t', 'FUNC_2': 'ide_get_dev', 'FUNC_3': 'sata_get_dev', 'FUNC_4': 'scsi_get_dev', 'FUNC_5': 'usb_stor_get_dev', 'FUNC_6': 'systemace_get_dev', 'FUNC_7': 'mg_disk_get_dev', 'FUNC_8': 'get_partition_info', 'VAR_41': 'dev_desc', 'VAR_42': 'part', 'VAR_43': 'info', 'FUNC_9': 'print_part', 'FUNC_10': 'init_part', 'FUNC_11': 'dev_print', 'FUNC_12': 'get_device', 'VAR_44': 'dev_str', 'FUNC_13': 'get_device_and_partition', 'VAR_45': 'allow_whole_dev', 'VAR_46': 'CONFIG_MAC_PARTITION', 'FUNC_14': 'get_partition_info_mac', 'FUNC_15': 'print_part_mac', 'FUNC_16': 'test_part_mac', 'VAR_47': 'CONFIG_DOS_PARTITION', 'FUNC_17': 'get_partition_info_dos', 'FUNC_18': 'print_part_dos', 'FUNC_19': 'test_part_dos', 'VAR_48': 'CONFIG_ISO_PARTITION', 'FUNC_20': 'get_partition_info_iso', 'FUNC_21': 'print_part_iso', 'VAR_49': 'CONFIG_AMIGA_PARTITION', 'FUNC_22': 'get_partition_info_amiga', 'FUNC_23': 'print_part_amiga', 'FUNC_24': 'test_part_amiga', 'VAR_50': 'CONFIG_EFI_PARTITION', 'IMPORT_1': 'part_efi.h', 'FUNC_25': 'get_partition_info_efi', 'FUNC_26': 'print_part_efi', 'FUNC_27': 'test_part_efi', 'FUNC_28': 'write_gpt_table', 'VAR_51': 'gpt_h', 'CLASS_6': 'gpt_entry', 'VAR_52': 'gpt_e', 'FUNC_29': 'gpt_fill_pte', 'VAR_53': 'partitions', 'FUNC_30': 'gpt_fill_header', 'VAR_54': 'str_guid', 'VAR_55': 'parts_count', 'VAR_56': 'str_disk_guid'} |
#include <stdio.h>
long n;
void nhap()
{
long dem=0,i=1,j;
scanf("%d",&n);
while ((dem+i*5)<n)
{
dem+=i*5;
i*=2;
}
j=1;
while (i+dem<n)
{
dem+=i;
j++;
}
if (j==1) printf("Sheldon");
if (j==2) printf("Leonard");
if (j==3) printf("Penny");
if (j==4) printf("Rajesh");
if (j==5) printf("Howard");
}
int main()
{
nhap();
return 0;
}
| #include <stdio.h>
long n;
void FUNC_0()
{
long dem=0,VAR_0=1,VAR_1;
scanf("%d",&n);
while ((dem+VAR_0*5)<n)
{
dem+=VAR_0*5;
VAR_0*=2;
}
VAR_1=1;
while (VAR_0+dem<n)
{
dem+=VAR_0;
VAR_1++;
}
if (VAR_1==1) printf("Sheldon");
if (VAR_1==2) printf("Leonard");
if (VAR_1==3) printf("Penny");
if (VAR_1==4) printf("Rajesh");
if (VAR_1==5) printf("Howard");
}
int FUNC_1()
{
FUNC_0();
return 0;
}
| 0.162476 | {'FUNC_0': 'nhap', 'VAR_0': 'i', 'VAR_1': 'j', 'FUNC_1': 'main'} |
/*
* This file is part of the Simutrans-Extended project under the Artistic License.
* (see LICENSE.txt)
*/
#ifndef GUI_FACTORYLIST_STATS_T_H
#define GUI_FACTORYLIST_STATS_T_H
#include "../tpl/vector_tpl.h"
#include "components/gui_component.h"
class fabrik_t;
namespace factorylist {
enum sort_mode_t {
by_name = 0,
by_available,
by_output,
by_maxprod,
by_status,
by_power,
by_sector,
by_staffing,
by_operation_rate,
by_region,
SORT_MODES,
// the last two are unused
by_input,
by_transit
};
};
/**
* Factory list stats display
* Where factory stats are calculated for list dialog
*/
class factorylist_stats_t : public gui_world_component_t
{
private:
vector_tpl<fabrik_t*> fab_list;
uint32 line_selected;
factorylist::sort_mode_t sortby;
bool sortreverse;
bool filter_own_network;
uint8 filter_goods_catg;
public:
factorylist_stats_t(factorylist::sort_mode_t sortby, bool sortreverse, bool own_network, uint8 goods_catg_index);
void sort(factorylist::sort_mode_t sortby, bool sortreverse, bool own_network, uint8 goods_catg_index);
uint8 display_mode = 0;
bool infowin_event(event_t const*) OVERRIDE;
/**
* Recalc the size required to display everything and set size (size).
*/
void recalc_size();
/* char const* get_text() const OVERRIDE { return fab->get_name(); }
bool infowin_event(const event_t *) OVERRIDE;
bool is_valid() const OVERRIDE;
void set_size(scr_size size) OVERRIDE;
*/
void draw(scr_coord offset) OVERRIDE;
};
#endif
| /*
* This file is part of the Simutrans-Extended project under the Artistic License.
* (see LICENSE.txt)
*/
#ifndef GUI_FACTORYLIST_STATS_T_H
#define GUI_FACTORYLIST_STATS_T_H
#include "IMPORT_0"
#include "components/gui_component.h"
CLASS_0 fabrik_t;
namespace factorylist {
enum CLASS_1 {
VAR_1 = 0,
by_available,
by_output,
VAR_2,
VAR_3,
VAR_4,
by_sector,
by_staffing,
VAR_5,
VAR_6,
VAR_7,
// the last two are unused
VAR_8,
by_transit
};
};
/**
* Factory list stats display
* Where factory stats are calculated for list dialog
*/
CLASS_0 VAR_9 : VAR_10 VAR_11
{
private:
VAR_12<fabrik_t*> fab_list;
CLASS_2 VAR_13;
factorylist::VAR_0 sortby;
bool sortreverse;
bool VAR_14;
uint8 filter_goods_catg;
public:
FUNC_0(factorylist::VAR_0 sortby, VAR_15 sortreverse, VAR_15 VAR_16, uint8 VAR_17);
void sort(factorylist::VAR_0 sortby, bool sortreverse, bool VAR_16, uint8 VAR_17);
uint8 display_mode = 0;
bool FUNC_1(CLASS_3 const*) OVERRIDE;
/**
* Recalc the size required to display everything and set size (size).
*/
void recalc_size();
/* char const* get_text() const OVERRIDE { return fab->get_name(); }
bool infowin_event(const event_t *) OVERRIDE;
bool is_valid() const OVERRIDE;
void set_size(scr_size size) OVERRIDE;
*/
void FUNC_2(scr_coord offset) OVERRIDE;
};
#endif
| 0.428189 | {'IMPORT_0': '../tpl/vector_tpl.h', 'CLASS_0': 'class', 'CLASS_1': 'sort_mode_t', 'VAR_0': 'sort_mode_t', 'VAR_1': 'by_name', 'VAR_2': 'by_maxprod', 'VAR_3': 'by_status', 'VAR_4': 'by_power', 'VAR_5': 'by_operation_rate', 'VAR_6': 'by_region', 'VAR_7': 'SORT_MODES', 'VAR_8': 'by_input', 'VAR_9': 'factorylist_stats_t', 'FUNC_0': 'factorylist_stats_t', 'VAR_10': 'public', 'VAR_11': 'gui_world_component_t', 'VAR_12': 'vector_tpl', 'CLASS_2': 'uint32', 'VAR_13': 'line_selected', 'VAR_14': 'filter_own_network', 'VAR_15': 'bool', 'VAR_16': 'own_network', 'VAR_17': 'goods_catg_index', 'FUNC_1': 'infowin_event', 'CLASS_3': 'event_t', 'FUNC_2': 'draw'} |
/**************************************************************************
* National Semiconductor COP410 Emulator *
* *
* Copyright (C) 2006 MAME Team *
**************************************************************************/
#define ROM(A) cpu_readop(A)
#define RAM_W(A,V) (data_write_byte_8(A,V))
#define RAM_R(A) (data_read_byte_8(A))
#define IN(A) io_read_byte_8(A)
#define OUT(A,V) io_write_byte_8(A,V)
#define A R.A
#define B R.B
#define C R.C
#define G R.G
#define Q R.Q
#define EN R.EN
#define SA R.SA
#define SB R.SB
#define SIO R.SIO
#define SKL R.SKL
#define PC R.PC
#define prevPC R.PREVPC
#define skip R.skip
#define skipLBI R.skipLBI
#define READ_M RAM_R(B)
#define WRITE_M(VAL) RAM_W(B,VAL)
#define IN_G() IN(COP400_PORT_G)
#define IN_L() IN(COP400_PORT_L)
#define OUT_G(A) OUT(COP400_PORT_G, (A) & R.G_mask)
#define OUT_L(A) OUT(COP400_PORT_L, (A))
#define OUT_D(A) OUT(COP400_PORT_D, (A) & R.D_mask)
#define OUT_SK(A) OUT(COP400_PORT_SK,A)
#ifndef PUSH
#define PUSH(addr) { SB = SA; SA = addr; }
#define POP() { PC = SA; SA = SB; }
#endif
INLINE void illegal(void)
{
logerror("ICOP400: PC = %04x, Illegal opcode = %02x\n", PC-1, ROM(PC-1));
}
INLINE void WRITE_SK(UINT8 data)
{
SKL = data;
if (EN & 0x01)
{
OUT_SK(SKL);
}
else
{
// NOT IMPLEMENTED
OUT_SK(SKL);
}
}
INLINE void WRITE_Q(UINT8 data)
{
Q = data;
if (EN & 0x04)
{
OUT_L(Q);
}
}
INLINE void WRITE_G(UINT8 data)
{
G = data;
OUT_G(G);
}
INLINE void add(void) { A = (A + RAM_R(B)) & 0x0F; }
INLINE void asc(void)
{
A = A + C + RAM_R(B);
if (A > 0xF)
{
C = 1;
skip = 1;
A &= 0xF;
}
else
{
C = 0;
}
}
INLINE void AISC(int y)
{
A = A + y;
if (A > 0xF)
{
skip = 1;
A &= 0xF;
}
}
INLINE void aisc1(void) { AISC(0x1); }
INLINE void aisc2(void) { AISC(0x2); }
INLINE void aisc3(void) { AISC(0x3); }
INLINE void aisc4(void) { AISC(0x4); }
INLINE void aisc5(void) { AISC(0x5); }
INLINE void aisc6(void) { AISC(0x6); }
INLINE void aisc7(void) { AISC(0x7); }
INLINE void aisc8(void) { AISC(0x8); }
INLINE void aisc9(void) { AISC(0x9); }
INLINE void aisc10(void) { AISC(0xA); }
INLINE void aisc11(void) { AISC(0xB); }
INLINE void aisc12(void) { AISC(0xC); }
INLINE void aisc13(void) { AISC(0xD); }
INLINE void aisc14(void) { AISC(0xE); }
INLINE void aisc15(void) { AISC(0xF); }
INLINE void cab(void) { B = (B & 0x30) | A; }
INLINE void camq(void) { WRITE_Q((A << 4) | READ_M); }
INLINE void cba(void) { A = B & 0xF; }
INLINE void clra(void){ A = 0; }
INLINE void comp(void) { A = A ^ 0xF; }
INLINE void ing(void) { A = IN_G(); }
INLINE void inl(void)
{
UINT8 L = IN_L();
RAM_W(B, L >> 4);
A = L & 0xF;
}
INLINE void jid(void)
{
UINT16 addr = (PC & 0x300) | (A << 4) | READ_M;
PC = (PC & 0x300) | ROM(addr);
}
INLINE void JMP(UINT8 a8)
{
PC = (a8 << 8) | ROM(PC);
}
INLINE void jmp0(void) { JMP(0); }
INLINE void jmp1(void) { JMP(1); }
INLINE void jmp2(void) { JMP(2); }
INLINE void jmp3(void) { JMP(3); }
INLINE void jp(void)
{
UINT8 op = ROM(prevPC);
if (((PC & 0x3E0) >= 0x80) && ((PC & 0x3E0) < 0x100)) //JP pages 2,3
{
PC = (UINT16)((PC & 0x380) | (op & 0x7F));
}
else
{
if ((op & 0xC0) == 0xC0) //JP other pages
{
PC = (UINT16)((PC & 0x3C0) | (op & 0x3F));
}
else //JSRP
{
PUSH((UINT16)(PC));
PC = (UINT16)(0x80 | (op & 0x3F));
}
}
}
INLINE void JSR(UINT8 a8)
{
PUSH(PC + 1);
PC = (a8 << 8) | ROM(PC);
}
INLINE void jsr0(void) { JSR(0); }
INLINE void jsr1(void) { JSR(1); }
INLINE void jsr2(void) { JSR(2); }
INLINE void jsr3(void) { JSR(3); }
INLINE void LD(UINT8 r)
{
A = RAM_R(B);
B = B ^ (r << 4);
}
INLINE void ld0(void) { LD(0); }
INLINE void ld1(void) { LD(1); }
INLINE void ld2(void) { LD(2); }
INLINE void ld3(void) { LD(3); }
INLINE void LBI(UINT8 r, UINT8 d)
{
B = (r << 4) | d;
skipLBI = 1;
}
INLINE void lbi0_0(void) { LBI(0,0); }
INLINE void lbi0_1(void) { LBI(0,1); }
INLINE void lbi0_2(void) { LBI(0,2); }
INLINE void lbi0_3(void) { LBI(0,3); }
INLINE void lbi0_4(void) { LBI(0,4); }
INLINE void lbi0_5(void) { LBI(0,5); }
INLINE void lbi0_6(void) { LBI(0,6); }
INLINE void lbi0_7(void) { LBI(0,7); }
INLINE void lbi0_8(void) { LBI(0,8); }
INLINE void lbi0_9(void) { LBI(0,9); }
INLINE void lbi0_10(void) { LBI(0,10); }
INLINE void lbi0_11(void) { LBI(0,11); }
INLINE void lbi0_12(void) { LBI(0,12); }
INLINE void lbi0_13(void) { LBI(0,13); }
INLINE void lbi0_14(void) { LBI(0,14); }
INLINE void lbi0_15(void) { LBI(0,15); }
INLINE void lbi1_0(void) { LBI(1,0); }
INLINE void lbi1_1(void) { LBI(1,1); }
INLINE void lbi1_2(void) { LBI(1,2); }
INLINE void lbi1_3(void) { LBI(1,3); }
INLINE void lbi1_4(void) { LBI(1,4); }
INLINE void lbi1_5(void) { LBI(1,5); }
INLINE void lbi1_6(void) { LBI(1,6); }
INLINE void lbi1_7(void) { LBI(1,7); }
INLINE void lbi1_8(void) { LBI(1,8); }
INLINE void lbi1_9(void) { LBI(1,9); }
INLINE void lbi1_10(void) { LBI(1,10); }
INLINE void lbi1_11(void) { LBI(1,11); }
INLINE void lbi1_12(void) { LBI(1,12); }
INLINE void lbi1_13(void) { LBI(1,13); }
INLINE void lbi1_14(void) { LBI(1,14); }
INLINE void lbi1_15(void) { LBI(1,15); }
INLINE void lbi2_0(void) { LBI(2,0); }
INLINE void lbi2_1(void) { LBI(2,1); }
INLINE void lbi2_2(void) { LBI(2,2); }
INLINE void lbi2_3(void) { LBI(2,3); }
INLINE void lbi2_4(void) { LBI(2,4); }
INLINE void lbi2_5(void) { LBI(2,5); }
INLINE void lbi2_6(void) { LBI(2,6); }
INLINE void lbi2_7(void) { LBI(2,7); }
INLINE void lbi2_8(void) { LBI(2,8); }
INLINE void lbi2_9(void) { LBI(2,9); }
INLINE void lbi2_10(void) { LBI(2,10); }
INLINE void lbi2_11(void) { LBI(2,11); }
INLINE void lbi2_12(void) { LBI(2,12); }
INLINE void lbi2_13(void) { LBI(2,13); }
INLINE void lbi2_14(void) { LBI(2,14); }
INLINE void lbi2_15(void) { LBI(2,15); }
INLINE void lbi3_0(void) { LBI(3,0); }
INLINE void lbi3_1(void) { LBI(3,1); }
INLINE void lbi3_2(void) { LBI(3,2); }
INLINE void lbi3_3(void) { LBI(3,3); }
INLINE void lbi3_4(void) { LBI(3,4); }
INLINE void lbi3_5(void) { LBI(3,5); }
INLINE void lbi3_6(void) { LBI(3,6); }
INLINE void lbi3_7(void) { LBI(3,7); }
INLINE void lbi3_8(void) { LBI(3,8); }
INLINE void lbi3_9(void) { LBI(3,9); }
INLINE void lbi3_10(void) { LBI(3,10); }
INLINE void lbi3_11(void) { LBI(3,11); }
INLINE void lbi3_12(void) { LBI(3,12); }
INLINE void lbi3_13(void) { LBI(3,13); }
INLINE void lbi3_14(void) { LBI(3,14); }
INLINE void lbi3_15(void) { LBI(3,15); }
INLINE void LEI(UINT8 y)
{
EN = y & 0x0f;
WRITE_Q(Q);
}
INLINE void lei0(void) { LEI(0); }
INLINE void lei1(void) { LEI(1); }
INLINE void lei2(void) { LEI(2); }
INLINE void lei3(void) { LEI(3); }
INLINE void lei4(void) { LEI(4); }
INLINE void lei5(void) { LEI(5); }
INLINE void lei6(void) { LEI(6); }
INLINE void lei7(void) { LEI(7); }
INLINE void lei8(void) { LEI(8); }
INLINE void lei9(void) { LEI(9); }
INLINE void lei10(void) { LEI(10); }
INLINE void lei11(void) { LEI(11); }
INLINE void lei12(void) { LEI(12); }
INLINE void lei13(void) { LEI(13); }
INLINE void lei14(void) { LEI(14); }
INLINE void lei15(void) { LEI(15); }
INLINE void lqid(void)
{
PUSH(PC + 1);
PC = (UINT16)((PC & 0x300) | (A << 4) | READ_M);
WRITE_Q(ROM(PC));
POP();
}
INLINE void nop(void) { }
INLINE void obd(void) { OUT_D(B); }
INLINE void omg(void) { WRITE_G(RAM_R(B)); }
INLINE void rc(void) { C = 0; }
INLINE void ret(void) { POP(); }
INLINE void retsk(void) { POP(); skip = 1; }
INLINE void rmb0(void) { RAM_W(B, RAM_R(B) & 0xE); }
INLINE void rmb1(void) { RAM_W(B, RAM_R(B) & 0xD); }
INLINE void rmb2(void) { RAM_W(B, RAM_R(B) & 0xB); }
INLINE void rmb3(void) { RAM_W(B, RAM_R(B) & 0x7); }
INLINE void sc(void) { C = 1; }
INLINE void skc(void) { if (C == 1) skip = 1; }
INLINE void ske(void) { if (A == RAM_R(B)) skip = 1; }
INLINE void skmbz0(void) { if ((RAM_R(B) & 0x01) == 0 ) skip = 1; }
INLINE void skmbz1(void) { if ((RAM_R(B) & 0x02) == 0 ) skip = 1; }
INLINE void skmbz2(void) { if ((RAM_R(B) & 0x04) == 0 ) skip = 1; }
INLINE void skmbz3(void) { if ((RAM_R(B) & 0x08) == 0 ) skip = 1; }
INLINE void skgbz0(void) { if ((IN_G() & 0x01) == 0) skip = 1; }
INLINE void skgbz1(void) { if ((IN_G() & 0x02) == 0) skip = 1; }
INLINE void skgbz2(void) { if ((IN_G() & 0x04) == 0) skip = 1; }
INLINE void skgbz3(void) { if ((IN_G() & 0x08) == 0) skip = 1; }
INLINE void skgz(void) { if (IN_G() == 0) skip = 1; }
INLINE void smb0(void) { RAM_W(B, RAM_R(B) | 0x1); }
INLINE void smb1(void) { RAM_W(B, RAM_R(B) | 0x2); }
INLINE void smb2(void) { RAM_W(B, RAM_R(B) | 0x4); }
INLINE void smb3(void) { RAM_W(B, RAM_R(B) | 0x8); }
INLINE void STII(UINT8 y)
{
UINT16 Bd;
RAM_W(B, y);
Bd = (B & 0x0f) + 1;
if (Bd > 15) Bd = 0;
B = (B & 0x30) + Bd;
}
INLINE void stii0(void) { STII(0x0); }
INLINE void stii1(void) { STII(0x1); }
INLINE void stii2(void) { STII(0x2); }
INLINE void stii3(void) { STII(0x3); }
INLINE void stii4(void) { STII(0x4); }
INLINE void stii5(void) { STII(0x5); }
INLINE void stii6(void) { STII(0x6); }
INLINE void stii7(void) { STII(0x7); }
INLINE void stii8(void) { STII(0x8); }
INLINE void stii9(void) { STII(0x9); }
INLINE void stii10(void) { STII(0xA); }
INLINE void stii11(void) { STII(0xB); }
INLINE void stii12(void) { STII(0xC); }
INLINE void stii13(void) { STII(0xD); }
INLINE void stii14(void) { STII(0xE); }
INLINE void stii15(void) { STII(0xF); }
INLINE void X(UINT8 r)
{
UINT8 t = RAM_R(B);
RAM_W(B, A);
A = t;
B = B ^ (r << 4);
}
INLINE void x0(void) { X(0); }
INLINE void x1(void) { X(1); }
INLINE void x2(void) { X(2); }
INLINE void x3(void) { X(3); }
INLINE void xad(void)
{
UINT8 addr = ROM(PC++) & 0x3f;
UINT8 t = A;
A = RAM_R(addr);
RAM_W(addr, t);
}
INLINE void xas(void)
{
UINT8 t = SIO;
SIO = A;
A = t;
WRITE_SK(C);
}
INLINE void XDS(UINT8 r)
{
UINT8 t, Bd, Br;
t = RAM_R(B);
RAM_W(B, A);
A = t;
Br = (UINT8)((B & 0x30) ^ (r << 4));
Bd = (UINT8)((B & 0x0F) - 1);
B = (UINT8)(Br | (Bd & 0x0F));
if (Bd == 0xFF) skip = 1;
}
INLINE void XIS(UINT8 r)
{
UINT8 t, Bd, Br;
t = RAM_R(B);
RAM_W(B, A);
A = t;
Br = (UINT8)((B & 0x30) ^ (r << 4));
Bd = (UINT8)((B & 0x0F) + 1);
B = (UINT8)(Br | (Bd & 0x0F));
if (Bd == 0x10) skip = 1;
}
INLINE void xis0(void) { XIS(0); }
INLINE void xis1(void) { XIS(1); }
INLINE void xis2(void) { XIS(2); }
INLINE void xis3(void) { XIS(3); }
INLINE void xds0(void) { XDS(0); }
INLINE void xds1(void) { XDS(1); }
INLINE void xds2(void) { XDS(2); }
INLINE void xds3(void) { XDS(3); }
INLINE void xor(void) { A = RAM_R(B) ^ A; }
| /**************************************************************************
* National Semiconductor COP410 Emulator *
* *
* Copyright (C) 2006 MAME Team *
**************************************************************************/
#define ROM(VAR_0) cpu_readop(A)
#define RAM_W(VAR_0,V) (data_write_byte_8(A,V))
#define RAM_R(VAR_0) (data_read_byte_8(A))
#define IN(VAR_0) io_read_byte_8(A)
#define OUT(VAR_0,V) io_write_byte_8(A,V)
#define VAR_0 R.A
#define B R.B
#define C R.C
#define G R.G
#define VAR_1 R.Q
#define EN R.EN
#define VAR_2 R.SA
#define SB R.SB
#define VAR_3 R.SIO
#define SKL R.SKL
#define PC R.PC
#define prevPC R.PREVPC
#define skip R.skip
#define VAR_4 R.skipLBI
#define READ_M RAM_R(B)
#define FUNC_0(VAL) RAM_W(B,VAL)
#define IN_G() IN(COP400_PORT_G)
#define FUNC_1() IN(COP400_PORT_L)
#define OUT_G(VAR_0) OUT(COP400_PORT_G, (A) & R.G_mask)
#define OUT_L(VAR_0) OUT(COP400_PORT_L, (A))
#define FUNC_2(VAR_0) OUT(COP400_PORT_D, (A) & R.D_mask)
#define FUNC_3(VAR_0) OUT(COP400_PORT_SK,A)
#ifndef VAR_5
#define FUNC_4(VAR_6) { SB = SA; SA = addr; }
#define POP() { PC = SA; SA = SB; }
#endif
CLASS_0 void FUNC_5(void)
{
logerror("ICOP400: PC = %04x, Illegal opcode = %02x\n", PC-1, ROM(PC-1));
}
CLASS_0 void FUNC_6(UINT8 data)
{
SKL = data;
if (EN & 0x01)
{
FUNC_3(SKL);
}
else
{
// NOT IMPLEMENTED
FUNC_3(SKL);
}
}
CLASS_0 void WRITE_Q(UINT8 data)
{
VAR_1 = data;
if (EN & 0x04)
{
OUT_L(VAR_1);
}
}
CLASS_0 void WRITE_G(UINT8 data)
{
G = data;
OUT_G(G);
}
CLASS_0 void add(void) { VAR_0 = (VAR_0 + RAM_R(B)) & 0x0F; }
CLASS_0 void asc(void)
{
VAR_0 = VAR_0 + C + RAM_R(B);
if (VAR_0 > 0xF)
{
C = 1;
skip = 1;
VAR_0 &= 0xF;
}
else
{
C = 0;
}
}
CLASS_0 void AISC(int y)
{
VAR_0 = VAR_0 + y;
if (VAR_0 > 0xF)
{
skip = 1;
VAR_0 &= 0xF;
}
}
CLASS_0 void aisc1(void) { AISC(0x1); }
CLASS_0 void FUNC_7(void) { AISC(0x2); }
CLASS_0 void FUNC_8(void) { AISC(0x3); }
CLASS_0 void aisc4(void) { AISC(0x4); }
CLASS_0 void FUNC_9(void) { AISC(0x5); }
CLASS_0 void aisc6(void) { AISC(0x6); }
CLASS_0 void aisc7(void) { AISC(0x7); }
CLASS_0 void aisc8(void) { AISC(0x8); }
CLASS_0 void aisc9(void) { AISC(0x9); }
CLASS_0 void aisc10(void) { AISC(0xA); }
CLASS_0 void aisc11(void) { AISC(0xB); }
CLASS_0 void FUNC_10(void) { AISC(0xC); }
CLASS_0 void aisc13(void) { AISC(0xD); }
CLASS_0 void aisc14(void) { AISC(0xE); }
CLASS_0 void aisc15(void) { AISC(0xF); }
CLASS_0 void FUNC_11(void) { B = (B & 0x30) | VAR_0; }
CLASS_0 void camq(void) { WRITE_Q((VAR_0 << 4) | READ_M); }
CLASS_0 void FUNC_12(void) { VAR_0 = B & 0xF; }
CLASS_0 void FUNC_13(void){ VAR_0 = 0; }
CLASS_0 void FUNC_14(void) { VAR_0 = VAR_0 ^ 0xF; }
CLASS_0 void ing(void) { VAR_0 = IN_G(); }
CLASS_0 void inl(void)
{
UINT8 L = FUNC_1();
RAM_W(B, L >> 4);
VAR_0 = L & 0xF;
}
CLASS_0 void jid(void)
{
UINT16 VAR_6 = (PC & 0x300) | (VAR_0 << 4) | READ_M;
PC = (PC & 0x300) | ROM(VAR_6);
}
CLASS_0 void JMP(UINT8 a8)
{
PC = (a8 << 8) | ROM(PC);
}
CLASS_0 void jmp0(void) { JMP(0); }
CLASS_0 void jmp1(void) { JMP(1); }
CLASS_0 void jmp2(void) { JMP(2); }
CLASS_0 void jmp3(void) { JMP(3); }
CLASS_0 void FUNC_15(void)
{
UINT8 op = ROM(prevPC);
if (((PC & 0x3E0) >= 0x80) && ((PC & 0x3E0) < 0x100)) //JP pages 2,3
{
PC = (UINT16)((PC & 0x380) | (op & 0x7F));
}
else
{
if ((op & 0xC0) == 0xC0) //JP other pages
{
PC = (UINT16)((PC & 0x3C0) | (op & 0x3F));
}
else //JSRP
{
FUNC_4((UINT16)(PC));
PC = (UINT16)(0x80 | (op & 0x3F));
}
}
}
CLASS_0 void JSR(UINT8 a8)
{
FUNC_4(PC + 1);
PC = (a8 << 8) | ROM(PC);
}
CLASS_0 void FUNC_16(void) { JSR(0); }
CLASS_0 void FUNC_17(void) { JSR(1); }
CLASS_0 void jsr2(void) { JSR(2); }
CLASS_0 void jsr3(void) { JSR(3); }
CLASS_0 void LD(UINT8 r)
{
VAR_0 = RAM_R(B);
B = B ^ (r << 4);
}
CLASS_0 void FUNC_18(void) { LD(0); }
CLASS_0 void FUNC_19(void) { LD(1); }
CLASS_0 void ld2(void) { LD(2); }
CLASS_0 void ld3(void) { LD(3); }
CLASS_0 void LBI(UINT8 r, UINT8 d)
{
B = (r << 4) | d;
VAR_4 = 1;
}
CLASS_0 void FUNC_20(void) { LBI(0,0); }
CLASS_0 void lbi0_1(void) { LBI(0,1); }
CLASS_0 void lbi0_2(void) { LBI(0,2); }
CLASS_0 void lbi0_3(void) { LBI(0,3); }
CLASS_0 void lbi0_4(void) { LBI(0,4); }
CLASS_0 void FUNC_21(void) { LBI(0,5); }
CLASS_0 void lbi0_6(void) { LBI(0,6); }
CLASS_0 void FUNC_22(void) { LBI(0,7); }
CLASS_0 void FUNC_23(void) { LBI(0,8); }
CLASS_0 void lbi0_9(void) { LBI(0,9); }
CLASS_0 void lbi0_10(void) { LBI(0,10); }
CLASS_0 void FUNC_24(void) { LBI(0,11); }
CLASS_0 void lbi0_12(void) { LBI(0,12); }
CLASS_0 void FUNC_25(void) { LBI(0,13); }
CLASS_0 void lbi0_14(void) { LBI(0,14); }
CLASS_0 void lbi0_15(void) { LBI(0,15); }
CLASS_0 void lbi1_0(void) { LBI(1,0); }
CLASS_0 void FUNC_26(void) { LBI(1,1); }
CLASS_0 void FUNC_27(void) { LBI(1,2); }
CLASS_0 void FUNC_28(void) { LBI(1,3); }
CLASS_0 void FUNC_29(void) { LBI(1,4); }
CLASS_0 void lbi1_5(void) { LBI(1,5); }
CLASS_0 void FUNC_30(void) { LBI(1,6); }
CLASS_0 void FUNC_31(void) { LBI(1,7); }
CLASS_0 void FUNC_32(void) { LBI(1,8); }
CLASS_0 void lbi1_9(void) { LBI(1,9); }
CLASS_0 void lbi1_10(void) { LBI(1,10); }
CLASS_0 void FUNC_33(void) { LBI(1,11); }
CLASS_0 void lbi1_12(void) { LBI(1,12); }
CLASS_0 void lbi1_13(void) { LBI(1,13); }
CLASS_0 void FUNC_34(void) { LBI(1,14); }
CLASS_0 void lbi1_15(void) { LBI(1,15); }
CLASS_0 void lbi2_0(void) { LBI(2,0); }
CLASS_0 void lbi2_1(void) { LBI(2,1); }
CLASS_0 void FUNC_35(void) { LBI(2,2); }
CLASS_0 void lbi2_3(void) { LBI(2,3); }
CLASS_0 void FUNC_36(void) { LBI(2,4); }
CLASS_0 void lbi2_5(void) { LBI(2,5); }
CLASS_0 void lbi2_6(void) { LBI(2,6); }
CLASS_0 void lbi2_7(void) { LBI(2,7); }
CLASS_0 void lbi2_8(void) { LBI(2,8); }
CLASS_0 void FUNC_37(void) { LBI(2,9); }
CLASS_0 void lbi2_10(void) { LBI(2,10); }
CLASS_0 void lbi2_11(void) { LBI(2,11); }
CLASS_0 void FUNC_38(void) { LBI(2,12); }
CLASS_0 void lbi2_13(void) { LBI(2,13); }
CLASS_0 void lbi2_14(void) { LBI(2,14); }
CLASS_0 void lbi2_15(void) { LBI(2,15); }
CLASS_0 void lbi3_0(void) { LBI(3,0); }
CLASS_0 void lbi3_1(void) { LBI(3,1); }
CLASS_0 void FUNC_39(void) { LBI(3,2); }
CLASS_0 void lbi3_3(void) { LBI(3,3); }
CLASS_0 void lbi3_4(void) { LBI(3,4); }
CLASS_0 void lbi3_5(void) { LBI(3,5); }
CLASS_0 void lbi3_6(void) { LBI(3,6); }
CLASS_0 void lbi3_7(void) { LBI(3,7); }
CLASS_0 void FUNC_40(void) { LBI(3,8); }
CLASS_0 void FUNC_41(void) { LBI(3,9); }
CLASS_0 void FUNC_42(void) { LBI(3,10); }
CLASS_0 void FUNC_43(void) { LBI(3,11); }
CLASS_0 void lbi3_12(void) { LBI(3,12); }
CLASS_0 void FUNC_44(void) { LBI(3,13); }
CLASS_0 void FUNC_45(void) { LBI(3,14); }
CLASS_0 void lbi3_15(void) { LBI(3,15); }
CLASS_0 void LEI(UINT8 y)
{
EN = y & 0x0f;
WRITE_Q(VAR_1);
}
CLASS_0 void lei0(void) { LEI(0); }
CLASS_0 void FUNC_46(void) { LEI(1); }
CLASS_0 void lei2(void) { LEI(2); }
CLASS_0 void lei3(void) { LEI(3); }
CLASS_0 void lei4(void) { LEI(4); }
CLASS_0 void lei5(void) { LEI(5); }
CLASS_0 void lei6(void) { LEI(6); }
CLASS_0 void FUNC_47(void) { LEI(7); }
CLASS_0 void FUNC_48(void) { LEI(8); }
CLASS_0 void lei9(void) { LEI(9); }
CLASS_0 void FUNC_49(void) { LEI(10); }
CLASS_0 void lei11(void) { LEI(11); }
CLASS_0 void lei12(void) { LEI(12); }
CLASS_0 void FUNC_50(void) { LEI(13); }
CLASS_0 void FUNC_51(void) { LEI(14); }
CLASS_0 void lei15(void) { LEI(15); }
CLASS_0 void lqid(void)
{
FUNC_4(PC + 1);
PC = (UINT16)((PC & 0x300) | (VAR_0 << 4) | READ_M);
WRITE_Q(ROM(PC));
POP();
}
CLASS_0 void nop(void) { }
CLASS_0 void FUNC_52(void) { FUNC_2(B); }
CLASS_0 void omg(void) { WRITE_G(RAM_R(B)); }
CLASS_0 void FUNC_53(void) { C = 0; }
CLASS_0 void ret(void) { POP(); }
CLASS_0 void retsk(void) { POP(); skip = 1; }
CLASS_0 void FUNC_54(void) { RAM_W(B, RAM_R(B) & 0xE); }
CLASS_0 void rmb1(void) { RAM_W(B, RAM_R(B) & 0xD); }
CLASS_0 void rmb2(void) { RAM_W(B, RAM_R(B) & 0xB); }
CLASS_0 void rmb3(void) { RAM_W(B, RAM_R(B) & 0x7); }
CLASS_0 void sc(void) { C = 1; }
CLASS_0 void skc(void) { if (C == 1) skip = 1; }
CLASS_0 void ske(void) { if (VAR_0 == RAM_R(B)) skip = 1; }
CLASS_0 void skmbz0(void) { if ((RAM_R(B) & 0x01) == 0 ) skip = 1; }
CLASS_0 void FUNC_55(void) { if ((RAM_R(B) & 0x02) == 0 ) skip = 1; }
CLASS_0 void skmbz2(void) { if ((RAM_R(B) & 0x04) == 0 ) skip = 1; }
CLASS_0 void FUNC_56(void) { if ((RAM_R(B) & 0x08) == 0 ) skip = 1; }
CLASS_0 void skgbz0(void) { if ((IN_G() & 0x01) == 0) skip = 1; }
CLASS_0 void skgbz1(void) { if ((IN_G() & 0x02) == 0) skip = 1; }
CLASS_0 void skgbz2(void) { if ((IN_G() & 0x04) == 0) skip = 1; }
CLASS_0 void skgbz3(void) { if ((IN_G() & 0x08) == 0) skip = 1; }
CLASS_0 void FUNC_57(void) { if (IN_G() == 0) skip = 1; }
CLASS_0 void smb0(void) { RAM_W(B, RAM_R(B) | 0x1); }
CLASS_0 void FUNC_58(void) { RAM_W(B, RAM_R(B) | 0x2); }
CLASS_0 void smb2(void) { RAM_W(B, RAM_R(B) | 0x4); }
CLASS_0 void smb3(void) { RAM_W(B, RAM_R(B) | 0x8); }
CLASS_0 void STII(UINT8 y)
{
UINT16 Bd;
RAM_W(B, y);
Bd = (B & 0x0f) + 1;
if (Bd > 15) Bd = 0;
B = (B & 0x30) + Bd;
}
CLASS_0 void FUNC_59(void) { STII(0x0); }
CLASS_0 void FUNC_60(void) { STII(0x1); }
CLASS_0 void stii2(void) { STII(0x2); }
CLASS_0 void stii3(void) { STII(0x3); }
CLASS_0 void FUNC_61(void) { STII(0x4); }
CLASS_0 void FUNC_62(void) { STII(0x5); }
CLASS_0 void stii6(void) { STII(0x6); }
CLASS_0 void stii7(void) { STII(0x7); }
CLASS_0 void stii8(void) { STII(0x8); }
CLASS_0 void FUNC_63(void) { STII(0x9); }
CLASS_0 void stii10(void) { STII(0xA); }
CLASS_0 void FUNC_64(void) { STII(0xB); }
CLASS_0 void stii12(void) { STII(0xC); }
CLASS_0 void FUNC_65(void) { STII(0xD); }
CLASS_0 void stii14(void) { STII(0xE); }
CLASS_0 void FUNC_66(void) { STII(0xF); }
CLASS_0 void X(UINT8 r)
{
UINT8 VAR_7 = RAM_R(B);
RAM_W(B, VAR_0);
VAR_0 = VAR_7;
B = B ^ (r << 4);
}
CLASS_0 void x0(void) { X(0); }
CLASS_0 void x1(void) { X(1); }
CLASS_0 void x2(void) { X(2); }
CLASS_0 void x3(void) { X(3); }
CLASS_0 void xad(void)
{
UINT8 VAR_6 = ROM(PC++) & 0x3f;
UINT8 VAR_7 = VAR_0;
VAR_0 = RAM_R(VAR_6);
RAM_W(VAR_6, VAR_7);
}
CLASS_0 void xas(void)
{
UINT8 VAR_7 = VAR_3;
VAR_3 = VAR_0;
VAR_0 = VAR_7;
FUNC_6(C);
}
CLASS_0 void XDS(UINT8 r)
{
UINT8 VAR_7, Bd, Br;
VAR_7 = RAM_R(B);
RAM_W(B, VAR_0);
VAR_0 = VAR_7;
Br = (UINT8)((B & 0x30) ^ (r << 4));
Bd = (UINT8)((B & 0x0F) - 1);
B = (UINT8)(Br | (Bd & 0x0F));
if (Bd == 0xFF) skip = 1;
}
CLASS_0 void XIS(UINT8 r)
{
UINT8 VAR_7, Bd, Br;
VAR_7 = RAM_R(B);
RAM_W(B, VAR_0);
VAR_0 = VAR_7;
Br = (UINT8)((B & 0x30) ^ (r << 4));
Bd = (UINT8)((B & 0x0F) + 1);
B = (UINT8)(Br | (Bd & 0x0F));
if (Bd == 0x10) skip = 1;
}
CLASS_0 void xis0(void) { XIS(0); }
CLASS_0 void FUNC_67(void) { XIS(1); }
CLASS_0 void FUNC_68(void) { XIS(2); }
CLASS_0 void xis3(void) { XIS(3); }
CLASS_0 void FUNC_69(void) { XDS(0); }
CLASS_0 void xds1(void) { XDS(1); }
CLASS_0 void FUNC_70(void) { XDS(2); }
CLASS_0 void FUNC_71(void) { XDS(3); }
CLASS_0 void FUNC_72(void) { VAR_0 = RAM_R(B) ^ VAR_0; }
| 0.306933 | {'VAR_0': 'A', 'VAR_1': 'Q', 'VAR_2': 'SA', 'VAR_3': 'SIO', 'VAR_4': 'skipLBI', 'FUNC_0': 'WRITE_M', 'FUNC_1': 'IN_L', 'FUNC_2': 'OUT_D', 'FUNC_3': 'OUT_SK', 'VAR_5': 'PUSH', 'FUNC_4': 'PUSH', 'VAR_6': 'addr', 'CLASS_0': 'INLINE', 'FUNC_5': 'illegal', 'FUNC_6': 'WRITE_SK', 'FUNC_7': 'aisc2', 'FUNC_8': 'aisc3', 'FUNC_9': 'aisc5', 'FUNC_10': 'aisc12', 'FUNC_11': 'cab', 'FUNC_12': 'cba', 'FUNC_13': 'clra', 'FUNC_14': 'comp', 'FUNC_15': 'jp', 'FUNC_16': 'jsr0', 'FUNC_17': 'jsr1', 'FUNC_18': 'ld0', 'FUNC_19': 'ld1', 'FUNC_20': 'lbi0_0', 'FUNC_21': 'lbi0_5', 'FUNC_22': 'lbi0_7', 'FUNC_23': 'lbi0_8', 'FUNC_24': 'lbi0_11', 'FUNC_25': 'lbi0_13', 'FUNC_26': 'lbi1_1', 'FUNC_27': 'lbi1_2', 'FUNC_28': 'lbi1_3', 'FUNC_29': 'lbi1_4', 'FUNC_30': 'lbi1_6', 'FUNC_31': 'lbi1_7', 'FUNC_32': 'lbi1_8', 'FUNC_33': 'lbi1_11', 'FUNC_34': 'lbi1_14', 'FUNC_35': 'lbi2_2', 'FUNC_36': 'lbi2_4', 'FUNC_37': 'lbi2_9', 'FUNC_38': 'lbi2_12', 'FUNC_39': 'lbi3_2', 'FUNC_40': 'lbi3_8', 'FUNC_41': 'lbi3_9', 'FUNC_42': 'lbi3_10', 'FUNC_43': 'lbi3_11', 'FUNC_44': 'lbi3_13', 'FUNC_45': 'lbi3_14', 'FUNC_46': 'lei1', 'FUNC_47': 'lei7', 'FUNC_48': 'lei8', 'FUNC_49': 'lei10', 'FUNC_50': 'lei13', 'FUNC_51': 'lei14', 'FUNC_52': 'obd', 'FUNC_53': 'rc', 'FUNC_54': 'rmb0', 'FUNC_55': 'skmbz1', 'FUNC_56': 'skmbz3', 'FUNC_57': 'skgz', 'FUNC_58': 'smb1', 'FUNC_59': 'stii0', 'FUNC_60': 'stii1', 'FUNC_61': 'stii4', 'FUNC_62': 'stii5', 'FUNC_63': 'stii9', 'FUNC_64': 'stii11', 'FUNC_65': 'stii13', 'FUNC_66': 'stii15', 'VAR_7': 't', 'FUNC_67': 'xis1', 'FUNC_68': 'xis2', 'FUNC_69': 'xds0', 'FUNC_70': 'xds2', 'FUNC_71': 'xds3', 'FUNC_72': 'xor'} |
/*
* EDAC PCI component
*
* Author: Dave Jiang <djiang@mvista.com>
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*
*/
#include <asm/page.h>
#include <linux/uaccess.h>
#include <linux/ctype.h>
#include <linux/highmem.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/smp.h>
#include <linux/spinlock.h>
#include <linux/sysctl.h>
#include <linux/timer.h>
#include "edac_pci.h"
#include "edac_module.h"
static DEFINE_MUTEX(edac_pci_ctls_mutex);
static LIST_HEAD(edac_pci_list);
static atomic_t pci_indexes = ATOMIC_INIT(0);
struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
const char *edac_pci_name)
{
struct edac_pci_ctl_info *pci;
void *p = NULL, *pvt;
unsigned int size;
edac_dbg(1, "\n");
pci = edac_align_ptr(&p, sizeof(*pci), 1);
pvt = edac_align_ptr(&p, 1, sz_pvt);
size = ((unsigned long)pvt) + sz_pvt;
/* Alloc the needed control struct memory */
pci = kzalloc(size, GFP_KERNEL);
if (pci == NULL)
return NULL;
/* Now much private space */
pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;
pci->pvt_info = pvt;
pci->op_state = OP_ALLOC;
snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);
return pci;
}
EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
{
edac_dbg(1, "\n");
edac_pci_remove_sysfs(pci);
}
EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);
/*
* find_edac_pci_by_dev()
* scans the edac_pci list for a specific 'struct device *'
*
* return NULL if not found, or return control struct pointer
*/
static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
{
struct edac_pci_ctl_info *pci;
struct list_head *item;
edac_dbg(1, "\n");
list_for_each(item, &edac_pci_list) {
pci = list_entry(item, struct edac_pci_ctl_info, link);
if (pci->dev == dev)
return pci;
}
return NULL;
}
/*
* add_edac_pci_to_global_list
* Before calling this function, caller must assign a unique value to
* edac_dev->pci_idx.
* Return:
* 0 on success
* 1 on failure
*/
static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
{
struct list_head *item, *insert_before;
struct edac_pci_ctl_info *rover;
edac_dbg(1, "\n");
insert_before = &edac_pci_list;
/* Determine if already on the list */
rover = find_edac_pci_by_dev(pci->dev);
if (unlikely(rover != NULL))
goto fail0;
/* Insert in ascending order by 'pci_idx', so find position */
list_for_each(item, &edac_pci_list) {
rover = list_entry(item, struct edac_pci_ctl_info, link);
if (rover->pci_idx >= pci->pci_idx) {
if (unlikely(rover->pci_idx == pci->pci_idx))
goto fail1;
insert_before = item;
break;
}
}
list_add_tail_rcu(&pci->link, insert_before);
return 0;
fail0:
edac_printk(KERN_WARNING, EDAC_PCI,
"%s (%s) %s %s already assigned %d\n",
dev_name(rover->dev), edac_dev_name(rover),
rover->mod_name, rover->ctl_name, rover->pci_idx);
return 1;
fail1:
edac_printk(KERN_WARNING, EDAC_PCI,
"but in low-level driver: attempt to assign\n"
"\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
__func__);
return 1;
}
/*
* del_edac_pci_from_global_list
*
* remove the PCI control struct from the global list
*/
static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
{
list_del_rcu(&pci->link);
/* these are for safe removal of devices from global list while
* NMI handlers may be traversing list
*/
synchronize_rcu();
INIT_LIST_HEAD(&pci->link);
}
/*
* edac_pci_workq_function()
*
* periodic function that performs the operation
* scheduled by a workq request, for a given PCI control struct
*/
static void edac_pci_workq_function(struct work_struct *work_req)
{
struct delayed_work *d_work = to_delayed_work(work_req);
struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
int msec;
unsigned long delay;
edac_dbg(3, "checking\n");
mutex_lock(&edac_pci_ctls_mutex);
if (pci->op_state != OP_RUNNING_POLL) {
mutex_unlock(&edac_pci_ctls_mutex);
return;
}
if (edac_pci_get_check_errors())
pci->edac_check(pci);
/* if we are on a one second period, then use round */
msec = edac_pci_get_poll_msec();
if (msec == 1000)
delay = round_jiffies_relative(msecs_to_jiffies(msec));
else
delay = msecs_to_jiffies(msec);
edac_queue_work(&pci->work, delay);
mutex_unlock(&edac_pci_ctls_mutex);
}
int edac_pci_alloc_index(void)
{
return atomic_inc_return(&pci_indexes) - 1;
}
EXPORT_SYMBOL_GPL(edac_pci_alloc_index);
int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
{
edac_dbg(0, "\n");
pci->pci_idx = edac_idx;
pci->start_time = jiffies;
mutex_lock(&edac_pci_ctls_mutex);
if (add_edac_pci_to_global_list(pci))
goto fail0;
if (edac_pci_create_sysfs(pci)) {
edac_pci_printk(pci, KERN_WARNING,
"failed to create sysfs pci\n");
goto fail1;
}
if (pci->edac_check) {
pci->op_state = OP_RUNNING_POLL;
INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
edac_queue_work(&pci->work, msecs_to_jiffies(edac_pci_get_poll_msec()));
} else {
pci->op_state = OP_RUNNING_INTERRUPT;
}
edac_pci_printk(pci, KERN_INFO,
"Giving out device to module %s controller %s: DEV %s (%s)\n",
pci->mod_name, pci->ctl_name, pci->dev_name,
edac_op_state_to_string(pci->op_state));
mutex_unlock(&edac_pci_ctls_mutex);
return 0;
/* error unwind stack */
fail1:
del_edac_pci_from_global_list(pci);
fail0:
mutex_unlock(&edac_pci_ctls_mutex);
return 1;
}
EXPORT_SYMBOL_GPL(edac_pci_add_device);
struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
{
struct edac_pci_ctl_info *pci;
edac_dbg(0, "\n");
mutex_lock(&edac_pci_ctls_mutex);
/* ensure the control struct is on the global list
* if not, then leave
*/
pci = find_edac_pci_by_dev(dev);
if (pci == NULL) {
mutex_unlock(&edac_pci_ctls_mutex);
return NULL;
}
pci->op_state = OP_OFFLINE;
del_edac_pci_from_global_list(pci);
mutex_unlock(&edac_pci_ctls_mutex);
if (pci->edac_check)
edac_stop_work(&pci->work);
edac_printk(KERN_INFO, EDAC_PCI,
"Removed device %d for %s %s: DEV %s\n",
pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));
return pci;
}
EXPORT_SYMBOL_GPL(edac_pci_del_device);
/*
* edac_pci_generic_check
*
* a Generic parity check API
*/
static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
{
edac_dbg(4, "\n");
edac_pci_do_parity_check();
}
/* free running instance index counter */
static int edac_pci_idx;
#define EDAC_PCI_GENCTL_NAME "EDAC PCI controller"
struct edac_pci_gen_data {
int edac_idx;
};
struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
const char *mod_name)
{
struct edac_pci_ctl_info *pci;
struct edac_pci_gen_data *pdata;
pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
if (!pci)
return NULL;
pdata = pci->pvt_info;
pci->dev = dev;
dev_set_drvdata(pci->dev, pci);
pci->dev_name = pci_name(to_pci_dev(dev));
pci->mod_name = mod_name;
pci->ctl_name = EDAC_PCI_GENCTL_NAME;
if (edac_op_state == EDAC_OPSTATE_POLL)
pci->edac_check = edac_pci_generic_check;
pdata->edac_idx = edac_pci_idx++;
if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
edac_dbg(3, "failed edac_pci_add_device()\n");
edac_pci_free_ctl_info(pci);
return NULL;
}
return pci;
}
EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
{
edac_dbg(0, "pci mod=%s\n", pci->mod_name);
edac_pci_del_device(pci->dev);
edac_pci_free_ctl_info(pci);
}
EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);
| /*
* EDAC PCI component
*
* Author: Dave Jiang <djiang@mvista.com>
*
* 2007 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*
*/
#include <IMPORT_0>
#include <IMPORT_1>
#include <IMPORT_2>
#include <IMPORT_3>
#include <IMPORT_4>
#include <IMPORT_5>
#include <IMPORT_6>
#include <IMPORT_7>
#include <IMPORT_8>
#include <IMPORT_9>
#include <linux/timer.h>
#include "IMPORT_10"
#include "IMPORT_11"
static CLASS_0(VAR_0);
static CLASS_1(VAR_1);
static CLASS_2 VAR_2 = FUNC_0(0);
struct CLASS_3 *edac_pci_alloc_ctl_info(unsigned int VAR_4,
const char *VAR_5)
{
struct CLASS_3 *VAR_6;
void *VAR_7 = NULL, *pvt;
unsigned int VAR_8;
FUNC_1(1, "\n");
VAR_6 = edac_align_ptr(&VAR_7, sizeof(*VAR_6), 1);
pvt = edac_align_ptr(&VAR_7, 1, VAR_4);
VAR_8 = ((unsigned long)pvt) + VAR_4;
/* Alloc the needed control struct memory */
VAR_6 = FUNC_2(VAR_8, VAR_9);
if (VAR_6 == NULL)
return NULL;
/* Now much private space */
pvt = VAR_4 ? ((char *)VAR_6) + ((unsigned long)pvt) : NULL;
VAR_6->pvt_info = pvt;
VAR_6->VAR_10 = VAR_11;
FUNC_3(VAR_6->name, FUNC_4(VAR_5) + 1, "%s", VAR_5);
return VAR_6;
}
FUNC_5(edac_pci_alloc_ctl_info);
void FUNC_6(struct CLASS_3 *VAR_6)
{
FUNC_1(1, "\n");
FUNC_7(VAR_6);
}
FUNC_5(VAR_12);
/*
* find_edac_pci_by_dev()
* scans the edac_pci list for a specific 'struct device *'
*
* return NULL if not found, or return control struct pointer
*/
static struct CLASS_3 *find_edac_pci_by_dev(struct CLASS_4 *VAR_13)
{
struct CLASS_3 *VAR_6;
struct CLASS_5 *VAR_14;
FUNC_1(1, "\n");
FUNC_8(VAR_14, &VAR_1) {
VAR_6 = FUNC_9(VAR_14, VAR_15 VAR_3, VAR_16);
if (VAR_6->VAR_13 == VAR_13)
return VAR_6;
}
return NULL;
}
/*
* add_edac_pci_to_global_list
* Before calling this function, caller must assign a unique value to
* edac_dev->pci_idx.
* Return:
* 0 on success
* 1 on failure
*/
static int add_edac_pci_to_global_list(struct CLASS_3 *VAR_6)
{
struct CLASS_5 *VAR_14, *insert_before;
struct CLASS_3 *VAR_17;
FUNC_1(1, "\n");
insert_before = &VAR_1;
/* Determine if already on the list */
VAR_17 = find_edac_pci_by_dev(VAR_6->VAR_13);
if (FUNC_10(VAR_17 != NULL))
goto fail0;
/* Insert in ascending order by 'pci_idx', so find position */
FUNC_8(VAR_14, &VAR_1) {
VAR_17 = FUNC_9(VAR_14, VAR_15 VAR_3, VAR_16);
if (VAR_17->VAR_18 >= VAR_6->VAR_18) {
if (FUNC_10(VAR_17->VAR_18 == VAR_6->VAR_18))
goto fail1;
insert_before = VAR_14;
break;
}
}
FUNC_11(&VAR_6->VAR_16, insert_before);
return 0;
fail0:
edac_printk(VAR_19, VAR_20,
"%s (%s) %s %s already assigned %d\n",
FUNC_12(VAR_17->VAR_13), FUNC_13(VAR_17),
VAR_17->VAR_22, VAR_17->VAR_23, VAR_17->VAR_18);
return 1;
fail1:
edac_printk(VAR_19, VAR_20,
"but in low-level driver: attempt to assign\n"
"\tduplicate pci_idx %d in %s()\n", VAR_17->VAR_18,
VAR_24);
return 1;
}
/*
* del_edac_pci_from_global_list
*
* remove the PCI control struct from the global list
*/
static void FUNC_14(struct CLASS_3 *VAR_6)
{
FUNC_15(&VAR_6->VAR_16);
/* these are for safe removal of devices from global list while
* NMI handlers may be traversing list
*/
FUNC_16();
FUNC_17(&VAR_6->VAR_16);
}
/*
* edac_pci_workq_function()
*
* periodic function that performs the operation
* scheduled by a workq request, for a given PCI control struct
*/
static void FUNC_18(struct CLASS_6 *VAR_26)
{
struct CLASS_7 *VAR_27 = FUNC_19(VAR_26);
struct CLASS_3 *VAR_6 = to_edac_pci_ctl_work(VAR_27);
int VAR_28;
unsigned long VAR_29;
FUNC_1(3, "checking\n");
FUNC_20(&VAR_0);
if (VAR_6->VAR_10 != VAR_30) {
FUNC_21(&VAR_0);
return;
}
if (FUNC_22())
VAR_6->FUNC_23(VAR_6);
/* if we are on a one second period, then use round */
VAR_28 = FUNC_24();
if (VAR_28 == 1000)
VAR_29 = FUNC_25(FUNC_26(VAR_28));
else
VAR_29 = FUNC_26(VAR_28);
FUNC_27(&VAR_6->work, VAR_29);
FUNC_21(&VAR_0);
}
int FUNC_28(void)
{
return FUNC_29(&VAR_2) - 1;
}
FUNC_5(VAR_32);
int FUNC_30(struct CLASS_3 *VAR_6, int VAR_34)
{
FUNC_1(0, "\n");
VAR_6->VAR_18 = VAR_34;
VAR_6->VAR_35 = VAR_36;
FUNC_20(&VAR_0);
if (add_edac_pci_to_global_list(VAR_6))
goto fail0;
if (FUNC_31(VAR_6)) {
edac_pci_printk(VAR_6, VAR_19,
"failed to create sysfs pci\n");
goto fail1;
}
if (VAR_6->VAR_31) {
VAR_6->VAR_10 = VAR_30;
INIT_DELAYED_WORK(&VAR_6->work, VAR_25);
FUNC_27(&VAR_6->work, FUNC_26(FUNC_24()));
} else {
VAR_6->VAR_10 = OP_RUNNING_INTERRUPT;
}
edac_pci_printk(VAR_6, VAR_37,
"Giving out device to module %s controller %s: DEV %s (%s)\n",
VAR_6->VAR_22, VAR_6->VAR_23, VAR_6->VAR_21,
edac_op_state_to_string(VAR_6->VAR_10));
FUNC_21(&VAR_0);
return 0;
/* error unwind stack */
fail1:
FUNC_14(VAR_6);
fail0:
FUNC_21(&VAR_0);
return 1;
}
FUNC_5(VAR_33);
struct CLASS_3 *FUNC_32(struct CLASS_4 *VAR_13)
{
struct CLASS_3 *VAR_6;
FUNC_1(0, "\n");
FUNC_20(&VAR_0);
/* ensure the control struct is on the global list
* if not, then leave
*/
VAR_6 = find_edac_pci_by_dev(VAR_13);
if (VAR_6 == NULL) {
FUNC_21(&VAR_0);
return NULL;
}
VAR_6->VAR_10 = OP_OFFLINE;
FUNC_14(VAR_6);
FUNC_21(&VAR_0);
if (VAR_6->VAR_31)
FUNC_33(&VAR_6->work);
edac_printk(VAR_37, VAR_20,
"Removed device %d for %s %s: DEV %s\n",
VAR_6->VAR_18, VAR_6->VAR_22, VAR_6->VAR_23, FUNC_13(VAR_6));
return VAR_6;
}
FUNC_5(VAR_38);
/*
* edac_pci_generic_check
*
* a Generic parity check API
*/
static void FUNC_34(struct CLASS_3 *VAR_6)
{
FUNC_1(4, "\n");
FUNC_35();
}
/* free running instance index counter */
static int VAR_40;
#define VAR_41 "EDAC PCI controller"
struct CLASS_8 {
int VAR_34;
};
struct CLASS_3 *FUNC_36(struct CLASS_4 *VAR_13,
const char *VAR_22)
{
struct CLASS_3 *VAR_6;
struct CLASS_8 *VAR_43;
VAR_6 = edac_pci_alloc_ctl_info(sizeof(*VAR_43), VAR_41);
if (!VAR_6)
return NULL;
VAR_43 = VAR_6->pvt_info;
VAR_6->VAR_13 = VAR_13;
FUNC_37(VAR_6->VAR_13, VAR_6);
VAR_6->VAR_21 = FUNC_38(FUNC_39(VAR_13));
VAR_6->VAR_22 = VAR_22;
VAR_6->VAR_23 = VAR_41;
if (VAR_44 == VAR_45)
VAR_6->VAR_31 = VAR_39;
VAR_43->VAR_34 = VAR_40++;
if (FUNC_30(VAR_6, VAR_43->VAR_34) > 0) {
FUNC_1(3, "failed edac_pci_add_device()\n");
FUNC_6(VAR_6);
return NULL;
}
return VAR_6;
}
FUNC_5(VAR_42);
void FUNC_40(struct CLASS_3 *VAR_6)
{
FUNC_1(0, "pci mod=%s\n", VAR_6->VAR_22);
FUNC_32(VAR_6->VAR_13);
FUNC_6(VAR_6);
}
FUNC_5(VAR_46);
| 0.845143 | {'IMPORT_0': 'asm/page.h', 'IMPORT_1': 'linux/uaccess.h', 'IMPORT_2': 'linux/ctype.h', 'IMPORT_3': 'linux/highmem.h', 'IMPORT_4': 'linux/init.h', 'IMPORT_5': 'linux/module.h', 'IMPORT_6': 'linux/slab.h', 'IMPORT_7': 'linux/smp.h', 'IMPORT_8': 'linux/spinlock.h', 'IMPORT_9': 'linux/sysctl.h', 'IMPORT_10': 'edac_pci.h', 'IMPORT_11': 'edac_module.h', 'CLASS_0': 'DEFINE_MUTEX', 'VAR_0': 'edac_pci_ctls_mutex', 'CLASS_1': 'LIST_HEAD', 'VAR_1': 'edac_pci_list', 'CLASS_2': 'atomic_t', 'VAR_2': 'pci_indexes', 'FUNC_0': 'ATOMIC_INIT', 'CLASS_3': 'edac_pci_ctl_info', 'VAR_3': 'edac_pci_ctl_info', 'VAR_4': 'sz_pvt', 'VAR_5': 'edac_pci_name', 'VAR_6': 'pci', 'VAR_7': 'p', 'VAR_8': 'size', 'FUNC_1': 'edac_dbg', 'FUNC_2': 'kzalloc', 'VAR_9': 'GFP_KERNEL', 'VAR_10': 'op_state', 'VAR_11': 'OP_ALLOC', 'FUNC_3': 'snprintf', 'FUNC_4': 'strlen', 'FUNC_5': 'EXPORT_SYMBOL_GPL', 'FUNC_6': 'edac_pci_free_ctl_info', 'VAR_12': 'edac_pci_free_ctl_info', 'FUNC_7': 'edac_pci_remove_sysfs', 'CLASS_4': 'device', 'VAR_13': 'dev', 'CLASS_5': 'list_head', 'VAR_14': 'item', 'FUNC_8': 'list_for_each', 'FUNC_9': 'list_entry', 'VAR_15': 'struct', 'VAR_16': 'link', 'VAR_17': 'rover', 'FUNC_10': 'unlikely', 'VAR_18': 'pci_idx', 'FUNC_11': 'list_add_tail_rcu', 'VAR_19': 'KERN_WARNING', 'VAR_20': 'EDAC_PCI', 'FUNC_12': 'dev_name', 'VAR_21': 'dev_name', 'FUNC_13': 'edac_dev_name', 'VAR_22': 'mod_name', 'VAR_23': 'ctl_name', 'VAR_24': '__func__', 'FUNC_14': 'del_edac_pci_from_global_list', 'FUNC_15': 'list_del_rcu', 'FUNC_16': 'synchronize_rcu', 'FUNC_17': 'INIT_LIST_HEAD', 'FUNC_18': 'edac_pci_workq_function', 'VAR_25': 'edac_pci_workq_function', 'CLASS_6': 'work_struct', 'VAR_26': 'work_req', 'CLASS_7': 'delayed_work', 'VAR_27': 'd_work', 'FUNC_19': 'to_delayed_work', 'VAR_28': 'msec', 'VAR_29': 'delay', 'FUNC_20': 'mutex_lock', 'VAR_30': 'OP_RUNNING_POLL', 'FUNC_21': 'mutex_unlock', 'FUNC_22': 'edac_pci_get_check_errors', 'FUNC_23': 'edac_check', 'VAR_31': 'edac_check', 'FUNC_24': 'edac_pci_get_poll_msec', 'FUNC_25': 'round_jiffies_relative', 'FUNC_26': 'msecs_to_jiffies', 'FUNC_27': 'edac_queue_work', 'FUNC_28': 'edac_pci_alloc_index', 'VAR_32': 'edac_pci_alloc_index', 'FUNC_29': 'atomic_inc_return', 'FUNC_30': 'edac_pci_add_device', 'VAR_33': 'edac_pci_add_device', 'VAR_34': 'edac_idx', 'VAR_35': 'start_time', 'VAR_36': 'jiffies', 'FUNC_31': 'edac_pci_create_sysfs', 'VAR_37': 'KERN_INFO', 'FUNC_32': 'edac_pci_del_device', 'VAR_38': 'edac_pci_del_device', 'FUNC_33': 'edac_stop_work', 'FUNC_34': 'edac_pci_generic_check', 'VAR_39': 'edac_pci_generic_check', 'FUNC_35': 'edac_pci_do_parity_check', 'VAR_40': 'edac_pci_idx', 'VAR_41': 'EDAC_PCI_GENCTL_NAME', 'CLASS_8': 'edac_pci_gen_data', 'FUNC_36': 'edac_pci_create_generic_ctl', 'VAR_42': 'edac_pci_create_generic_ctl', 'VAR_43': 'pdata', 'FUNC_37': 'dev_set_drvdata', 'FUNC_38': 'pci_name', 'FUNC_39': 'to_pci_dev', 'VAR_44': 'edac_op_state', 'VAR_45': 'EDAC_OPSTATE_POLL', 'FUNC_40': 'edac_pci_release_generic_ctl', 'VAR_46': 'edac_pci_release_generic_ctl'} |
#include <stdint.h>
#include <stdlib.h>
#include <kernel/panic.h>
#if UINT32_MAX == UINTPTR_MAX
#define STACK_CHK_GUARD 0xe2dee396
#else
#define STACK_CHK_GUARD 0x595e9fbd94fda766
#endif
uintptr_t __stack_chk_guard = STACK_CHK_GUARD;
__attribute__((noreturn))
void __stack_chk_fail(void)
{
#if __is_libc
abort();
#elif __is_libk
panic("Stack smashing detected");
#endif
while (1) { }
__builtin_unreachable();
}
| #include <IMPORT_0>
#include <IMPORT_1>
#include <IMPORT_2>
#if VAR_0 == VAR_1
#define VAR_2 0xe2dee396
#else
#define VAR_2 0x595e9fbd94fda766
#endif
uintptr_t VAR_3 = VAR_2;
__attribute__((VAR_4))
void FUNC_0(void)
{
#if VAR_5
abort();
#elif __is_libk
FUNC_1("Stack smashing detected");
#endif
while (1) { }
FUNC_2();
}
| 0.83957 | {'IMPORT_0': 'stdint.h', 'IMPORT_1': 'stdlib.h', 'IMPORT_2': 'kernel/panic.h', 'VAR_0': 'UINT32_MAX', 'VAR_1': 'UINTPTR_MAX', 'VAR_2': 'STACK_CHK_GUARD', 'VAR_3': '__stack_chk_guard', 'VAR_4': 'noreturn', 'FUNC_0': '__stack_chk_fail', 'VAR_5': '__is_libc', 'FUNC_1': 'panic', 'FUNC_2': '__builtin_unreachable'} |
#pragma once
#include "oxygine_include.h"
#include "Vector2.h"
#include "Matrix.h"
namespace oxygine
{
template<class T>
class AffineTransformT
{
public:
typedef VectorT2<T> vector2;
typedef AffineTransformT<T> affineTransform;
typedef MatrixT<T> matrix;
AffineTransformT() {}
AffineTransformT(T a_, T b_, T c_, T d_, T x_, T y_): a(a_), b(b_), c(c_), d(d_), x(x_), y(y_) {}
explicit AffineTransformT(const matrix& m)
{
a = m.ml[0];
b = m.ml[1];
c = m.ml[4];
d = m.ml[5];
x = m.ml[12];
y = m.ml[13];
}
void identity()
{
a = T(1);
b = T(0);
c = T(0);
d = T(1);
x = T(0);
y = T(0);
}
static affineTransform getIdentity()
{
affineTransform t;
t.identity();
return t;
}
void translate(const vector2& v)
{
x += a * v.x + c * v.y;
y += b * v.x + d * v.y;
}
affineTransform translated(const vector2& v) const
{
affineTransform t = *this;
t.translate(v);
return t;
}
void scale(const vector2& v)
{
a *= v.x;
b *= v.x;
c *= v.y;
d *= v.y;
}
affineTransform scaled(const vector2& v) const
{
affineTransform t = *this;
t.scale(v);
return t;
}
void rotate(T v)
{
T sin_ = scalar::sin(v);
T cos_ = scalar::cos(v);
affineTransform rot(cos_, sin_, -sin_, cos_, 0, 0);
*this = *this * rot;
}
affineTransform rotated(T v) const
{
affineTransform t = *this;
t.rotate(v);
return t;
}
void invert()
{
affineTransform t = *this;
T det = T(1) / (t.a * t.d - t.b * t.c);
a = det * t.d;
b = -det * t.b;
c = -det * t.c;
d = det * t.a;
x = det * (t.c * t.y - t.d * t.x);
y = det * (t.b * t.x - t.a * t.y);
}
affineTransform inverted() const
{
affineTransform t = *this;
t.invert();
return t;
}
operator matrix() const
{
return toMatrix();
}
matrix toMatrix() const
{
return matrix(
a, b, 0, 0,
c, d, 0, 0,
0, 0, 1, 0,
x, y, 0, 1
);
}
static affineTransform& multiply(affineTransform& out, const affineTransform& t1, const affineTransform& t2)
{
out.a = t1.a * t2.a + t1.b * t2.c;
out.b = t1.a * t2.b + t1.b * t2.d;
out.c = t1.c * t2.a + t1.d * t2.c;
out.d = t1.c * t2.b + t1.d * t2.d;
out.x = t1.x * t2.a + t1.y * t2.c + t2.x;
out.y = t1.x * t2.b + t1.y * t2.d + t2.y;
return out;
}
affineTransform operator * (const affineTransform& t2) const
{
affineTransform r;
multiply(r, *this, t2);
return r;
}
vector2 transform(const vector2& v) const
{
return vector2(
a * v.x + c * v.y + x,
b * v.x + d * v.y + y);
}
T a, b, c, d;
T x, y;
};
typedef AffineTransformT<float> AffineTransform;
}
| #pragma once
#include "IMPORT_0"
#include "IMPORT_1"
#include "IMPORT_2"
CLASS_0 VAR_0
{
VAR_1<VAR_2 VAR_3>
VAR_2 VAR_4
{
public:
VAR_5 VAR_6<VAR_3> VAR_7;
typedef CLASS_2<CLASS_1> ID_1;
typedef CLASS_5<CLASS_1> ID_2;
FUNC_1() {}
VAR_4(ID_0 VAR_9, VAR_3 VAR_10, VAR_3 VAR_11, VAR_3 d_, VAR_3 VAR_12, VAR_3 VAR_13): FUNC_4(CLASS_7), FUNC_5(CLASS_8), FUNC_6(CLASS_9), FUNC_7(d_), FUNC_8(CLASS_10), FUNC_9(CLASS_11) {}
CLASS_12 FUNC_1(const CLASS_6& VAR_20)
{
VAR_14 = VAR_20.VAR_21[0];
VAR_15 = VAR_20.VAR_21[1];
VAR_16 = VAR_20.VAR_21[4];
VAR_17 = VAR_20.VAR_21[5];
VAR_18 = VAR_20.VAR_21[12];
VAR_19 = VAR_20.VAR_21[13];
}
void FUNC_10()
{
VAR_14 = FUNC_0(1);
VAR_15 = FUNC_0(0);
VAR_16 = FUNC_0(0);
VAR_17 = FUNC_0(1);
VAR_18 = FUNC_0(0);
VAR_19 = FUNC_0(0);
}
static CLASS_4 FUNC_11()
{
CLASS_4 VAR_22;
VAR_22.FUNC_10();
return VAR_22;
}
void translate(const CLASS_3& VAR_23)
{
VAR_18 += VAR_14 * VAR_23.VAR_18 + VAR_16 * VAR_23.VAR_19;
VAR_19 += VAR_15 * VAR_23.VAR_18 + VAR_17 * VAR_23.VAR_19;
}
CLASS_4 FUNC_12(const CLASS_3& VAR_23) VAR_24
{
CLASS_4 VAR_22 = *VAR_25;
VAR_22.translate(VAR_23);
return VAR_22;
}
void FUNC_13(const CLASS_3& VAR_23)
{
VAR_14 *= VAR_23.VAR_18;
VAR_15 *= VAR_23.VAR_18;
VAR_16 *= VAR_23.VAR_19;
VAR_17 *= VAR_23.VAR_19;
}
CLASS_4 FUNC_14(const CLASS_3& VAR_23) VAR_24
{
CLASS_4 VAR_22 = *VAR_25;
VAR_22.FUNC_13(VAR_23);
return VAR_22;
}
void FUNC_15(CLASS_1 VAR_23)
{
CLASS_1 VAR_26 = VAR_27::FUNC_16(VAR_23);
CLASS_1 VAR_28 = VAR_27::FUNC_17(VAR_23);
CLASS_4 VAR_29(VAR_28, VAR_26, -VAR_26, VAR_28, 0, 0);
*VAR_25 = *VAR_25 * VAR_29;
}
CLASS_4 FUNC_18(CLASS_1 VAR_23) VAR_24
{
CLASS_4 VAR_22 = *VAR_25;
VAR_22.FUNC_15(VAR_23);
return VAR_22;
}
void FUNC_19()
{
CLASS_4 VAR_22 = *VAR_25;
CLASS_1 VAR_30 = FUNC_0(1) / (VAR_22.VAR_14 * VAR_22.VAR_17 - VAR_22.VAR_15 * VAR_22.VAR_16);
VAR_14 = VAR_30 * VAR_22.VAR_17;
VAR_15 = -VAR_30 * VAR_22.VAR_15;
VAR_16 = -VAR_30 * VAR_22.VAR_16;
VAR_17 = VAR_30 * VAR_22.VAR_14;
VAR_18 = VAR_30 * (VAR_22.VAR_16 * VAR_22.VAR_19 - VAR_22.VAR_17 * VAR_22.VAR_18);
VAR_19 = VAR_30 * (VAR_22.VAR_15 * VAR_22.VAR_18 - VAR_22.VAR_14 * VAR_22.VAR_19);
}
CLASS_4 FUNC_20() const
{
CLASS_4 VAR_22 = *VAR_25;
VAR_22.FUNC_19();
return VAR_22;
}
operator FUNC_3() const
{
return FUNC_21();
}
CLASS_6 FUNC_21() const
{
return FUNC_3(
VAR_14, VAR_15, 0, 0,
VAR_16, VAR_17, 0, 0,
0, 0, 1, 0,
VAR_18, VAR_19, 0, 1
);
}
static CLASS_4& FUNC_22(VAR_8& VAR_31, VAR_24 VAR_8& VAR_32, VAR_24 VAR_8& VAR_33)
{
VAR_31.VAR_14 = VAR_32.VAR_14 * VAR_33.VAR_14 + VAR_32.VAR_15 * VAR_33.VAR_16;
VAR_31.VAR_15 = VAR_32.VAR_14 * VAR_33.VAR_15 + VAR_32.VAR_15 * VAR_33.VAR_17;
VAR_31.VAR_16 = VAR_32.VAR_16 * VAR_33.VAR_14 + VAR_32.VAR_17 * VAR_33.VAR_16;
VAR_31.VAR_17 = VAR_32.VAR_16 * VAR_33.VAR_15 + VAR_32.VAR_17 * VAR_33.VAR_17;
VAR_31.VAR_18 = VAR_32.VAR_18 * VAR_33.VAR_14 + VAR_32.VAR_19 * VAR_33.VAR_16 + VAR_33.VAR_18;
VAR_31.VAR_19 = VAR_32.VAR_18 * VAR_33.VAR_15 + VAR_32.VAR_19 * VAR_33.VAR_17 + VAR_33.VAR_19;
return VAR_31;
}
CLASS_4 operator * (const CLASS_4& VAR_33) VAR_24
{
CLASS_4 VAR_34;
FUNC_22(VAR_34, *VAR_25, VAR_33);
return VAR_34;
}
CLASS_3 FUNC_23(const CLASS_3& VAR_23) VAR_24
{
return FUNC_2(
VAR_14 * VAR_23.VAR_18 + VAR_16 * VAR_23.VAR_19 + VAR_18,
VAR_15 * VAR_23.VAR_18 + VAR_17 * VAR_23.VAR_19 + VAR_19);
}
CLASS_1 VAR_14, VAR_15, VAR_16, VAR_17;
CLASS_1 VAR_18, VAR_19;
};
typedef CLASS_2<float> ID_3;
}
| 0.870298 | {'IMPORT_0': 'oxygine_include.h', 'IMPORT_1': 'Vector2.h', 'IMPORT_2': 'Matrix.h', 'CLASS_0': 'namespace', 'VAR_0': 'oxygine', 'VAR_1': 'template', 'VAR_2': 'class', 'VAR_3': 'T', 'CLASS_1': 'T', 'ID_0': 'T', 'FUNC_0': 'T', 'VAR_4': 'AffineTransformT', 'CLASS_2': 'AffineTransformT', 'FUNC_1': 'AffineTransformT', 'VAR_5': 'typedef', 'VAR_6': 'VectorT2', 'VAR_7': 'vector2', 'CLASS_3': 'vector2', 'FUNC_2': 'vector2', 'ID_1': 'affineTransform', 'CLASS_4': 'affineTransform', 'VAR_8': 'affineTransform', 'CLASS_5': 'MatrixT', 'ID_2': 'matrix', 'CLASS_6': 'matrix', 'FUNC_3': 'matrix', 'VAR_9': 'a_', 'CLASS_7': 'a_', 'VAR_10': 'b_', 'CLASS_8': 'b_', 'VAR_11': 'c_', 'CLASS_9': 'c_', 'VAR_12': 'x_', 'CLASS_10': 'x_', 'VAR_13': 'y_', 'CLASS_11': 'y_', 'FUNC_4': 'a', 'VAR_14': 'a', 'FUNC_5': 'b', 'VAR_15': 'b', 'FUNC_6': 'c', 'VAR_16': 'c', 'FUNC_7': 'd', 'VAR_17': 'd', 'FUNC_8': 'x', 'VAR_18': 'x', 'FUNC_9': 'y', 'VAR_19': 'y', 'CLASS_12': 'explicit', 'VAR_20': 'm', 'VAR_21': 'ml', 'FUNC_10': 'identity', 'FUNC_11': 'getIdentity', 'VAR_22': 't', 'VAR_23': 'v', 'FUNC_12': 'translated', 'VAR_24': 'const', 'VAR_25': 'this', 'FUNC_13': 'scale', 'FUNC_14': 'scaled', 'FUNC_15': 'rotate', 'VAR_26': 'sin_', 'VAR_27': 'scalar', 'FUNC_16': 'sin', 'VAR_28': 'cos_', 'FUNC_17': 'cos', 'VAR_29': 'rot', 'FUNC_18': 'rotated', 'FUNC_19': 'invert', 'VAR_30': 'det', 'FUNC_20': 'inverted', 'FUNC_21': 'toMatrix', 'FUNC_22': 'multiply', 'VAR_31': 'out', 'VAR_32': 't1', 'VAR_33': 't2', 'VAR_34': 'r', 'FUNC_23': 'transform', 'ID_3': 'AffineTransform'} |
#pragma once
#ifndef WARP_H
#define WARP_H
#include "tfxparam.h"
#include "trop.h"
#include "trasterfx.h"
//-----------------------------------------------------------------------
struct WarpParams {
int m_shrink;
double m_warperScale;
double m_intensity;
bool m_sharpen;
};
struct LPoint {
TPointD s; // Warped lattice point
TPointD d; // Original lattice point
};
struct Lattice {
int m_width; // Number of lattice columns
int m_height; // Number of lattice rows
LPoint *coords; // Grid vertex coordinates
Lattice() : coords(0) {}
~Lattice() {
if (coords) delete[] coords;
}
};
namespace // Ugly...
{
inline int myCeil(double x) {
return ((x - (int)(x)) > TConsts::epsilon ? (int)(x) + 1 : (int)(x));
}
inline TRect convert(const TRectD &r, TPointD &dp) {
TRect ri(tfloor(r.x0), tfloor(r.y0), myCeil(r.x1), myCeil(r.y1));
dp.x = r.x0 - ri.x0;
dp.y = r.y0 - ri.y0;
assert(dp.x >= 0 && dp.y >= 0);
return ri;
}
}
//---------------------------------------------------------------------------
inline double getWarpRadius(const WarpParams ¶ms) {
return 2.55 * 1.5 * 1.5 * fabs(params.m_intensity);
}
//---------------------------------------------------------------------------
inline double getWarperEnlargement(const WarpParams ¶ms) {
// It accounts for:
// * Resample factor (1 - due to triangle filtering)
// * Eventual grid smoothening (6 - as the blur radius applied after
// resampling)
// * grid interpolation (2 - for the shepard interpolant radius)
int enlargement = 3;
if (!params.m_sharpen) enlargement += 6;
return enlargement;
}
//---------------------------------------------------------------------------
void getWarpComputeRects(TRectD &outputComputeRect, TRectD &warpedComputeRect,
const TRectD &warpedBox, const TRectD &requestedRect,
const WarpParams ¶ms);
//---------------------------------------------------------------------------
//! Deals with raster tiles and invokes warper functions
void warp(TRasterP &tileRas, const TRasterP &rasIn, TRasterP &warper,
TPointD rasInPos, TPointD warperPos, const WarpParams ¶ms);
#endif
| #pragma once
#ifndef WARP_H
#define WARP_H
#include "tfxparam.h"
#include "trop.h"
#include "trasterfx.h"
//-----------------------------------------------------------------------
struct WarpParams {
int m_shrink;
double m_warperScale;
double m_intensity;
bool m_sharpen;
};
struct LPoint {
TPointD s; // Warped lattice point
TPointD d; // Original lattice point
};
struct CLASS_0 {
int m_width; // Number of lattice columns
int m_height; // Number of lattice rows
LPoint *coords; // Grid vertex coordinates
VAR_0() : coords(0) {}
~CLASS_0() {
if (coords) delete[] coords;
}
};
namespace // Ugly...
{
inline int myCeil(double x) {
return ((x - (int)(x)) > TConsts::epsilon ? (int)(x) + 1 : (int)(x));
}
inline TRect convert(const TRectD &r, TPointD &dp) {
TRect ri(tfloor(r.x0), tfloor(r.y0), myCeil(r.x1), myCeil(r.y1));
dp.x = r.x0 - ri.x0;
dp.y = r.y0 - ri.y0;
assert(dp.x >= 0 && dp.y >= 0);
return ri;
}
}
//---------------------------------------------------------------------------
inline double getWarpRadius(const WarpParams ¶ms) {
return 2.55 * 1.5 * 1.5 * fabs(params.m_intensity);
}
//---------------------------------------------------------------------------
inline double getWarperEnlargement(const WarpParams ¶ms) {
// It accounts for:
// * Resample factor (1 - due to triangle filtering)
// * Eventual grid smoothening (6 - as the blur radius applied after
// resampling)
// * grid interpolation (2 - for the shepard interpolant radius)
int enlargement = 3;
if (!params.m_sharpen) enlargement += 6;
return enlargement;
}
//---------------------------------------------------------------------------
void getWarpComputeRects(TRectD &outputComputeRect, TRectD &warpedComputeRect,
const TRectD &warpedBox, const TRectD &requestedRect,
const WarpParams ¶ms);
//---------------------------------------------------------------------------
//! Deals with raster tiles and invokes warper functions
void warp(TRasterP &tileRas, const TRasterP &rasIn, TRasterP &warper,
TPointD VAR_1, TPointD warperPos, const WarpParams ¶ms);
#endif
| 0.036415 | {'CLASS_0': 'Lattice', 'VAR_0': 'Lattice', 'VAR_1': 'rasInPos'} |
/*
* File: NothingWork.h
* Author: Chris
*
* Created on September 25, 2015, 5:15 PM
*/
#ifndef NOTHINGWORK_H
#define NOTHINGWORK_H
#include "PDBBuzzer.h"
#include "PDBCommWork.h"
// do no work
namespace pdb {
class NothingWork : public PDBWork {
public:
NothingWork() {}
void execute(PDBBuzzerPtr callerBuzzer) override {
callerBuzzer = nullptr;
/* so we don't get a compiler error */
}
};
}
#endif /* NOTHINGWORK_H */
| /*
* File: NothingWork.h
* Author: Chris
*
* Created on September 25, 2015, 5:15 PM
*/
#ifndef NOTHINGWORK_H
#define NOTHINGWORK_H
#include "PDBBuzzer.h"
#include "PDBCommWork.h"
// do no work
CLASS_0 VAR_0 {
CLASS_1 VAR_1 : public VAR_2 {
public:
FUNC_0() {}
void FUNC_1(PDBBuzzerPtr callerBuzzer) VAR_3 {
callerBuzzer = nullptr;
/* so we don't get a compiler error */
}
};
}
#endif /* NOTHINGWORK_H */
| 0.481808 | {'CLASS_0': 'namespace', 'VAR_0': 'pdb', 'CLASS_1': 'class', 'VAR_1': 'NothingWork', 'FUNC_0': 'NothingWork', 'VAR_2': 'PDBWork', 'FUNC_1': 'execute', 'VAR_3': 'override'} |
/*
* Add a measurement to the log; the data at data_seg:data/length are
* appended to the TCG_PCClientPCREventStruct
*
* Input parameters:
* pcrIndex : which PCR to extend
* event_type : type of event; specs 10.4.1
* event_id : (unused)
* data : pointer to the data (i.e., string) to be added to the log
* length : length of the data
*/
static uint32_t
tcpa_add_measurement_to_log(uint32_t pcrIndex,
uint32_t event_type,
uint32_t event_id,
const char *data_ptr,
uint32_t length)
{
uint32_t rc = 0;
struct hleei_short hleei;
struct hleeo hleeo;
uint8_t _pcpes[32+400];
struct pcpes *pcpes = (struct pcpes *)_pcpes;
uint8_t *data = (uint8_t *)data_ptr;
if (length < sizeof(_pcpes)-32) {
memset(pcpes, 0x0, 32);
pcpes->pcrindex = pcrIndex;
pcpes->eventtype = event_type;
pcpes->eventdatasize = length;
memcpy(&_pcpes[32], data, length);
hleei.ipblength = 0x18;
hleei.reserved = 0x0;
hleei.hashdataptr = (uint32_t)&_pcpes[32];
hleei.hashdatalen = length;
hleei.pcrindex = pcrIndex;
hleei.logdataptr = (uint32_t)_pcpes;
hleei.logdatalen = length + 32;
rc = HashLogExtendEvent32(&hleei,
&hleeo,
TCG_MAGIC,
0x0,
0x0);
} else {
rc = (TCG_PC_TPMERROR |
((uint32_t)TCG_GENERAL_ERROR << 16));
}
return rc;
} | /*
* Add a measurement to the log; the data at data_seg:data/length are
* appended to the TCG_PCClientPCREventStruct
*
* Input parameters:
* pcrIndex : which PCR to extend
* event_type : type of event; specs 10.4.1
* event_id : (unused)
* data : pointer to the data (i.e., string) to be added to the log
* length : length of the data
*/
static uint32_t
tcpa_add_measurement_to_log(uint32_t VAR_0,
uint32_t event_type,
uint32_t VAR_1,
const char *VAR_2,
uint32_t VAR_3)
{
uint32_t VAR_4 = 0;
struct CLASS_0 VAR_5;
struct CLASS_1 VAR_6;
uint8_t VAR_7[32+400];
struct CLASS_2 *VAR_8 = (struct CLASS_2 *)VAR_7;
uint8_t *VAR_9 = (uint8_t *)VAR_2;
if (VAR_3 < sizeof(VAR_7)-32) {
FUNC_0(VAR_8, 0x0, 32);
VAR_8->pcrindex = VAR_0;
VAR_8->VAR_10 = event_type;
VAR_8->VAR_11 = VAR_3;
FUNC_1(&VAR_7[32], VAR_9, VAR_3);
VAR_5.VAR_12 = 0x18;
VAR_5.VAR_13 = 0x0;
VAR_5.VAR_14 = (uint32_t)&VAR_7[32];
VAR_5.VAR_15 = VAR_3;
VAR_5.pcrindex = VAR_0;
VAR_5.VAR_16 = (uint32_t)VAR_7;
VAR_5.logdatalen = VAR_3 + 32;
VAR_4 = FUNC_2(&VAR_5,
&VAR_6,
TCG_MAGIC,
0x0,
0x0);
} else {
VAR_4 = (VAR_17 |
((uint32_t)VAR_18 << 16));
}
return VAR_4;
} | 0.762053 | {'VAR_0': 'pcrIndex', 'VAR_1': 'event_id', 'VAR_2': 'data_ptr', 'VAR_3': 'length', 'VAR_4': 'rc', 'CLASS_0': 'hleei_short', 'VAR_5': 'hleei', 'CLASS_1': 'hleeo', 'VAR_6': 'hleeo', 'VAR_7': '_pcpes', 'CLASS_2': 'pcpes', 'VAR_8': 'pcpes', 'VAR_9': 'data', 'FUNC_0': 'memset', 'VAR_10': 'eventtype', 'VAR_11': 'eventdatasize', 'FUNC_1': 'memcpy', 'VAR_12': 'ipblength', 'VAR_13': 'reserved', 'VAR_14': 'hashdataptr', 'VAR_15': 'hashdatalen', 'VAR_16': 'logdataptr', 'FUNC_2': 'HashLogExtendEvent32', 'VAR_17': 'TCG_PC_TPMERROR', 'VAR_18': 'TCG_GENERAL_ERROR'} |
/*
* Copyright 2014 MongoDB, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MONGOC_BULK_OPERATION_PRIVATE_H
#define MONGOC_BULK_OPERATION_PRIVATE_H
#include "mongoc-array-private.h"
#include "mongoc-client.h"
#include "mongoc-write-command-private.h"
BSON_BEGIN_DECLS
struct _mongoc_bulk_operation_t
{
char *database;
char *collection;
mongoc_client_t *client;
mongoc_write_concern_t *write_concern;
bool ordered;
uint32_t hint;
mongoc_array_t commands;
mongoc_write_result_t result;
};
mongoc_bulk_operation_t *_mongoc_bulk_operation_new (mongoc_client_t *client,
const char *database,
const char *collection,
uint32_t hint,
bool ordered,
const mongoc_write_concern_t *write_concern);
BSON_END_DECLS
#endif /* MONGOC_BULK_OPERATION_PRIVATE_H */
| /*
* Copyright 2014 MongoDB, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef MONGOC_BULK_OPERATION_PRIVATE_H
#define MONGOC_BULK_OPERATION_PRIVATE_H
#include "IMPORT_0"
#include "IMPORT_1"
#include "mongoc-write-command-private.h"
CLASS_0
VAR_0 VAR_1
{
char *VAR_2;
char *collection;
mongoc_client_t *client;
mongoc_write_concern_t *write_concern;
bool VAR_3;
uint32_t hint;
CLASS_1 VAR_4;
mongoc_write_result_t VAR_5;
};
CLASS_2 *_mongoc_bulk_operation_new (mongoc_client_t *client,
const char *VAR_2,
const char *collection,
uint32_t hint,
bool VAR_3,
const mongoc_write_concern_t *write_concern);
CLASS_3
#endif /* MONGOC_BULK_OPERATION_PRIVATE_H */
| 0.497799 | {'IMPORT_0': 'mongoc-array-private.h', 'IMPORT_1': 'mongoc-client.h', 'CLASS_0': 'BSON_BEGIN_DECLS', 'VAR_0': 'struct', 'VAR_1': '_mongoc_bulk_operation_t', 'VAR_2': 'database', 'VAR_3': 'ordered', 'CLASS_1': 'mongoc_array_t', 'VAR_4': 'commands', 'VAR_5': 'result', 'CLASS_2': 'mongoc_bulk_operation_t', 'CLASS_3': 'BSON_END_DECLS'} |
/*
Initializes all required high-level real/virtual serial port HAL drivers:
*/
void serialport_hal_init(void)
{
uart7_setup();
} | /*
Initializes all required high-level real/virtual serial port HAL drivers:
*/
void FUNC_0(void)
{
FUNC_1();
} | 0.968822 | {'FUNC_0': 'serialport_hal_init', 'FUNC_1': 'uart7_setup'} |
/* file: minmax_kernel.h */
/*******************************************************************************
* Copyright 2014 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
//++
// Declaration of template function that calculate minmax.
//--
#ifndef __MINMAX_KERNEL_H__
#define __MINMAX_KERNEL_H__
#include "algorithms/normalization/minmax.h"
#include "src/algorithms/kernel.h"
#include "data_management/data/numeric_table.h"
#include "src/threading/threading.h"
#include "src/data_management/service_numeric_table.h"
#include "src/algorithms/service_error_handling.h"
using namespace daal::services::internal;
using namespace daal::internal;
using namespace daal::data_management;
using namespace daal::services;
namespace daal
{
namespace algorithms
{
namespace normalization
{
namespace minmax
{
namespace internal
{
/**
* \brief Kernel for minmax calculation
* in case floating point type of intermediate calculations
* and method of calculations are different
*/
template <typename algorithmFPType, Method method, CpuType cpu>
class MinMaxKernel : public Kernel
{
public:
Status compute(const NumericTable & inputTable, NumericTable & resultTable, const NumericTable & minimums, const NumericTable & maximums,
const algorithmFPType lowerBound, const algorithmFPType upperBound);
protected:
Status processBlock(const NumericTable & inputTable, NumericTable & resultTable, const algorithmFPType * scale, const algorithmFPType * shift,
const size_t startRowIndex, const size_t blockSize);
static const size_t BLOCK_SIZE_NORM = 256;
};
} // namespace internal
} // namespace minmax
} // namespace normalization
} // namespace algorithms
} // namespace daal
#endif
| /* file: minmax_kernel.h */
/*******************************************************************************
* Copyright 2014 Intel Corporation
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*******************************************************************************/
//++
// Declaration of template function that calculate minmax.
//--
#ifndef __MINMAX_KERNEL_H__
#define __MINMAX_KERNEL_H__
#include "IMPORT_0"
#include "src/algorithms/kernel.h"
#include "data_management/data/numeric_table.h"
#include "IMPORT_1"
#include "src/data_management/service_numeric_table.h"
#include "src/algorithms/service_error_handling.h"
using namespace daal::services::internal;
using namespace daal::internal;
using namespace daal::data_management;
using namespace daal::services;
namespace daal
{
namespace VAR_0
{
namespace normalization
{
namespace minmax
{
namespace internal
{
/**
* \brief Kernel for minmax calculation
* in case floating point type of intermediate calculations
* and method of calculations are different
*/
VAR_1 <typename VAR_2, Method VAR_3, CpuType cpu>
VAR_4 MinMaxKernel : public Kernel
{
public:
VAR_5 compute(const NumericTable & inputTable, NumericTable & resultTable, const NumericTable & minimums, const NumericTable & VAR_6,
const CLASS_0 lowerBound, const CLASS_0 upperBound);
protected:
VAR_5 processBlock(const NumericTable & inputTable, NumericTable & resultTable, const VAR_2 * scale, const VAR_2 * shift,
const size_t startRowIndex, const size_t blockSize);
static const size_t BLOCK_SIZE_NORM = 256;
};
} // namespace internal
} // namespace minmax
} // namespace normalization
} // namespace algorithms
} // namespace daal
#endif
| 0.171035 | {'IMPORT_0': 'algorithms/normalization/minmax.h', 'IMPORT_1': 'src/threading/threading.h', 'VAR_0': 'algorithms', 'VAR_1': 'template', 'VAR_2': 'algorithmFPType', 'CLASS_0': 'algorithmFPType', 'VAR_3': 'method', 'VAR_4': 'class', 'VAR_5': 'Status', 'VAR_6': 'maximums'} |
#include "emu.h"
#include "includes/galspnbl.h"
PALETTE_INIT( galspnbl )
{
int i;
/* initialize 555 RGB lookup */
for (i = 0; i < 32768; i++)
palette_set_color_rgb(machine, i + 1024, pal5bit(i >> 5), pal5bit(i >> 10), pal5bit(i >> 0));
}
/* sprite format (see also Ninja Gaiden):
*
* word bit usage
* --------+-fedcba9876543210-+----------------
* 0 | ---------------x | flip x
* | --------------x- | flip y
* | -------------x-- | enable
* | ----------xx---- | priority?
* | ---------x------ | flicker?
* 1 | xxxxxxxxxxxxxxxx | code
* 2 | --------xxxx---- | color
* | --------------xx | size: 8x8, 16x16, 32x32, 64x64
* 3 | xxxxxxxxxxxxxxxx | y position
* 4 | xxxxxxxxxxxxxxxx | x position
* 5,6,7| | unused
*/
static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int priority )
{
galspnbl_state *state = machine->driver_data<galspnbl_state>();
UINT16 *spriteram = state->spriteram;
int offs;
static const UINT8 layout[8][8] =
{
{0,1,4,5,16,17,20,21},
{2,3,6,7,18,19,22,23},
{8,9,12,13,24,25,28,29},
{10,11,14,15,26,27,30,31},
{32,33,36,37,48,49,52,53},
{34,35,38,39,50,51,54,55},
{40,41,44,45,56,57,60,61},
{42,43,46,47,58,59,62,63}
};
for (offs = (state->spriteram_size - 16) / 2; offs >= 0; offs -= 8)
{
int sx, sy, code, color, size, attr, flipx, flipy;
int col, row;
attr = spriteram[offs];
if ((attr & 0x0004) && ((attr & 0x0040) == 0 || (machine->primary_screen->frame_number() & 1))
// && ((attr & 0x0030) >> 4) == priority)
&& ((attr & 0x0020) >> 5) == priority)
{
code = spriteram[offs + 1];
color = spriteram[offs + 2];
size = 1 << (color & 0x0003); // 1,2,4,8
color = (color & 0x00f0) >> 4;
// sx = spriteram[offs + 4] + screenscroll;
sx = spriteram[offs + 4];
sy = spriteram[offs + 3];
flipx = attr & 0x0001;
flipy = attr & 0x0002;
for (row = 0; row < size; row++)
{
for (col = 0; col < size; col++)
{
int x = sx + 8 * (flipx ? (size - 1 - col) : col);
int y = sy + 8 * (flipy ? (size - 1 - row) : row);
drawgfx_transpen(bitmap,cliprect,machine->gfx[1],
code + layout[row][col],
color,
flipx,flipy,
x,y,0);
}
}
}
}
}
static void draw_background( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
{
galspnbl_state *state = machine->driver_data<galspnbl_state>();
offs_t offs;
// int screenscroll = 4 - (state->scroll[0] & 0xff);
for (offs = 0; offs < 0x20000; offs++)
{
int y = offs >> 9;
int x = offs & 0x1ff;
*BITMAP_ADDR16(bitmap, y, x) = 1024 + (state->bgvideoram[offs] >> 1);
}
}
VIDEO_UPDATE( galspnbl )
{
galspnbl_state *state = screen->machine->driver_data<galspnbl_state>();
int offs;
draw_background(screen->machine, bitmap, cliprect);
draw_sprites(screen->machine, bitmap, cliprect, 0);
for (offs = 0; offs < 0x1000 / 2; offs++)
{
int sx, sy, code, attr, color;
code = state->videoram[offs];
attr = state->colorram[offs];
color = (attr & 0x00f0) >> 4;
sx = offs % 64;
sy = offs / 64;
/* What is this? A priority/half transparency marker? */
if (!(attr & 0x0008))
{
drawgfx_transpen(bitmap,cliprect,screen->machine->gfx[0],
code,
color,
0,0,
// 16*sx + screenscroll,8*sy,
16*sx,8*sy,0);
}
}
draw_sprites(screen->machine, bitmap, cliprect, 1);
return 0;
}
| #include "emu.h"
#include "includes/galspnbl.h"
PALETTE_INIT( VAR_0 )
{
int i;
/* initialize 555 RGB lookup */
for (i = 0; i < 32768; i++)
palette_set_color_rgb(machine, i + 1024, pal5bit(i >> 5), pal5bit(i >> 10), pal5bit(i >> 0));
}
/* sprite format (see also Ninja Gaiden):
*
* word bit usage
* --------+-fedcba9876543210-+----------------
* 0 | ---------------x | flip x
* | --------------x- | flip y
* | -------------x-- | enable
* | ----------xx---- | priority?
* | ---------x------ | flicker?
* 1 | xxxxxxxxxxxxxxxx | code
* 2 | --------xxxx---- | color
* | --------------xx | size: 8x8, 16x16, 32x32, 64x64
* 3 | xxxxxxxxxxxxxxxx | y position
* 4 | xxxxxxxxxxxxxxxx | x position
* 5,6,7| | unused
*/
static void FUNC_0( CLASS_0 *machine, CLASS_1 *bitmap, const rectangle *cliprect, int priority )
{
galspnbl_state *state = machine->VAR_1<galspnbl_state>();
UINT16 *VAR_2 = state->VAR_2;
int VAR_3;
static const UINT8 VAR_4[8][8] =
{
{0,1,4,5,16,17,20,21},
{2,3,6,7,18,19,22,23},
{8,9,12,13,24,25,28,29},
{10,11,14,15,26,27,30,31},
{32,33,36,37,48,49,52,53},
{34,35,38,39,50,51,54,55},
{40,41,44,45,56,57,60,61},
{42,43,46,47,58,59,62,63}
};
for (VAR_3 = (state->VAR_5 - 16) / 2; VAR_3 >= 0; VAR_3 -= 8)
{
int VAR_6, sy, code, VAR_7, size, attr, VAR_8, flipy;
int VAR_9, row;
attr = VAR_2[VAR_3];
if ((attr & 0x0004) && ((attr & 0x0040) == 0 || (machine->VAR_10->frame_number() & 1))
// && ((attr & 0x0030) >> 4) == priority)
&& ((attr & 0x0020) >> 5) == priority)
{
code = VAR_2[VAR_3 + 1];
VAR_7 = VAR_2[VAR_3 + 2];
size = 1 << (VAR_7 & 0x0003); // 1,2,4,8
VAR_7 = (VAR_7 & 0x00f0) >> 4;
// sx = spriteram[offs + 4] + screenscroll;
VAR_6 = VAR_2[VAR_3 + 4];
sy = VAR_2[VAR_3 + 3];
VAR_8 = attr & 0x0001;
flipy = attr & 0x0002;
for (row = 0; row < size; row++)
{
for (VAR_9 = 0; VAR_9 < size; VAR_9++)
{
int x = VAR_6 + 8 * (VAR_8 ? (size - 1 - VAR_9) : VAR_9);
int y = sy + 8 * (flipy ? (size - 1 - row) : row);
drawgfx_transpen(bitmap,cliprect,machine->VAR_11[1],
code + VAR_4[row][VAR_9],
VAR_7,
VAR_8,flipy,
x,y,0);
}
}
}
}
}
static void draw_background( CLASS_0 *machine, CLASS_1 *bitmap, const rectangle *cliprect )
{
galspnbl_state *state = machine->VAR_1<galspnbl_state>();
offs_t VAR_3;
// int screenscroll = 4 - (state->scroll[0] & 0xff);
for (VAR_3 = 0; VAR_3 < 0x20000; VAR_3++)
{
int y = VAR_3 >> 9;
int x = VAR_3 & 0x1ff;
*BITMAP_ADDR16(bitmap, y, x) = 1024 + (state->bgvideoram[VAR_3] >> 1);
}
}
VIDEO_UPDATE( VAR_0 )
{
galspnbl_state *state = screen->machine->VAR_1<galspnbl_state>();
int VAR_3;
draw_background(screen->machine, bitmap, cliprect);
FUNC_0(screen->machine, bitmap, cliprect, 0);
for (VAR_3 = 0; VAR_3 < 0x1000 / 2; VAR_3++)
{
int VAR_6, sy, code, attr, VAR_7;
code = state->VAR_12[VAR_3];
attr = state->VAR_13[VAR_3];
VAR_7 = (attr & 0x00f0) >> 4;
VAR_6 = VAR_3 % 64;
sy = VAR_3 / 64;
/* What is this? A priority/half transparency marker? */
if (!(attr & 0x0008))
{
drawgfx_transpen(bitmap,cliprect,screen->machine->VAR_11[0],
code,
VAR_7,
0,0,
// 16*sx + screenscroll,8*sy,
16*VAR_6,8*sy,0);
}
}
FUNC_0(screen->machine, bitmap, cliprect, 1);
return 0;
}
| 0.363386 | {'VAR_0': 'galspnbl', 'FUNC_0': 'draw_sprites', 'CLASS_0': 'running_machine', 'CLASS_1': 'bitmap_t', 'VAR_1': 'driver_data', 'VAR_2': 'spriteram', 'VAR_3': 'offs', 'VAR_4': 'layout', 'VAR_5': 'spriteram_size', 'VAR_6': 'sx', 'VAR_7': 'color', 'VAR_8': 'flipx', 'VAR_9': 'col', 'VAR_10': 'primary_screen', 'VAR_11': 'gfx', 'VAR_12': 'videoram', 'VAR_13': 'colorram'} |
#pragma once
namespace shared
{
class TemplatedObjectFactoryWrapper;
/*
类名：TemplatedObjectFactory
功能：根据注册类型的信息创建一个TOBJFLG的实例，类型TBase应是TOBJFLG的父类
*/
template<typename TBase, typename TOBJFLG>
class TemplatedObjectFactory : public nbase::Singleton<TemplatedObjectFactory<typename TBase, typename TOBJFLG>>
{
private:
using _ParentType = nbase::Singleton<TemplatedObjectFactory<typename TBase, typename TOBJFLG>>;
using _MyType = TemplatedObjectFactory<typename TBase, typename TOBJFLG>;
friend class TemplatedObjectFactoryWrapper;
SingletonHideConstructor(_MyType);
private:
TemplatedObjectFactory() = default;
~TemplatedObjectFactory() = default;
private:
/*
创建TClass实例的方法, 存在TClass : public TBase的关系
params TClass的构造参数
返回TBase类型的指针对像
*/
template<typename TClass>
TBase* Create()
{
return dynamic_cast<TBase*>(new TClass);
}
template<typename TClass>
void AddCreateFunction(TOBJFLG flg)
{
auto it = std::find_if(crate_function_list_.begin(), crate_function_list_.end(), [&](const decltype(*crate_function_list_.begin()) & item){
return flg == item.first;
});
if (it == crate_function_list_.end())
crate_function_list_.emplace_back(std::make_pair(flg, std::bind(&TemplatedObjectFactory::Create<TClass>, this)));
}
auto CreateSharedObject(TOBJFLG flg)->std::shared_ptr<TBase>
{
auto it = std::find_if(crate_function_list_.begin(), crate_function_list_.end(), [&](const decltype(*crate_function_list_.begin()) & item){
return flg == item.first;
});
if (it != crate_function_list_.end())
return std::shared_ptr<TBase>((*it).second());
return nullptr;
}
TBase* CreateObject(TOBJFLG flg)
{
TBase* ret = nullptr;
auto it = std::find_if(crate_function_list_.begin(), crate_function_list_.end(), [&](const decltype(*crate_function_list_.begin()) & item){
return flg == item.first;
});
if (it != crate_function_list_.end())
ret = (*it).second();
return ret;
}
void CreateAllSharedObject(std::list<std::shared_ptr<TBase>>& objects)
{
for (auto it : crate_function_list_)
objects.emplace_back(std::shared_ptr<TBase>(it.second()));
}
private:
std::list<std::pair<TOBJFLG, std::function<TBase*()>>> crate_function_list_;
};
class TemplatedObjectFactoryWrapper
{
public:
//注册类型
template<typename TBase, typename TObject, typename TOBJFLG>
static void RegisteredOjbect(const TOBJFLG& flg)
{
using TDecayType = typename std::decay<TOBJFLG>::type;
if (std::is_base_of<TBase, TObject>::value)
{
TemplatedObjectFactory<TBase, TDecayType>::GetInstance()->AddCreateFunction<TObject>(flg);
}
}
//创建含引用计数的实例
template<typename TBase, typename TFLG>
static auto InstantiateSharedRegisteredOjbect(const TFLG& flag)->std::shared_ptr<TBase>
{
using TDecayType = typename std::decay<TFLG>::type;
return TemplatedObjectFactory<TBase, TDecayType>::GetInstance()->CreateSharedObject(flag);
}
//创建实例
template<typename TBase, typename TFLG>
static auto InstantiateRegisteredOjbect(const TFLG& flag)->TBase*
{
using TDecayType = typename std::decay<TFLG>::type;
return TemplatedObjectFactory<TBase, TDecayType>::GetInstance()->CreateObject(flag);
}
//创建所有已注册为 TBase 与 TFLG 为标识的的实例
template<typename TBase, typename TFLG>
static auto InstantiateAllRegisteredSharedOjbect()->std::list<std::shared_ptr<TBase>>
{
using TDecayType = typename std::decay<TFLG>::type;
std::list<std::shared_ptr<TBase>> ret;
TemplatedObjectFactory<TBase, TDecayType>::GetInstance()->CreateAllSharedObject(ret);
return ret;
}
};
}
| #pragma once
namespace VAR_0
{
CLASS_0 VAR_2;
/*
类名：TemplatedObjectFactory
功能：根据注册类型的信息创建一个TOBJFLG的实例，类型TBase应是TOBJFLG的父类
*/
VAR_3<VAR_4 TBase, VAR_4 VAR_5>
VAR_1 TemplatedObjectFactory : public VAR_7::VAR_8<VAR_6<VAR_4 TBase, VAR_4 VAR_5>>
{
private:
VAR_9 _ParentType = VAR_7::VAR_8<VAR_6<VAR_4 TBase, VAR_4 VAR_5>>;
CLASS_2 _MyType = VAR_6<VAR_4 TBase, VAR_4 VAR_5>VAR_10;
CLASS_4 VAR_1 VAR_2;
SingletonHideConstructor(_MyType);
private:
FUNC_0() = default;
~FUNC_0() = default;
private:
/*
创建TClass实例的方法, 存在TClass : public TBase的关系
params TClass的构造参数
返回TBase类型的指针对像
*/
VAR_3<VAR_4 VAR_11>
TBase* Create()
{
return VAR_12<TBase*>(VAR_13 VAR_11);
}
VAR_3<VAR_4 VAR_11>
VAR_14 FUNC_1(VAR_5 VAR_16)
{
auto CLASS_5 = std::find_if(crate_function_list_.begin(), crate_function_list_.FUNC_2(),CLASS_3 [&](const decltype(*crate_function_list_.begin()) & VAR_18){
return VAR_16 == VAR_18.first;
});
if (VAR_17 == crate_function_list_.FUNC_2())
crate_function_list_.FUNC_3(std::FUNC_4(VAR_16, std::FUNC_5(&VAR_6::Create<VAR_11>, this)));
}
auto CreateSharedObject(ID_0 VAR_16)->std::VAR_19<TBase>
{
auto CLASS_5 = std::find_if(crate_function_list_.begin(), crate_function_list_.FUNC_2(),CLASS_3 [&](const decltype(*crate_function_list_.begin()) & VAR_18){
return VAR_16 == VAR_18.first;
});
if (VAR_17 != crate_function_list_.FUNC_2())
return std::VAR_19<TBase>((*VAR_17).FUNC_6());
return nullptr;
}
TBase* FUNC_7(CLASS_1 VAR_16)
{
TBase* VAR_20 = nullptr;
auto CLASS_5 = std::find_if(crate_function_list_.begin(), crate_function_list_.FUNC_2(),CLASS_3 [&](const decltype(*crate_function_list_.begin()) & VAR_18){
return VAR_16 == VAR_18.first;
});
if (VAR_17 != crate_function_list_.FUNC_2())
VAR_20 = (*VAR_17).FUNC_6();
return VAR_20;
}
void CreateAllSharedObject(std::VAR_21<std::VAR_19<TBase>>& VAR_22)
{
for (auto CLASS_5 : crate_function_list_)
VAR_22.FUNC_3(std::VAR_19<TBase>(VAR_17.FUNC_6()));
}
private:
std::VAR_21<std::pair<VAR_5, std::VAR_23<TBase*(VAR_10)>>> crate_function_list_;
};
CLASS_0 VAR_2
{
public:
//注册类型
VAR_3<VAR_4 TBase, VAR_4 TObject, VAR_4 VAR_5>
VAR_24 void FUNC_8(const CLASS_1& VAR_16)
{
CLASS_2 VAR_25 = VAR_4 std::VAR_26<VAR_5>::type;
if (std::VAR_27<TBase, TObject>::VAR_28)
{
VAR_6<TBase, VAR_25>::FUNC_9()->VAR_15<TObject>(VAR_16);
}
}
//创建含引用计数的实例
VAR_3<VAR_4 TBase, VAR_4 VAR_29>
VAR_24 auto InstantiateSharedRegisteredOjbect(const CLASS_6& flag)->std::VAR_19<TBase>
{
CLASS_2 VAR_25 = VAR_4 std::VAR_26<VAR_29>::type;
return VAR_6<TBase, VAR_25>::FUNC_9()->CreateSharedObject(flag);
}
//创建实例
VAR_3<VAR_4 TBase, VAR_4 VAR_29>
VAR_24 auto VAR_30(const CLASS_6& flag)->TBase*
{
CLASS_2 VAR_25 = VAR_4 std::VAR_26<VAR_29>::type;
return VAR_6<TBase, VAR_25>::FUNC_9()->FUNC_7(flag);
}
//创建所有已注册为 TBase 与 TFLG 为标识的的实例
VAR_3<VAR_4 TBase, VAR_4 VAR_29>
VAR_24 VAR_31 FUNC_10()->std::VAR_21<std::VAR_19<TBase>>
{
VAR_9 VAR_25 = VAR_4 std::VAR_26<VAR_29>::type;
std::VAR_21<std::VAR_19<TBase>> VAR_20;
VAR_6<TBase, VAR_25>::FUNC_9()->CreateAllSharedObject(VAR_20);
return VAR_20;
}
};
}
| 0.742911 | {'VAR_0': 'shared', 'CLASS_0': 'class', 'VAR_1': 'class', 'VAR_2': 'TemplatedObjectFactoryWrapper', 'VAR_3': 'template', 'VAR_4': 'typename', 'VAR_5': 'TOBJFLG', 'ID_0': 'TOBJFLG', 'CLASS_1': 'TOBJFLG', 'VAR_6': 'TemplatedObjectFactory', 'FUNC_0': 'TemplatedObjectFactory', 'VAR_7': 'nbase', 'VAR_8': 'Singleton', 'VAR_9': 'using', 'CLASS_2': 'using', 'VAR_10': '', 'CLASS_3': '', 'CLASS_4': 'friend', 'VAR_11': 'TClass', 'VAR_12': 'dynamic_cast', 'VAR_13': 'new', 'VAR_14': 'void', 'FUNC_1': 'AddCreateFunction', 'VAR_15': 'AddCreateFunction', 'VAR_16': 'flg', 'CLASS_5': 'it', 'VAR_17': 'it', 'FUNC_2': 'end', 'VAR_18': 'item', 'FUNC_3': 'emplace_back', 'FUNC_4': 'make_pair', 'FUNC_5': 'bind', 'VAR_19': 'shared_ptr', 'FUNC_6': 'second', 'FUNC_7': 'CreateObject', 'VAR_20': 'ret', 'VAR_21': 'list', 'VAR_22': 'objects', 'VAR_23': 'function', 'VAR_24': 'static', 'FUNC_8': 'RegisteredOjbect', 'VAR_25': 'TDecayType', 'VAR_26': 'decay', 'VAR_27': 'is_base_of', 'VAR_28': 'value', 'FUNC_9': 'GetInstance', 'VAR_29': 'TFLG', 'CLASS_6': 'TFLG', 'VAR_30': 'InstantiateRegisteredOjbect', 'VAR_31': 'auto', 'FUNC_10': 'InstantiateAllRegisteredSharedOjbect'} |
/**
* @brief Used to parse advertising data and scan response data
* @param[in] scan_info point to scan information data.
* @retval void
*/
void bt_mesh_scatternet_app_parse_scan_info(T_LE_SCAN_INFO *scan_info)
{
uint8_t buffer[32];
uint8_t pos = 0;
while (pos < scan_info->data_len)
{
uint8_t length = scan_info->data[pos++];
uint8_t type;
if ((length > 0x01) && ((pos + length) <= 31))
{
memcpy(buffer, scan_info->data + pos + 1, length - 1);
type = scan_info->data[pos];
APP_PRINT_TRACE2("ble_scatternet_app_parse_scan_info: AD Structure Info: AD type 0x%x, AD Data Length %d", type,
length - 1);
switch (type)
{
case GAP_ADTYPE_FLAGS:
{
uint8_t flags = scan_info->data[pos + 1];
APP_PRINT_INFO1("GAP_ADTYPE_FLAGS: 0x%x", flags);
BLE_PRINT("GAP_ADTYPE_FLAGS: 0x%x\n\r", flags);
}
break;
case GAP_ADTYPE_16BIT_MORE:
case GAP_ADTYPE_16BIT_COMPLETE:
case GAP_ADTYPE_SERVICES_LIST_16BIT:
{
uint16_t *p_uuid = (uint16_t *)(buffer);
uint8_t i = length - 1;
while (i >= 2)
{
APP_PRINT_INFO1("GAP_ADTYPE_16BIT_XXX: 0x%x", *p_uuid);
BLE_PRINT("GAP_ADTYPE_16BIT_XXX: 0x%x\n\r", *p_uuid);
p_uuid ++;
i -= 2;
}
}
break;
case GAP_ADTYPE_32BIT_MORE:
case GAP_ADTYPE_32BIT_COMPLETE:
{
uint32_t *p_uuid = (uint32_t *)(buffer);
uint8_t i = length - 1;
while (i >= 4)
{
APP_PRINT_INFO1("GAP_ADTYPE_32BIT_XXX: 0x%x", *p_uuid);
BLE_PRINT("GAP_ADTYPE_32BIT_XXX: 0x%x\n\r", (unsigned int)*p_uuid);
p_uuid ++;
i -= 4;
}
}
break;
case GAP_ADTYPE_128BIT_MORE:
case GAP_ADTYPE_128BIT_COMPLETE:
case GAP_ADTYPE_SERVICES_LIST_128BIT:
{
uint32_t *p_uuid = (uint32_t *)(buffer);
APP_PRINT_INFO4("GAP_ADTYPE_128BIT_XXX: 0x%8.8x%8.8x%8.8x%8.8x",
p_uuid[3], p_uuid[2], p_uuid[1], p_uuid[0]);
BLE_PRINT("GAP_ADTYPE_128BIT_XXX: 0x%8.8x%8.8x%8.8x%8.8x\n\r",
(unsigned int)p_uuid[3], (unsigned int)p_uuid[2], (unsigned int)p_uuid[1], (unsigned int)p_uuid[0]);
}
break;
case GAP_ADTYPE_LOCAL_NAME_SHORT:
case GAP_ADTYPE_LOCAL_NAME_COMPLETE:
{
buffer[length - 1] = '\0';
APP_PRINT_INFO1("GAP_ADTYPE_LOCAL_NAME_XXX: %s", TRACE_STRING(buffer));
BLE_PRINT("GAP_ADTYPE_LOCAL_NAME_XXX: %s\n\r", buffer);
}
break;
case GAP_ADTYPE_POWER_LEVEL:
{
APP_PRINT_INFO1("GAP_ADTYPE_POWER_LEVEL: 0x%x", scan_info->data[pos + 1]);
BLE_PRINT("GAP_ADTYPE_POWER_LEVEL: 0x%x\n\r", scan_info->data[pos + 1]);
}
break;
case GAP_ADTYPE_SLAVE_CONN_INTERVAL_RANGE:
{
uint16_t *p_min = (uint16_t *)(buffer);
uint16_t *p_max = p_min + 1;
APP_PRINT_INFO2("GAP_ADTYPE_SLAVE_CONN_INTERVAL_RANGE: 0x%x - 0x%x", *p_min,
*p_max);
BLE_PRINT("GAP_ADTYPE_SLAVE_CONN_INTERVAL_RANGE: 0x%x - 0x%x\n\r", *p_min,
*p_max);
}
break;
case GAP_ADTYPE_SERVICE_DATA:
{
uint16_t *p_uuid = (uint16_t *)(buffer);
uint8_t data_len = length - 3;
APP_PRINT_INFO3("GAP_ADTYPE_SERVICE_DATA: UUID 0x%x, len %d, data %b", *p_uuid,
data_len, TRACE_BINARY(data_len, &buffer[2]));
BLE_PRINT("GAP_ADTYPE_SERVICE_DATA: UUID 0x%x, len %d\n\r", *p_uuid,
data_len);
}
break;
case GAP_ADTYPE_APPEARANCE:
{
uint16_t *p_appearance = (uint16_t *)(buffer);
APP_PRINT_INFO1("GAP_ADTYPE_APPEARANCE: %d", *p_appearance);
BLE_PRINT("GAP_ADTYPE_APPEARANCE: %d\n\r", *p_appearance);
}
break;
case GAP_ADTYPE_MANUFACTURER_SPECIFIC:
{
uint8_t data_len = length - 3;
uint16_t *p_company_id = (uint16_t *)(buffer);
APP_PRINT_INFO3("GAP_ADTYPE_MANUFACTURER_SPECIFIC: company_id 0x%x, len %d, data %b",
*p_company_id, data_len, TRACE_BINARY(data_len, &buffer[2]));
BLE_PRINT("GAP_ADTYPE_MANUFACTURER_SPECIFIC: company_id 0x%x, len %d\n\r",
*p_company_id, data_len);
}
break;
default:
{
uint8_t i = 0;
for (i = 0; i < (length - 1); i++)
{
APP_PRINT_INFO1(" AD Data: Unhandled Data = 0x%x", scan_info->data[pos + i]);
}
}
break;
}
}
pos += length;
}
} | /**
* @brief Used to parse advertising data and scan response data
* @param[in] scan_info point to scan information data.
* @retval void
*/
void FUNC_0(T_LE_SCAN_INFO *VAR_0)
{
uint8_t buffer[32];
uint8_t pos = 0;
while (pos < VAR_0->data_len)
{
uint8_t length = VAR_0->data[pos++];
uint8_t type;
if ((length > 0x01) && ((pos + length) <= 31))
{
FUNC_1(buffer, VAR_0->data + pos + 1, length - 1);
type = VAR_0->data[pos];
FUNC_2("ble_scatternet_app_parse_scan_info: AD Structure Info: AD type 0x%x, AD Data Length %d", type,
length - 1);
switch (type)
{
case VAR_1:
{
uint8_t flags = VAR_0->data[pos + 1];
FUNC_3("GAP_ADTYPE_FLAGS: 0x%x", flags);
BLE_PRINT("GAP_ADTYPE_FLAGS: 0x%x\n\r", flags);
}
break;
case VAR_2:
case GAP_ADTYPE_16BIT_COMPLETE:
case VAR_3:
{
uint16_t *p_uuid = (uint16_t *)(buffer);
uint8_t VAR_4 = length - 1;
while (VAR_4 >= 2)
{
FUNC_3("GAP_ADTYPE_16BIT_XXX: 0x%x", *p_uuid);
BLE_PRINT("GAP_ADTYPE_16BIT_XXX: 0x%x\n\r", *p_uuid);
p_uuid ++;
VAR_4 -= 2;
}
}
break;
case VAR_5:
case VAR_6:
{
uint32_t *p_uuid = (uint32_t *)(buffer);
uint8_t VAR_4 = length - 1;
while (VAR_4 >= 4)
{
FUNC_3("GAP_ADTYPE_32BIT_XXX: 0x%x", *p_uuid);
BLE_PRINT("GAP_ADTYPE_32BIT_XXX: 0x%x\n\r", (unsigned int)*p_uuid);
p_uuid ++;
VAR_4 -= 4;
}
}
break;
case GAP_ADTYPE_128BIT_MORE:
case GAP_ADTYPE_128BIT_COMPLETE:
case GAP_ADTYPE_SERVICES_LIST_128BIT:
{
uint32_t *p_uuid = (uint32_t *)(buffer);
FUNC_4("GAP_ADTYPE_128BIT_XXX: 0x%8.8x%8.8x%8.8x%8.8x",
p_uuid[3], p_uuid[2], p_uuid[1], p_uuid[0]);
BLE_PRINT("GAP_ADTYPE_128BIT_XXX: 0x%8.8x%8.8x%8.8x%8.8x\n\r",
(unsigned int)p_uuid[3], (unsigned int)p_uuid[2], (unsigned int)p_uuid[1], (unsigned int)p_uuid[0]);
}
break;
case GAP_ADTYPE_LOCAL_NAME_SHORT:
case GAP_ADTYPE_LOCAL_NAME_COMPLETE:
{
buffer[length - 1] = '\0';
FUNC_3("GAP_ADTYPE_LOCAL_NAME_XXX: %s", FUNC_5(buffer));
BLE_PRINT("GAP_ADTYPE_LOCAL_NAME_XXX: %s\n\r", buffer);
}
break;
case VAR_7:
{
FUNC_3("GAP_ADTYPE_POWER_LEVEL: 0x%x", VAR_0->data[pos + 1]);
BLE_PRINT("GAP_ADTYPE_POWER_LEVEL: 0x%x\n\r", VAR_0->data[pos + 1]);
}
break;
case VAR_8:
{
uint16_t *p_min = (uint16_t *)(buffer);
uint16_t *VAR_9 = p_min + 1;
FUNC_6("GAP_ADTYPE_SLAVE_CONN_INTERVAL_RANGE: 0x%x - 0x%x", *p_min,
*VAR_9);
BLE_PRINT("GAP_ADTYPE_SLAVE_CONN_INTERVAL_RANGE: 0x%x - 0x%x\n\r", *p_min,
*VAR_9);
}
break;
case GAP_ADTYPE_SERVICE_DATA:
{
uint16_t *p_uuid = (uint16_t *)(buffer);
uint8_t data_len = length - 3;
FUNC_7("GAP_ADTYPE_SERVICE_DATA: UUID 0x%x, len %d, data %b", *p_uuid,
data_len, TRACE_BINARY(data_len, &buffer[2]));
BLE_PRINT("GAP_ADTYPE_SERVICE_DATA: UUID 0x%x, len %d\n\r", *p_uuid,
data_len);
}
break;
case VAR_10:
{
uint16_t *VAR_11 = (uint16_t *)(buffer);
FUNC_3("GAP_ADTYPE_APPEARANCE: %d", *VAR_11);
BLE_PRINT("GAP_ADTYPE_APPEARANCE: %d\n\r", *VAR_11);
}
break;
case VAR_12:
{
uint8_t data_len = length - 3;
uint16_t *p_company_id = (uint16_t *)(buffer);
FUNC_7("GAP_ADTYPE_MANUFACTURER_SPECIFIC: company_id 0x%x, len %d, data %b",
*p_company_id, data_len, TRACE_BINARY(data_len, &buffer[2]));
BLE_PRINT("GAP_ADTYPE_MANUFACTURER_SPECIFIC: company_id 0x%x, len %d\n\r",
*p_company_id, data_len);
}
break;
default:
{
uint8_t VAR_4 = 0;
for (VAR_4 = 0; VAR_4 < (length - 1); VAR_4++)
{
FUNC_3(" AD Data: Unhandled Data = 0x%x", VAR_0->data[pos + VAR_4]);
}
}
break;
}
}
pos += length;
}
} | 0.594198 | {'FUNC_0': 'bt_mesh_scatternet_app_parse_scan_info', 'VAR_0': 'scan_info', 'FUNC_1': 'memcpy', 'FUNC_2': 'APP_PRINT_TRACE2', 'VAR_1': 'GAP_ADTYPE_FLAGS', 'FUNC_3': 'APP_PRINT_INFO1', 'VAR_2': 'GAP_ADTYPE_16BIT_MORE', 'VAR_3': 'GAP_ADTYPE_SERVICES_LIST_16BIT', 'VAR_4': 'i', 'VAR_5': 'GAP_ADTYPE_32BIT_MORE', 'VAR_6': 'GAP_ADTYPE_32BIT_COMPLETE', 'FUNC_4': 'APP_PRINT_INFO4', 'FUNC_5': 'TRACE_STRING', 'VAR_7': 'GAP_ADTYPE_POWER_LEVEL', 'VAR_8': 'GAP_ADTYPE_SLAVE_CONN_INTERVAL_RANGE', 'VAR_9': 'p_max', 'FUNC_6': 'APP_PRINT_INFO2', 'FUNC_7': 'APP_PRINT_INFO3', 'VAR_10': 'GAP_ADTYPE_APPEARANCE', 'VAR_11': 'p_appearance', 'VAR_12': 'GAP_ADTYPE_MANUFACTURER_SPECIFIC'} |
/* simpleide.c: Simple 8-bit IDE interface routines
Copyright (c) 2003-2016 <NAME>, <NAME>, <NAME>
Copyright (c) 2015 <NAME>
Copyright (c) 2016 <NAME>
$Id: simpleide.c 817 2016-07-18 11:56:29Z fredm $
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Author contact information:
E-mail: <NAME> <<EMAIL>>
*/
#include "config.h"
#include "libspectrum.h"
#include "ide.h"
#include "startup_manager.h"
#include "module.h"
#include "periph.h"
#include "settings.h"
#include "simpleide.h"
#include "ui.h"
/* Private function prototypes */
static libspectrum_byte simpleide_read( libspectrum_word port, libspectrum_byte *attached );
static void simpleide_write( libspectrum_word port, libspectrum_byte data );
/* Data */
static const periph_port_t simpleide_ports[] = {
{ 0x0010, 0x0000, simpleide_read, simpleide_write },
{ 0, 0, NULL, NULL }
};
static const periph_t simpleide_periph = {
/* .option = */ &settings_current.simpleide_active,
/* .ports = */ simpleide_ports,
/* .hard_reset = */ 1,
/* .activate = */ NULL,
};
static libspectrum_ide_channel *simpleide_idechn;
static void simpleide_snapshot_enabled( libspectrum_snap *snap );
static void simpleide_to_snapshot( libspectrum_snap *snap );
static module_info_t simpleide_module_info = {
/* .reset = */ simpleide_reset,
/* .romcs = */ NULL,
/* .snapshot_enabled = */ simpleide_snapshot_enabled,
/* .snapshot_from = */ NULL,
/* .snapshot_to = */ simpleide_to_snapshot,
};
/* Housekeeping functions */
static int
simpleide_init( void *context )
{
int error;
simpleide_idechn = libspectrum_ide_alloc( LIBSPECTRUM_IDE_DATA8 );
ui_menu_activate( UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_MASTER_EJECT, 0 );
ui_menu_activate( UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_SLAVE_EJECT, 0 );
if( settings_current.simpleide_master_file ) {
error = libspectrum_ide_insert( simpleide_idechn, LIBSPECTRUM_IDE_MASTER,
settings_current.simpleide_master_file );
if( error ) return error;
ui_menu_activate( UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_MASTER_EJECT, 1 );
}
if( settings_current.simpleide_slave_file ) {
error = libspectrum_ide_insert( simpleide_idechn, LIBSPECTRUM_IDE_SLAVE,
settings_current.simpleide_slave_file );
if( error ) return error;
ui_menu_activate( UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_SLAVE_EJECT, 1 );
}
module_register( &simpleide_module_info );
periph_register( PERIPH_TYPE_SIMPLEIDE, &simpleide_periph );
return 0;
}
static void
simpleide_end( void )
{
libspectrum_ide_free( simpleide_idechn );
}
void
simpleide_register_startup( void )
{
startup_manager_module dependencies[] = {
STARTUP_MANAGER_MODULE_DISPLAY,
STARTUP_MANAGER_MODULE_SETUID
};
startup_manager_register( STARTUP_MANAGER_MODULE_SIMPLEIDE, dependencies,
ARRAY_SIZE( dependencies ), simpleide_init, NULL,
simpleide_end );
}
void
simpleide_reset( int hard_reset GCC_UNUSED )
{
libspectrum_ide_reset( simpleide_idechn );
}
int
simpleide_insert( const char *filename, libspectrum_ide_unit unit )
{
char **setting;
ui_menu_item item;
switch( unit ) {
case LIBSPECTRUM_IDE_MASTER:
setting = &settings_current.simpleide_master_file;
item = UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_MASTER_EJECT;
break;
case LIBSPECTRUM_IDE_SLAVE:
setting = &settings_current.simpleide_slave_file;
item = UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_SLAVE_EJECT;
break;
default: return 1;
}
return ide_insert( filename, simpleide_idechn, unit, simpleide_commit,
setting, item );
}
int
simpleide_commit( libspectrum_ide_unit unit )
{
int error;
error = libspectrum_ide_commit( simpleide_idechn, unit );
return error;
}
int
simpleide_eject( libspectrum_ide_unit unit )
{
char **setting;
ui_menu_item item;
switch( unit ) {
case LIBSPECTRUM_IDE_MASTER:
setting = &settings_current.simpleide_master_file;
item = UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_MASTER_EJECT;
break;
case LIBSPECTRUM_IDE_SLAVE:
setting = &settings_current.simpleide_slave_file;
item = UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_SLAVE_EJECT;
break;
default: return 1;
}
return ide_eject( simpleide_idechn, unit, simpleide_commit, setting, item );
}
/* Port read/writes */
static libspectrum_byte
simpleide_read( libspectrum_word port, libspectrum_byte *attached )
{
libspectrum_ide_register idereg;
*attached = 0xff; /* TODO: check this */
idereg = ( ( port >> 8 ) & 0x01 ) | ( ( port >> 11 ) & 0x06 );
return libspectrum_ide_read( simpleide_idechn, idereg );
}
static void
simpleide_write( libspectrum_word port, libspectrum_byte data )
{
libspectrum_ide_register idereg;
idereg = ( ( port >> 8 ) & 0x01 ) | ( ( port >> 11 ) & 0x06 );
libspectrum_ide_write( simpleide_idechn, idereg, data );
}
static void
simpleide_snapshot_enabled( libspectrum_snap *snap )
{
if( libspectrum_snap_simpleide_active( snap ) )
settings_current.simpleide_active = 1;
}
static void
simpleide_to_snapshot( libspectrum_snap *snap )
{
if( !settings_current.simpleide_active ) return;
libspectrum_snap_set_simpleide_active( snap, 1 );
}
| /* simpleide.c: Simple 8-bit IDE interface routines
Copyright (c) 2003-2016 <NAME>, <NAME>, <NAME>
Copyright (c) 2015 <NAME>
Copyright (c) 2016 <NAME>
$Id: simpleide.c 817 2016-07-18 11:56:29Z fredm $
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
Author contact information:
E-mail: <NAME> <<EMAIL>>
*/
#include "config.h"
#include "libspectrum.h"
#include "ide.h"
#include "startup_manager.h"
#include "module.h"
#include "periph.h"
#include "settings.h"
#include "simpleide.h"
#include "ui.h"
/* Private function prototypes */
static libspectrum_byte simpleide_read( libspectrum_word port, libspectrum_byte *attached );
static void simpleide_write( libspectrum_word port, libspectrum_byte VAR_0 );
/* Data */
static const periph_port_t simpleide_ports[] = {
{ 0x0010, 0x0000, simpleide_read, simpleide_write },
{ 0, 0, NULL, NULL }
};
static const periph_t simpleide_periph = {
/* .option = */ &settings_current.VAR_1,
/* .ports = */ simpleide_ports,
/* .hard_reset = */ 1,
/* .activate = */ NULL,
};
static libspectrum_ide_channel *simpleide_idechn;
static void simpleide_snapshot_enabled( libspectrum_snap *snap );
static void simpleide_to_snapshot( libspectrum_snap *snap );
static module_info_t simpleide_module_info = {
/* .reset = */ simpleide_reset,
/* .romcs = */ NULL,
/* .snapshot_enabled = */ simpleide_snapshot_enabled,
/* .snapshot_from = */ NULL,
/* .snapshot_to = */ simpleide_to_snapshot,
};
/* Housekeeping functions */
static int
simpleide_init( void *context )
{
int error;
simpleide_idechn = libspectrum_ide_alloc( LIBSPECTRUM_IDE_DATA8 );
ui_menu_activate( UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_MASTER_EJECT, 0 );
ui_menu_activate( UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_SLAVE_EJECT, 0 );
if( settings_current.simpleide_master_file ) {
error = libspectrum_ide_insert( simpleide_idechn, LIBSPECTRUM_IDE_MASTER,
settings_current.simpleide_master_file );
if( error ) return error;
ui_menu_activate( UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_MASTER_EJECT, 1 );
}
if( settings_current.simpleide_slave_file ) {
error = libspectrum_ide_insert( simpleide_idechn, LIBSPECTRUM_IDE_SLAVE,
settings_current.simpleide_slave_file );
if( error ) return error;
ui_menu_activate( UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_SLAVE_EJECT, 1 );
}
module_register( &simpleide_module_info );
periph_register( PERIPH_TYPE_SIMPLEIDE, &simpleide_periph );
return 0;
}
static void
simpleide_end( void )
{
libspectrum_ide_free( simpleide_idechn );
}
void
simpleide_register_startup( void )
{
startup_manager_module dependencies[] = {
STARTUP_MANAGER_MODULE_DISPLAY,
STARTUP_MANAGER_MODULE_SETUID
};
startup_manager_register( STARTUP_MANAGER_MODULE_SIMPLEIDE, dependencies,
ARRAY_SIZE( dependencies ), simpleide_init, NULL,
simpleide_end );
}
void
simpleide_reset( int hard_reset GCC_UNUSED )
{
libspectrum_ide_reset( simpleide_idechn );
}
int
simpleide_insert( const char *filename, libspectrum_ide_unit unit )
{
char **setting;
ui_menu_item item;
switch( unit ) {
case LIBSPECTRUM_IDE_MASTER:
setting = &settings_current.simpleide_master_file;
item = UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_MASTER_EJECT;
break;
case LIBSPECTRUM_IDE_SLAVE:
setting = &settings_current.simpleide_slave_file;
item = UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_SLAVE_EJECT;
break;
default: return 1;
}
return ide_insert( filename, simpleide_idechn, unit, simpleide_commit,
setting, item );
}
int
simpleide_commit( libspectrum_ide_unit unit )
{
int error;
error = libspectrum_ide_commit( simpleide_idechn, unit );
return error;
}
int
simpleide_eject( libspectrum_ide_unit unit )
{
char **setting;
ui_menu_item item;
switch( unit ) {
case LIBSPECTRUM_IDE_MASTER:
setting = &settings_current.simpleide_master_file;
item = UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_MASTER_EJECT;
break;
case LIBSPECTRUM_IDE_SLAVE:
setting = &settings_current.simpleide_slave_file;
item = UI_MENU_ITEM_MEDIA_IDE_SIMPLE8BIT_SLAVE_EJECT;
break;
default: return 1;
}
return ide_eject( simpleide_idechn, unit, simpleide_commit, setting, item );
}
/* Port read/writes */
static libspectrum_byte
simpleide_read( libspectrum_word port, libspectrum_byte *attached )
{
libspectrum_ide_register idereg;
*attached = 0xff; /* TODO: check this */
idereg = ( ( port >> 8 ) & 0x01 ) | ( ( port >> 11 ) & 0x06 );
return libspectrum_ide_read( simpleide_idechn, idereg );
}
static void
simpleide_write( libspectrum_word port, libspectrum_byte VAR_0 )
{
libspectrum_ide_register idereg;
idereg = ( ( port >> 8 ) & 0x01 ) | ( ( port >> 11 ) & 0x06 );
libspectrum_ide_write( simpleide_idechn, idereg, VAR_0 );
}
static void
simpleide_snapshot_enabled( libspectrum_snap *snap )
{
if( libspectrum_snap_simpleide_active( snap ) )
settings_current.VAR_1 = 1;
}
static void
simpleide_to_snapshot( libspectrum_snap *snap )
{
if( !settings_current.VAR_1 ) return;
libspectrum_snap_set_simpleide_active( snap, 1 );
}
| 0.10378 | {'VAR_0': 'data', 'VAR_1': 'simpleide_active'} |
//
// RPN_Calc.h
// RPN-Calc
//
// Created by <NAME> on 12/18/19.
// Copyright © 2019 <NAME>. All rights reserved.
//
#import <Foundation/Foundation.h>
//! Project version number for RPN_Calc.
FOUNDATION_EXPORT double RPN_CalcVersionNumber;
//! Project version string for RPN_Calc.
FOUNDATION_EXPORT const unsigned char RPN_CalcVersionString[];
// In this header, you should import all the public headers of your framework using statements like #import <RPN_Calc/PublicHeader.h>
| //
// RPN_Calc.h
// RPN-Calc
//
// Created by <NAME> on 12/18/19.
// Copyright © 2019 <NAME>. All rights reserved.
//
#import <Foundation/Foundation.h>
//! Project version number for RPN_Calc.
CLASS_0 VAR_0 VAR_1;
//! Project version string for RPN_Calc.
CLASS_0 const VAR_2 char RPN_CalcVersionString[];
// In this header, you should import all the public headers of your framework using statements like #import <RPN_Calc/PublicHeader.h>
| 0.827824 | {'CLASS_0': 'FOUNDATION_EXPORT', 'VAR_0': 'double', 'VAR_1': 'RPN_CalcVersionNumber', 'VAR_2': 'unsigned'} |
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