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/*
*/
#pragma once
#include
#include
#include "esp_err.h"
#include "hal/temperature_sensor_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef struct temperature_sensor_obj_t *temperature_sensor_handle_t;
/**
*/
typedef struct {
int range_min; /**< the minimum value of the temperature you want to test */
int range_max; /**< the maximum value of the temperature you want to test */
temperature_sensor_clk_src_t clk_src; /**< the clock source of the temperature sensor. */
} temperature_sensor_config_t;
/**
*/
#define TEMPERATURE_SENSOR_CONFIG_DEFAULT(min, max) \
{ \
.range_min = min, \
.range_max = max, \
.clk_src = TEMPERATURE_SENSOR_CLK_SRC_DEFAULT, \
}
/**
*/
esp_err_t temperature_sensor_install(const temperature_sensor_config_t *tsens_config, temperature_sensor_handle_t *ret_tsens);
/**
*/
esp_err_t temperature_sensor_uninstall(temperature_sensor_handle_t tsens);
/**
*/
esp_err_t temperature_sensor_enable(temperature_sensor_handle_t tsens);
/**
*/
esp_err_t temperature_sensor_disable(temperature_sensor_handle_t tsens);
/**
*/
esp_err_t temperature_sensor_get_celsius(temperature_sensor_handle_t tsens, float *out_celsius);
#if SOC_TEMPERATURE_SENSOR_INTR_SUPPORT
/**
*/
typedef enum {
TEMPERATURE_VAL_HIGHER_THAN_HIGH_THRESHOLD = 0, /*! | 0 |
< temperature sensor value is higher than high threshold*/
TEMPERATURE_VAL_LOWER_THAN_LOW_THRESHOLD = 1, /*!< temperature sensor value is lower than low threshold*/
} temperature_val_intr_condition_t;
/**
*/
typedef struct {
int celsius_value; /**< Celsius value in interrupt callback. */
temperature_val_intr_condition_t intr_condition; /*!< Can be used to judge temperature sensor interrupts in which reason*/
} temperature_sensor_threshold_event_data_t;
/**
*/
typedef bool (*temperature_thres_cb_t)(temperature_sensor_handle_t tsens, const temperature_sensor_threshold_event_data_t *edata, void *user_data);
/**
*/
typedef struct {
temperature_thres_cb_t on_threshold; /**< Temperature value interrupt callback */
} temperature_sensor_event_callbacks_t;
/**
*/
typedef struct {
float high_threshold; /**< High threshold value(Celsius). Interrupt will be triggered if temperature value is higher than this value */
float low_threshold; /**< Low threshold value(Celsius). | 0 |
Interrupt will be triggered if temperature value is lower than this value */
} temperature_sensor_abs_threshold_config_t;
/**
*/
esp_err_t temperature_sensor_set_absolute_threshold(temperature_sensor_handle_t tsens, const temperature_sensor_abs_threshold_config_t *abs_cfg);
/**
*/
typedef struct {
float increase_delta; /**< Interrupt will be triggered if the temperature increment of two consecutive samplings if larger than `increase_delta` */
float decrease_delta; /**< Interrupt will be triggered if the temperature decrement of two consecutive samplings if smaller than `decrease_delta` */
} temperature_sensor_delta_threshold_config_t;
/**
*/
esp_err_t temperature_sensor_set_delta_threshold(temperature_sensor_handle_t tsens, const temperature_sensor_delta_threshold_config_t *delta_cfg);
/**
*/
esp_err_t temperature_sensor_register_callbacks(temperature_sensor_handle_t tsens, const temperature_sensor_event_callbacks_t *cbs, void *user_arg);
#endif // SOC_TEMPERATURE_SENSOR_INTR_SUPPORT
#ifdef __cplusplus
}
#endif
| 0 |
/*
*/
#pragma once
#include "esp_err.h"
#include "esp_etm.h"
#include "driver/temperature_sensor.h"
#include "hal/temperature_sensor_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef struct {
temperature_sensor_etm_event_type_t event_type; /*!< Temperature Sensor ETM event type */
} temperature_sensor_etm_event_config_t;
/**
*/
esp_err_t temperature_sensor_new_etm_event(temperature_sensor_handle_t tsens, const temperature_sensor_etm_event_config_t *config, esp_etm_event_handle_t *out_event);
/**
*/
typedef struct {
temperature_sensor_etm_task_type_t task_type; /*!< Temperature Sensor ETM task type */
} temperature_sensor_etm_task_config_t;
/**
*/
esp_err_t temperature_sensor_new_etm_task(temperature_sensor_handle_t tsens, const temperature_sensor_etm_task_config_t *config, esp_etm_task_handle_t *out_task);
#ifdef __cplusplus
}
#endif
| 1 |
/*
*/
#pragma once
#include
#include "soc/temperature_sensor_periph.h"
#include "hal/temperature_sensor_types.h"
#include "driver/temperature_sensor.h"
#include "esp_intr_alloc.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
TEMP_SENSOR_FSM_INIT,
TEMP_SENSOR_FSM_ENABLE,
} temp_sensor_fsm_t;
#if CONFIG_TEMP_SENSOR_ISR_IRAM_SAFE
#define TEMPERATURE_SENSOR_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_IRAM | ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED)
#define TEMPERATURE_SENSOR_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else
#define TEMPERATURE_SENSOR_INTR_ALLOC_FLAGS (ESP_INTR_FLAG_SHARED | ESP_INTR_FLAG_LOWMED)
#define TEMPERATURE_SENSOR_MEM_ALLOC_CAPS (MALLOC_CAP_DEFAULT)
#endif
typedef struct temperature_sensor_obj_t temperature_sensor_obj_t;
struct temperature_sensor_obj_t {
const temperature_sensor_attribute_t *tsens_attribute;
temp_sensor_fsm_t fsm;
temperature_sensor_clk_src_t clk_src;
#if SOC_TEMPERATURE_SENSOR_INTR_SUPPORT
intr_handle_t temp_sensor_isr_handle;
temperature_thres_cb_t threshold_cbs;
void *cb_user_arg;
#endif // SOC_TEMPERATURE_SENSOR_INTR_SUPPORT
};
#ifdef __cplusplus
}
#endif
| 2 |
/*
*/
#pragma once
/* Provide a SHA256 API for bootloader_support code,
that can be used from bootloader or app code.
This header is available to source code in the bootloader & bootloader_support components only.
Use mbedTLS APIs or include esp32/sha.h to calculate SHA256 in IDF apps.
*/
#include
#include
#include "esp_err.h"
typedef void *bootloader_sha256_handle_t;
bootloader_sha256_handle_t bootloader_sha256_start(void);
void bootloader_sha256_data(bootloader_sha256_handle_t handle, const void *data, size_t data_len);
void bootloader_sha256_finish(bootloader_sha256_handle_t handle, uint8_t *digest);
| 3 |
/*
*/
#ifndef __BOOT_CONFIG_H__
#define __BOOT_CONFIG_H__
#include
#ifdef __cplusplus
extern "C"
{
#endif
#include "esp_flash_partitions.h"
#include "soc/soc.h"
#define SPI_SEC_SIZE 0x1000
#define SPI_ERROR_LOG "spi flash error"
#define MAX_OTA_SLOTS 16
typedef struct {
esp_partition_pos_t ota_info;
esp_partition_pos_t factory;
esp_partition_pos_t test;
esp_partition_pos_t ota[MAX_OTA_SLOTS];
uint32_t app_count;
uint32_t selected_subtype;
} bootloader_state_t;
bool flash_encrypt(bootloader_state_t *bs);
/* Indices used by index_to_partition are the OTA index
number, or these special constants */
#define FACTORY_INDEX (-1)
#define TEST_APP_INDEX (-2)
#define INVALID_INDEX (-99)
#ifdef __cplusplus
}
#endif
#endif /* __BOOT_CONFIG_H__ */
| 4 |
/*
*/
#pragma once
#include "bootloader_config.h"
#include "esp_image_format.h"
#include "bootloader_config.h"
/**
*/
bool bootloader_utility_load_partition_table(bootloader_state_t* bs);
/**
*/
int bootloader_utility_get_selected_boot_partition(const bootloader_state_t *bs);
/**
*/
__attribute__((__noreturn__)) void bootloader_utility_load_boot_image(const bootloader_state_t *bs, int start_index);
#ifdef CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP
/**
void bootloader_utility_load_boot_image_from_deep_sleep(void);
#endif
/**
*/
__attribute__((__noreturn__)) void bootloader_reset(void);
/**
*/
void bootloader_atexit(void);
/**
*/
esp_err_t bootloader_sha256_hex_to_str(char *out_str, const uint8_t *in_array_hex, size_t len);
/**
*/
void bootloader_debug_buffer(const void *buffer, size_t length, const char *label);
/** @brief Generates the digest of the data between offset & offset+length.
*/
esp_err_t bootloader_sha256_flash_contents(uint32_t flash_offset, uint32_t len, uint8_t *digest);
| 5 |
/*
*/
#pragma once
/**
*/
void bootloader_ana_super_wdt_reset_config(bool enable);
/**
*/
void bootloader_ana_bod_reset_config(bool enable);
/**
*/
void bootloader_ana_clock_glitch_reset_config(bool enable);
| 6 |
/*
*/
#pragma once
/**
*/
void bootloader_console_init(void);
/**
*/
void bootloader_console_deinit(void);
/**
*/
void bootloader_console_write_char_usb(char c);
| 7 |
/*
*/
#pragma once
#include "sdkconfig.h"
#include
#include
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32P4
#include "esp32p4/rom/secure_boot.h"
#endif
#if !CONFIG_IDF_TARGET_ESP32 || CONFIG_ESP32_REV_MIN_FULL >= 300
#if CONFIG_SECURE_BOOT_V2_ENABLED || CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT
/** @brief Legacy function to verify RSA secure boot signature block for Secure Boot V2.
esp_err_t esp_secure_boot_verify_rsa_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest);
#endif /* CONFIG_SECURE_BOOT_V2_ENABLED || CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT */
#endif
| 8 |
/*
*/
#pragma once
#include "esp_err.h"
#include "esp_image_format.h"
/**@{*/
/**
extern int _bss_start;
extern int _bss_end;
extern int _data_start;
extern int _data_end;
/**@}*/
/**
extern esp_image_header_t bootloader_image_hdr;
/**@{*/
/**
esp_err_t bootloader_read_bootloader_header(void);
esp_err_t bootloader_check_bootloader_validity(void);
void bootloader_clear_bss_section(void);
void bootloader_config_wdt(void);
void bootloader_enable_random(void);
void bootloader_print_banner(void);
/**@}*/
/* @brief Prepares hardware for work.
*/
esp_err_t bootloader_init(void);
| 9 |
/*
*/
#warning esp_flash_data_types.h has been merged into esp_flash_partitions.h, please include esp_flash_partitions.h instead
#include "esp_flash_partitions.h"
| 10 |
/*
*/
#pragma once
#include
#include
#include "esp_flash_partitions.h"
#include "esp_app_format.h"
#include "esp_assert.h"
#ifdef __cplusplus
extern "C" {
#endif
#define ESP_ERR_IMAGE_BASE 0x2000
#define ESP_ERR_IMAGE_FLASH_FAIL (ESP_ERR_IMAGE_BASE + 1)
#define ESP_ERR_IMAGE_INVALID (ESP_ERR_IMAGE_BASE + 2)
/* Support for app/bootloader image parsing
Can be compiled as part of app or bootloader code.
*/
#define ESP_IMAGE_HASH_LEN 32 /* Length of the appended SHA-256 digest */
/* Structure to hold on-flash image metadata */
typedef struct {
uint32_t start_addr; /* Start address of image */
esp_image_header_t image; /* Header for entire image */
esp_image_segment_header_t segments[ESP_IMAGE_MAX_SEGMENTS]; /* Per-segment header data */
uint32_t segment_data[ESP_IMAGE_MAX_SEGMENTS]; /* Data offsets for each segment */
uint32_t image_len; /* Length of image on flash, in bytes */
uint8_t image_digest[32]; /* appended SHA-256 digest */
uint32_t secure_version; /* secure version for anti-rollback, it is covered by sha256 (set if CONFIG_BOOTLOADER_APP_ANTI_ROLLBACK=y) */
} esp_image_metadata_t;
typedef enum {
ESP_IMAGE_VERIFY, /* Verify image contents, not load to memory, load metadata. | 11 |
Print errors. */
ESP_IMAGE_VERIFY_SILENT, /* Verify image contents, not load to memory, load metadata. Don't print errors. */
#ifdef BOOTLOADER_BUILD
ESP_IMAGE_LOAD, /* Verify image contents, load to memory, load metadata. Print errors. */
ESP_IMAGE_LOAD_NO_VALIDATE, /* Not verify image contents, load to memory, load metadata. Print errors. */
#endif
} esp_image_load_mode_t;
typedef struct {
esp_partition_pos_t partition; /*!< Partition of application which worked before goes to the deep sleep. */
uint16_t reboot_counter; /*!< Reboot counter. Reset only when power is off. */
union {
struct {
uint8_t factory_reset_state : 1; /* True when Factory reset has occurred */
uint8_t reserve : 7; /* Reserve */
};
uint8_t val;
} flags;
uint8_t reserve; /*!< Reserve */
#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
uint8_t custom[CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE]; /*! | 11 |
< Reserve for custom propose */
#endif
uint32_t crc; /*!< Check sum crc32 */
} rtc_retain_mem_t;
ESP_STATIC_ASSERT(offsetof(rtc_retain_mem_t, crc) == sizeof(rtc_retain_mem_t) - sizeof(uint32_t), "CRC field must be the last field of rtc_retain_mem_t structure");
#ifdef CONFIG_BOOTLOADER_RESERVE_RTC_MEM
#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
ESP_STATIC_ASSERT(CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE % 4 == 0, "CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE must be a multiple of 4 bytes");
/* The custom field must be the penultimate field */
ESP_STATIC_ASSERT(offsetof(rtc_retain_mem_t, custom) == sizeof(rtc_retain_mem_t) - sizeof(uint32_t) - CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE,
"custom field in rtc_retain_mem_t structure must be the field before the CRC one");
#endif
ESP_STATIC_ASSERT(CONFIG_BOOTLOADER_RESERVE_RTC_SIZE % 4 == 0, "CONFIG_BOOTLOADER_RESERVE_RTC_SIZE must be a multiple of 4 bytes");
#ifdef CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE + CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC_SIZE)
#else
#define ESP_BOOTLOADER_RESERVE_RTC (CONFIG_BOOTLOADER_RESERVE_RTC_SIZE)
#endif
ESP_STATIC_ASSERT(sizeof(rtc_retain_mem_t) <= ESP_BOOTLOADER_RESERVE_RTC, "Reserved RTC area must exceed size of rtc_retain_mem_t");
#endif // CONFIG_BOOTLOADER_RESERVE_RTC_MEM
/**
*/
esp_err_t esp_image_verify(esp_image_load_mode_t mode, const esp_partition_pos_t *part, esp_image_metadata_t *data);
/**
*/
esp_err_t esp_image_get_metadata(const esp_partition_pos_t *part, esp_image_metadata_t *metadata);
/**
*/
esp_err_t bootloader_load_image(const esp_partition_pos_t *part, esp_image_metadata_t *data);
/**
*/
esp_err_t bootloader_load_image_no_verify(const esp_partition_pos_t *part, esp_image_metadata_t *data);
/**
*/
esp_err_t esp_image_verify_bootloader(uint32_t *length);
/**
*/
esp_err_t esp_image_verify_bootloader_data(esp_image_metadata_t *data);
/**
*/
int esp_image_get_flash_size(esp_image_flash_size_t app_flash_size);
typedef struct {
uint32_t drom_addr;
uint32_t drom_load_addr;
uint32_t drom_size;
uint32_t irom_addr;
uint32_t irom_load_addr;
uint32_t irom_size;
} esp_image_flash_mapping_t;
#ifdef __cplusplus
}
#endif
| 11 |
/*
*/
#pragma once
#include "esp_err.h"
#include "esp_types.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
#define ESP_PARTITION_MAGIC 0x50AA
#define ESP_PARTITION_MAGIC_MD5 0xEBEB
#define PART_TYPE_APP 0x00
#define PART_SUBTYPE_FACTORY 0x00
#define PART_SUBTYPE_OTA_FLAG 0x10
#define PART_SUBTYPE_OTA_MASK 0x0f
#define PART_SUBTYPE_TEST 0x20
#define PART_TYPE_DATA 0x01
#define PART_SUBTYPE_DATA_OTA 0x00
#define PART_SUBTYPE_DATA_RF 0x01
#define PART_SUBTYPE_DATA_WIFI 0x02
#define PART_SUBTYPE_DATA_NVS_KEYS 0x04
#define PART_SUBTYPE_DATA_EFUSE_EM 0x05
#define PART_TYPE_END 0xff
#define PART_SUBTYPE_END 0xff
#define PART_FLAG_ENCRYPTED (1<<0)
#define PART_FLAG_READONLY (1<<1)
/* The md5sum value is found this many bytes after the ESP_PARTITION_MAGIC_MD5 offset */
#define ESP_PARTITION_MD5_OFFSET 16
/* Pre-partition table fixed flash offsets */
#define ESP_BOOTLOADER_DIGEST_OFFSET 0x0
#define ESP_BOOTLOADER_OFFSET CONFIG_BOOTLOADER_OFFSET_IN_FLASH /* Offset of bootloader image. | 12 |
Has matching value in bootloader KConfig.projbuild file. */
#define ESP_PARTITION_TABLE_OFFSET CONFIG_PARTITION_TABLE_OFFSET /* Offset of partition table. Backwards-compatible name.*/
#define ESP_PARTITION_TABLE_MAX_LEN 0xC00 /* Maximum length of partition table data */
#define ESP_PARTITION_TABLE_MAX_ENTRIES (ESP_PARTITION_TABLE_MAX_LEN / sizeof(esp_partition_info_t)) /* Maximum length of partition table data, including terminating entry */
/// OTA_DATA states for checking operability of the app.
typedef enum {
ESP_OTA_IMG_NEW = 0x0U, /*!< Monitor the first boot. In bootloader this state is changed to ESP_OTA_IMG_PENDING_VERIFY. */
ESP_OTA_IMG_PENDING_VERIFY = 0x1U, /*!< First boot for this app was. If while the second boot this state is then it will be changed to ABORTED. */
ESP_OTA_IMG_VALID = 0x2U, /*!< App was confirmed as workable. App can boot and work without limits. */
ESP_OTA_IMG_INVALID = 0x3U, /*! | 12 |
< App was confirmed as non-workable. This app will not selected to boot at all. */
ESP_OTA_IMG_ABORTED = 0x4U, /*!< App could not confirm the workable or non-workable. In bootloader IMG_PENDING_VERIFY state will be changed to IMG_ABORTED. This app will not selected to boot at all. */
ESP_OTA_IMG_UNDEFINED = 0xFFFFFFFFU, /*!< Undefined. App can boot and work without limits. */
} esp_ota_img_states_t;
/* OTA selection structure (two copies in the OTA data partition.)
Size of 32 bytes is friendly to flash encryption */
typedef struct {
uint32_t ota_seq;
uint8_t seq_label[20];
uint32_t ota_state;
uint32_t crc; /* CRC32 of ota_seq field only */
} esp_ota_select_entry_t;
typedef struct {
uint32_t offset;
uint32_t size;
} esp_partition_pos_t;
/* Structure which describes the layout of partition table entry.
*/
typedef struct {
uint16_t magic;
uint8_t type;
uint8_t subtype;
esp_partition_pos_t pos;
uint8_t label[16];
uint32_t flags;
} esp_partition_info_t;
/* @brief Verify the partition table
*/
esp_err_t esp_partition_table_verify(const esp_partition_info_t *partition_table, bool log_errors, int *num_partitions);
/**
*/
bool esp_partition_is_flash_region_writable(size_t addr, size_t size);
/**
*/
bool esp_partition_main_flash_region_safe(size_t addr, size_t size);
#ifdef __cplusplus
}
#endif
| 12 |
/*
*/
#pragma once
#include
#include
#include
#include "soc/soc.h"
#include "soc/soc_caps.h"
#include "sdkconfig.h"
#include "esp_attr.h"
#ifdef __cplusplus
extern "C" {
#endif
/** The content of this file is to be kept in sync with the common section of esp_memory_utils.h **/
/**
*/
__attribute__((always_inline))
inline static bool esp_dram_match_iram(void) {
return (SOC_DRAM_LOW == SOC_IRAM_LOW && SOC_DRAM_HIGH == SOC_IRAM_HIGH);
}
/**
*/
__attribute__((always_inline))
inline static bool esp_ptr_in_iram(const void *p) {
#if CONFIG_IDF_TARGET_ESP32 && CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
return ((intptr_t)p >= SOC_CACHE_APP_LOW && (intptr_t)p = SOC_IRAM_LOW && (intptr_t)p = SOC_DRAM_LOW && (intptr_t)p = SOC_DIRAM_DRAM_LOW && (intptr_t)p = SOC_DIRAM_IRAM_LOW && (intptr_t)p = SOC_RTC_IRAM_LOW && (intptr_t)p = SOC_RTC_DRAM_LOW && (intptr_t)p = SOC_RTC_DATA_LOW && (intptr_t)p = SOC_TCM_LOW && (intptr_t)p < SOC_TCM_HIGH);
}
#endif //#if SOC_MEM_TCM_SUPPORTED
/** End of the common section that has to be in sync with esp_memory_utils. | 13 |
h **/
/** Don't add new functions below **/
#ifdef __cplusplus
}
#endif
| 13 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/** @brief Configure clocks for early boot
*/
void bootloader_clock_configure(void);
/** @brief Return the rated maximum frequency of this chip
*/
int bootloader_clock_get_rated_freq_mhz(void);
#ifdef __cplusplus
}
#endif
| 14 |
/*
*/
#pragma once
#include
#include "esp_assert.h"
// TODO: IDF-9197
#include "sdkconfig.h"
/**
typedef enum {
ESP_CHIP_ID_ESP32 = 0x0000, /*!< chip ID: ESP32 */
ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */
ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
ESP_CHIP_ID_ESP32C2 = 0x000C, /*!< chip ID: ESP32-C2 */
ESP_CHIP_ID_ESP32C6 = 0x000D, /*!< chip ID: ESP32-C6 */
ESP_CHIP_ID_ESP32H2 = 0x0010, /*!< chip ID: ESP32-H2 */
ESP_CHIP_ID_ESP32P4 = 0x0012, /*!< chip ID: ESP32-P4 */
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION // TODO: IDF-9197
ESP_CHIP_ID_ESP32C5 = 0x0011, /*!< chip ID: ESP32-C5 beta3 (MPW)*/
#elif CONFIG_IDF_TARGET_ESP32C5_MP_VERSION
ESP_CHIP_ID_ESP32C5 = 0x0017, /*!< chip ID: ESP32-C5 MP */
#endif
ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
} __attribute__((packed)) esp_chip_id_t;
/** @cond */
ESP_STATIC_ASSERT(sizeof(esp_chip_id_t) == 2, "esp_chip_id_t should be 16 bit");
/** @endcond */
/**
*/
typedef enum {
ESP_IMAGE_SPI_MODE_QIO, /*! | 15 |
< SPI mode QIO */
ESP_IMAGE_SPI_MODE_QOUT, /*!< SPI mode QOUT */
ESP_IMAGE_SPI_MODE_DIO, /*!< SPI mode DIO */
ESP_IMAGE_SPI_MODE_DOUT, /*!< SPI mode DOUT */
ESP_IMAGE_SPI_MODE_FAST_READ, /*!< SPI mode FAST_READ */
ESP_IMAGE_SPI_MODE_SLOW_READ /*!< SPI mode SLOW_READ */
} esp_image_spi_mode_t;
/**
*/
typedef enum {
ESP_IMAGE_SPI_SPEED_DIV_2, /*!< The SPI flash clock frequency is divided by 2 of the clock source */
ESP_IMAGE_SPI_SPEED_DIV_3, /*!< The SPI flash clock frequency is divided by 3 of the clock source */
ESP_IMAGE_SPI_SPEED_DIV_4, /*!< The SPI flash clock frequency is divided by 4 of the clock source */
ESP_IMAGE_SPI_SPEED_DIV_1 = 0xF /*!< The SPI flash clock frequency equals to the clock source */
} esp_image_spi_freq_t;
/**
*/
typedef enum {
ESP_IMAGE_FLASH_SIZE_1MB = 0, /*!< SPI flash size 1 MB */
ESP_IMAGE_FLASH_SIZE_2MB, /*!< SPI flash size 2 MB */
ESP_IMAGE_FLASH_SIZE_4MB, /*! | 15 |
< SPI flash size 4 MB */
ESP_IMAGE_FLASH_SIZE_8MB, /*!< SPI flash size 8 MB */
ESP_IMAGE_FLASH_SIZE_16MB, /*!< SPI flash size 16 MB */
ESP_IMAGE_FLASH_SIZE_32MB, /*!< SPI flash size 32 MB */
ESP_IMAGE_FLASH_SIZE_64MB, /*!< SPI flash size 64 MB */
ESP_IMAGE_FLASH_SIZE_128MB, /*!< SPI flash size 128 MB */
ESP_IMAGE_FLASH_SIZE_MAX /*!< SPI flash size MAX */
} esp_image_flash_size_t;
#define ESP_IMAGE_HEADER_MAGIC 0xE9 /*!< The magic word for the esp_image_header_t structure. */
/**
*/
typedef struct {
uint8_t magic; /*!< Magic word ESP_IMAGE_HEADER_MAGIC */
uint8_t segment_count; /*!< Count of memory segments */
uint8_t spi_mode; /*!< flash read mode (esp_image_spi_mode_t as uint8_t) */
uint8_t spi_speed: 4; /*!< flash frequency (esp_image_spi_freq_t as uint8_t) */
uint8_t spi_size: 4; /*!< flash chip size (esp_image_flash_size_t as uint8_t) */
uint32_t entry_addr; /*! | 15 |
< Entry address */
uint8_t wp_pin; /*!< WP pin when SPI pins set via efuse (read by ROM bootloader,
uint8_t spi_pin_drv[3]; /*!< Drive settings for the SPI flash pins (read by ROM bootloader) */
esp_chip_id_t chip_id; /*!< Chip identification number */
uint8_t min_chip_rev; /*!< Minimal chip revision supported by image
*/
uint16_t min_chip_rev_full; /*!< Minimal chip revision supported by image, in format: major * 100 + minor */
uint16_t max_chip_rev_full; /*!< Maximal chip revision supported by image, in format: major * 100 + minor */
uint8_t reserved[4]; /*!< Reserved bytes in additional header space, currently unused */
uint8_t hash_appended; /*!< If 1, a SHA256 digest "simple hash" (of the entire image) is appended after the checksum.
} __attribute__((packed)) esp_image_header_t;
/** @cond */
ESP_STATIC_ASSERT(sizeof(esp_image_header_t) == 24, "binary image header should be 24 bytes");
/** @endcond */
/**
*/
typedef struct {
uint32_t load_addr; /*! | 15 |
< Address of segment */
uint32_t data_len; /*!< Length of data */
} esp_image_segment_header_t;
#define ESP_IMAGE_MAX_SEGMENTS 16 /*!< Max count of segments in the image. */
| 15 |
/*
*/
#pragma once
#include "esp_flash_partitions.h"
#include "esp_image_format.h"
#ifdef __cplusplus
extern "C" {
#endif
// Type of hold a GPIO in low state
typedef enum {
GPIO_LONG_HOLD = 1, /*!< The long hold GPIO */
GPIO_SHORT_HOLD = -1, /*!< The short hold GPIO */
GPIO_NOT_HOLD = 0 /*!< If the GPIO input is not low */
} esp_comm_gpio_hold_t;
typedef enum {
ESP_IMAGE_BOOTLOADER,
ESP_IMAGE_APPLICATION
} esp_image_type;
/**
*/
esp_err_t bootloader_common_read_otadata(const esp_partition_pos_t *ota_info, esp_ota_select_entry_t *two_otadata);
/**
*/
uint32_t bootloader_common_ota_select_crc(const esp_ota_select_entry_t *s);
/**
*/
bool bootloader_common_ota_select_valid(const esp_ota_select_entry_t *s);
/**
*/
bool bootloader_common_ota_select_invalid(const esp_ota_select_entry_t *s);
/**
*/
esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio(uint32_t num_pin, uint32_t delay_sec);
/**
*/
esp_comm_gpio_hold_t bootloader_common_check_long_hold_gpio_level(uint32_t num_pin, uint32_t delay_sec, bool level);
/**
*/
bool bootloader_common_erase_part_type_data(const char *list_erase, bool ota_data_erase);
/**
*/
bool bootloader_common_label_search(const char *list, char *label);
/**
*/
void bootloader_configure_spi_pins(int drv);
/**
*/
esp_err_t bootloader_common_get_sha256_of_partition(uint32_t address, uint32_t size, int type, uint8_t *out_sha_256);
/**
*/
int bootloader_common_get_active_otadata(esp_ota_select_entry_t *two_otadata);
/**
*/
int bootloader_common_select_otadata(const esp_ota_select_entry_t *two_otadata, bool *valid_two_otadata, bool max);
/**
*/
uint32_t bootloader_common_get_chip_ver_pkg(void);
/**
*/
esp_err_t bootloader_common_check_chip_validity(const esp_image_header_t* img_hdr, esp_image_type type);
/**
*/
void bootloader_common_vddsdio_configure(void);
#if CONFIG_BOOTLOADER_RESERVE_RTC_MEM
/**
*/
esp_partition_pos_t* bootloader_common_get_rtc_retain_mem_partition(void);
/**
void bootloader_common_update_rtc_retain_mem(esp_partition_pos_t* partition, bool reboot_counter);
/**
*/
void bootloader_common_reset_rtc_retain_mem(void);
/**
*/
uint16_t bootloader_common_get_rtc_retain_mem_reboot_counter(void);
/**
*/
bool bootloader_common_get_rtc_retain_mem_factory_reset_state(void);
/**
*/
void bootloader_common_set_rtc_retain_mem_factory_reset_state(void);
/**
*/
rtc_retain_mem_t* bootloader_common_get_rtc_retain_mem(void);
#endif // CONFIG_BOOTLOADER_RESERVE_RTC_MEM
#ifdef __cplusplus
}
#endif
| 16 |
/*
*/
#pragma once
#include
#include
#include "soc/efuse_periph.h"
#include "soc/soc_caps.h"
#include "esp_image_format.h"
#include "esp_rom_efuse.h"
#include "sdkconfig.h"
#include "esp_rom_crc.h"
#include "hal/efuse_ll.h"
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32P4
#include "esp32p4/rom/secure_boot.h"
#endif
#ifdef CONFIG_SECURE_BOOT_V1_ENABLED
#if !defined(CONFIG_SECURE_SIGNED_ON_BOOT) || !defined(CONFIG_SECURE_SIGNED_ON_UPDATE) || !defined(CONFIG_SECURE_SIGNED_APPS)
#error "internal sdkconfig error, secure boot should always enable all signature options"
#endif
#endif
#ifdef __cplusplus
extern "C" {
#endif
/* Support functions for secure boot features. | 17 |
Can be compiled as part of app or bootloader code.
*/
#define ESP_SECURE_BOOT_DIGEST_LEN 32
#if CONFIG_IDF_TARGET_ESP32C2
#define ESP_SECURE_BOOT_KEY_DIGEST_LEN 16
#else
#define ESP_SECURE_BOOT_KEY_DIGEST_LEN 32
#endif
#ifdef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
#include "esp_efuse.h"
#include "esp_efuse_table.h"
#endif
/** @brief Is secure boot currently enabled in hardware?
*/
static inline bool esp_secure_boot_enabled(void)
{
#if CONFIG_IDF_TARGET_ESP32
#ifdef CONFIG_SECURE_BOOT_V1_ENABLED
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
return efuse_ll_get_secure_boot_v1_en();
#else
return esp_efuse_read_field_bit(ESP_EFUSE_ABS_DONE_0);
#endif
#elif CONFIG_SECURE_BOOT_V2_ENABLED
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
return efuse_ll_get_secure_boot_v2_en();
#else
return esp_efuse_read_field_bit(ESP_EFUSE_ABS_DONE_1);
#endif
#endif
#else
#ifndef CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH
return efuse_ll_get_secure_boot_v2_en();
#else
return esp_efuse_read_field_bit(ESP_EFUSE_SECURE_BOOT_EN);
#endif
#endif
return false; /* Secure Boot not enabled in menuconfig */
}
/** @brief Generate secure digest from bootloader image
*/
esp_err_t esp_secure_boot_generate_digest(void);
/** @brief Enable secure boot V1 if it is not already enabled. | 17 |
*/
esp_err_t esp_secure_boot_permanently_enable(void);
/** @brief Enables secure boot V2 if it is not already enabled.
*/
esp_err_t esp_secure_boot_v2_permanently_enable(const esp_image_metadata_t *image_data);
/** @brief Verify the secure boot signature appended to some binary data in flash.
*/
esp_err_t esp_secure_boot_verify_signature(uint32_t src_addr, uint32_t length);
/** @brief Secure boot verification block, on-flash data format. */
typedef struct {
uint32_t version;
uint8_t signature[64];
} esp_secure_boot_sig_block_t;
/** @brief Verify the ECDSA secure boot signature block for Secure Boot V1.
esp_err_t esp_secure_boot_verify_ecdsa_signature_block(const esp_secure_boot_sig_block_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest);
#if !CONFIG_IDF_TARGET_ESP32 || CONFIG_ESP32_REV_MIN_FULL >= 300
#if CONFIG_SECURE_BOOT_V2_ENABLED || CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT
/** @brief Verify the secure boot signature block for Secure Boot V2.
esp_err_t esp_secure_boot_verify_sbv2_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, uint8_t *verified_digest);
#endif /* CONFIG_SECURE_BOOT_V2_ENABLED || CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT */
/**
*/
typedef struct {
uint8_t key_digests[SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS][ESP_SECURE_BOOT_DIGEST_LEN]; /* SHA of the public key components in the signature block */
unsigned num_digests; /* Number of valid digests, starting at index 0 */
} esp_image_sig_public_key_digests_t;
#endif // ! | 17 |
CONFIG_IDF_TARGET_ESP32 || CONFIG_ESP32_REV_MIN_FULL >= 300
/** @brief Legacy ECDSA verification function
*/
esp_err_t esp_secure_boot_verify_signature_block(const esp_secure_boot_sig_block_t *sig_block, const uint8_t *image_digest)
__attribute__((deprecated("use esp_secure_boot_verify_ecdsa_signature_block instead")));
#define FLASH_OFFS_SECURE_BOOT_IV_DIGEST 0
/** @brief Secure boot IV+digest header */
typedef struct {
uint8_t iv[128];
uint8_t digest[64];
} esp_secure_boot_iv_digest_t;
/** @brief Check the secure boot V2 during startup
*/
void esp_secure_boot_init_checks(void);
#if !BOOTLOADER_BUILD && (CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME)
/** @brief Scan the current running app for signature blocks
*/
esp_err_t esp_secure_boot_get_signature_blocks_for_running_app(bool digest_public_keys, esp_image_sig_public_key_digests_t *public_key_digests);
#endif // !BOOTLOADER_BUILD && (CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME || CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME)
/** @brief Set all secure eFuse features related to secure_boot
*/
esp_err_t esp_secure_boot_enable_secure_features(void);
/** @brief Returns the verification status for all physical security features of secure boot in release mode
*/
bool esp_secure_boot_cfg_verify_release_mode(void);
#if ! | 17 |
defined(BOOTLOADER_BUILD) && SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY && CONFIG_SECURE_BOOT_V2_ENABLED
/** @brief Returns the verification status of the image pointed by the part_pos argument against the public key digest present at index `efuse_digest_index`
*/
esp_err_t esp_secure_boot_verify_with_efuse_digest_index(int efuse_digest_index, esp_partition_pos_t *part_pos);
#endif // !defined(BOOTLOADER_BUILD) && SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY && CONFIG_SECURE_BOOT_V2_ENABLED
#ifdef __cplusplus
}
#endif
| 17 |
/*
*/
#pragma once
#include
#include
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
static inline bool bootloader_util_regions_overlap(
const intptr_t start1, const intptr_t end1,
const intptr_t start2, const intptr_t end2)
{
assert(end1 > start1);
assert(end2 > start2);
return (end1 > start2 && end2 > start1);
}
#ifdef __cplusplus
}
#endif
| 18 |
/*
*/
#pragma once
#include
#include "esp_attr.h"
#include "esp_err.h"
#include "soc/soc_caps.h"
#ifndef BOOTLOADER_BUILD
#include "spi_flash_mmap.h"
#endif
#include "hal/efuse_ll.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
/* @brief Flash encryption mode based on efuse values
*/
typedef enum {
ESP_FLASH_ENC_MODE_DISABLED, // flash encryption is not enabled (flash crypt cnt=0)
ESP_FLASH_ENC_MODE_DEVELOPMENT, // flash encryption is enabled but for Development (reflash over UART allowed)
ESP_FLASH_ENC_MODE_RELEASE // flash encryption is enabled for Release (reflash over UART disabled)
} esp_flash_enc_mode_t;
/**
*/
/** @brief Is flash encryption currently enabled in hardware?
*/
bool esp_flash_encryption_enabled(void);
/* @brief Update on-device flash encryption
*/
esp_err_t esp_flash_encrypt_check_and_update(void);
/** @brief Returns the Flash Encryption state and prints it
*/
bool esp_flash_encrypt_state(void);
/** @brief Checks if the first initialization was done
*/
bool esp_flash_encrypt_initialized_once(void);
/** @brief The first initialization of Flash Encryption key and related eFuses
*/
esp_err_t esp_flash_encrypt_init(void);
/** @brief Encrypts flash content
*/
esp_err_t esp_flash_encrypt_contents(void);
/** @brief Activates Flash encryption on the chip
*/
esp_err_t esp_flash_encrypt_enable(void);
/** @brief Returns True if the write protection of FLASH_CRYPT_CNT is set
*/
bool esp_flash_encrypt_is_write_protected(bool print_error);
/** @brief Encrypt-in-place a block of flash sectors
*/
esp_err_t esp_flash_encrypt_region(uint32_t src_addr, size_t data_length);
/** @brief Write protect FLASH_CRYPT_CNT
void esp_flash_write_protect_crypt_cnt(void);
/** @brief Return the flash encryption mode
*/
esp_flash_enc_mode_t esp_get_flash_encryption_mode(void);
/** @brief Check the flash encryption mode during startup
*/
void esp_flash_encryption_init_checks(void);
/** @brief Set all secure eFuse features related to flash encryption
*/
esp_err_t esp_flash_encryption_enable_secure_features(void);
/** @brief Returns the verification status for all physical security features of flash encryption in release mode
*/
bool esp_flash_encryption_cfg_verify_release_mode(void);
/** @brief Switches Flash Encryption from "Development" to "Release"
*/
void esp_flash_encryption_set_release_mode(void);
#ifdef __cplusplus
}
#endif
| 19 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void bootloader_random_enable(void);
/**
*/
void bootloader_random_disable(void);
/**
*/
void bootloader_fill_random(void *buffer, size_t length);
#ifdef __cplusplus
}
#endif
| 20 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
void bootloader_init_mem(void);
#ifdef __cplusplus
}
#endif
| 21 |
/*
*/
#ifndef __BOOTLOADER_FLASH_H
#define __BOOTLOADER_FLASH_H
#include
#include
#include
#include
#include /* including in bootloader for error values */
#include "sdkconfig.h"
#include "bootloader_flash.h"
#ifdef __cplusplus
extern "C" {
#endif
#define FLASH_SECTOR_SIZE 0x1000
#define FLASH_BLOCK_SIZE 0x10000
#define MMAP_ALIGNED_MASK (SPI_FLASH_MMU_PAGE_SIZE - 1)
#define MMU_FLASH_MASK (~(SPI_FLASH_MMU_PAGE_SIZE - 1))
/**
*/
#define GET_REQUIRED_MMU_PAGES(size, v_start) ((size + (v_start - (v_start & MMU_FLASH_MASK)) + SPI_FLASH_MMU_PAGE_SIZE - 1) / SPI_FLASH_MMU_PAGE_SIZE)
/* SPI commands (actual on-wire commands not SPI controller bitmasks)
Suitable for use with the bootloader_execute_flash_command static function.
*/
#define CMD_RDID 0x9F
#define CMD_WRSR 0x01
#define CMD_WRSR2 0x31 /* Not all SPI flash uses this command */
#define CMD_WRSR3 0x11 /* Not all SPI flash uses this command */
#define CMD_WREN 0x06
#define CMD_WRENVSR 0x50 /* Flash write enable for volatile SR bits */
#define CMD_WRDI 0x04
#define CMD_RDSR 0x05
#define CMD_RDSR2 0x35 /* Not all SPI flash uses this command */
#define CMD_RDSR3 0x15 /* Not all SPI flash uses this command */
#define CMD_OTPEN 0x3A /* Enable OTP mode, not all SPI flash uses this command */
#define CMD_RDSFDP 0x5A /* Read the SFDP of the flash */
#define CMD_RESUME 0x7A /* Resume command to clear flash suspend bit */
#define CMD_RESETEN 0x66
#define CMD_RESET 0x99
#define CMD_FASTRD_QIO_4B 0xEC
#define CMD_FASTRD_QUAD_4B 0x6C
#define CMD_FASTRD_DIO_4B 0xBC
#define CMD_FASTRD_DUAL_4B 0x3C
#define CMD_FASTRD_4B 0x0C
#define CMD_SLOWRD_4B 0x13
/* Provide a Flash API for bootloader_support code,
that can be used from bootloader or app code. | 22 |
This header is available to source code in the bootloader &
bootloader_support components only.
*/
/**
*/
uint32_t bootloader_mmap_get_free_pages(void);
/**
*/
const void *bootloader_mmap(uint32_t src_addr, uint32_t size);
/**
*/
void bootloader_munmap(const void *mapping);
/**
*/
esp_err_t bootloader_flash_read(size_t src_addr, void *dest, size_t size, bool allow_decrypt);
/**
*/
esp_err_t bootloader_flash_write(size_t dest_addr, void *src, size_t size, bool write_encrypted);
/**
*/
esp_err_t bootloader_flash_erase_sector(size_t sector);
/**
*/
esp_err_t bootloader_flash_erase_range(uint32_t start_addr, uint32_t size);
/**
*/
uint32_t bootloader_execute_flash_command(uint8_t command, uint32_t mosi_data, uint8_t mosi_len, uint8_t miso_len);
/**
*/
uint32_t bootloader_flash_read_sfdp(uint32_t sfdp_addr, unsigned int miso_byte_num);
/**
*/
void bootloader_enable_wp(void);
/**
*/
void bootloader_spi_flash_reset(void);
#ifdef __cplusplus
}
#endif
#endif
| 22 |
/*
*/
#pragma once
#include
#include
#include "spi_flash_mmap.h" /* including in bootloader for error values */
#include "esp_private/spi_flash_os.h"
#include "sdkconfig.h"
#include "soc/soc_caps.h"
#include "bootloader_flash_override.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
flash_id = ID & 0xffff;
*/
uint32_t bootloader_read_flash_id(void);
/**
*/
esp_err_t bootloader_flash_xmc_startup(void);
/**
*/
esp_err_t __attribute__((weak)) bootloader_flash_unlock(void);
/**
*/
esp_err_t bootloader_flash_reset_chip(void);
/**
*/
bool bootloader_flash_is_octal_mode_enabled(void);
/**
*/
esp_rom_spiflash_read_mode_t bootloader_flash_get_spi_mode(void);
#ifdef __cplusplus
}
#endif
| 23 |
/*
*/
#pragma once
#include "sdkconfig.h"
#include "esp_image_format.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void bootloader_flash_update_id(void);
/**
*/
void bootloader_flash_update_size(uint32_t size);
/**
*/
void bootloader_flash_cs_timing_config(void);
/**
*/
void bootloader_flash_clock_config(const esp_image_header_t* pfhdr);
/**
*/
void bootloader_flash_gpio_config(const esp_image_header_t* pfhdr);
#ifdef CONFIG_IDF_TARGET_ESP32
/**
*/
void bootloader_flash_dummy_config(const esp_image_header_t* pfhdr);
#else
// The meaning has changed on this chip. Deprecated, Call `bootloader_configure_spi_pins()` and `bootloader_flash_set_dummy_out()` directly.
void bootloader_flash_dummy_config(const esp_image_header_t* pfhdr) __attribute__((deprecated));
#endif
#ifdef CONFIG_IDF_TARGET_ESP32
/**
*/
int bootloader_flash_get_wp_pin(void);
#endif
#ifdef __cplusplus
}
#endif
| 24 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/** @brief Enable Quad I/O mode in bootloader (if configured)
*/
void bootloader_enable_qio_mode(void);
/**
flash_id = ID & 0xffff;
*/
uint32_t bootloader_read_flash_id(void);
#ifdef __cplusplus
}
#endif
| 25 |
/*
*/
#pragma once
#include
#include "esp_err.h"
#include "esp_attr.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef unsigned (*bootloader_flash_read_status_fn_t)(void);
typedef void (*bootloader_flash_write_status_fn_t)(unsigned);
typedef struct __attribute__((packed))
{
const char *manufacturer;
uint8_t mfg_id; /* 8-bit JEDEC manufacturer ID */
uint16_t flash_id; /* 16-bit JEDEC flash chip ID */
uint16_t id_mask; /* Bits to match on in flash chip ID */
bootloader_flash_read_status_fn_t read_status_fn;
bootloader_flash_write_status_fn_t write_status_fn;
uint8_t status_qio_bit;
} bootloader_qio_info_t;
/**
*/
unsigned bootloader_read_status_8b_rdsr(void);
/**
*/
unsigned bootloader_read_status_8b_rdsr2(void);
/**
*/
unsigned bootloader_read_status_8b_rdsr3(void);
/**
*/
unsigned bootloader_read_status_16b_rdsr_rdsr2(void);
/**
*/
void bootloader_write_status_8b_wrsr(unsigned new_status);
/**
*/
void bootloader_write_status_8b_wrsr2(unsigned new_status);
/**
*/
void bootloader_write_status_8b_wrsr3(unsigned new_status);
/**
*/
void bootloader_write_status_16b_wrsr(unsigned new_status);
/**
*/
unsigned bootloader_read_status_8b_xmc25qu64a(void);
/**
*/
void bootloader_write_status_8b_xmc25qu64a(unsigned new_status);
/* Array of known flash chips and data to enable Quad I/O mode
Manufacturer & flash ID can be tested by running "esptool. | 26 |
py
flash_id"
If manufacturer ID matches, and flash ID ORed with flash ID mask
matches, enable_qio_mode() will execute "Read Cmd", test if bit
number "QIE Bit" is set, and if not set it will call "Write Cmd"
with this bit set.
Searching of this table stops when the first match is found.
*/
extern const bootloader_qio_info_t __attribute__((weak)) bootloader_flash_qe_support_list[];
/**
*/
esp_err_t __attribute__((weak)) bootloader_flash_unlock(void);
#if CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_QUAD_FLASH || CONFIG_BOOTLOADER_CACHE_32BIT_ADDR_OCTAL_FLASH
/**
*/
void __attribute__((weak)) bootloader_flash_32bits_address_map_enable(esp_rom_spiflash_read_mode_t flash_mode);
#endif
#ifdef __cplusplus
}
#endif
| 26 |
/*
*/
#pragma once
#include
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
esp_err_t bootloader_init_spi_flash(void);
#if CONFIG_APP_BUILD_TYPE_RAM && !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
/**
*/
void bootloader_flash_hardware_init(void);
#endif
#ifdef __cplusplus
}
#endif
| 27 |
/*
*/
#include "esp_secure_boot.h"
#if CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32S3
#include "esp32s3/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C2
#include "esp32c2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32C6
#include "esp32c6/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32H2
#include "esp32h2/rom/secure_boot.h"
#elif CONFIG_IDF_TARGET_ESP32P4
#include "esp32p4/rom/secure_boot.h"
#endif
esp_err_t verify_ecdsa_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, const ets_secure_boot_sig_block_t *trusted_block);
esp_err_t verify_rsa_signature_block(const ets_secure_boot_signature_t *sig_block, const uint8_t *image_digest, const ets_secure_boot_sig_block_t *trusted_block);
| 28 |
/*
*/
#pragma once
#include
#include
#include "hal/ieee802154_ll.h"
#include "esp_ieee802154_frame.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef struct {
bool auto_ack_tx; /*!< A flag indicates auto-tx ack mode is enabled or not */
bool auto_ack_rx; /*!< A flag indicates auto-rx ack mode is enabled or not */
bool enhance_ack_tx; /*!< A flag indicates enh-ack timing mode is enabled or not */
bool promiscuous; /*!< A flag indicates promiscuous mode is enabled or not */
bool coordinator; /*!< A flag indicates the device is coordinator or not*/
bool rx_when_idle; /*!< A flag indicates the device is rx on when idle or not */
int8_t txpower; /*! | 29 |
< Tx power configuration */
uint8_t channel; /*!< Channel configuration */
ieee802154_ll_pending_mode_t pending_mode; /*!< Pending mode configuration */
int8_t cca_threshold; /*!< CCA threshold */
ieee802154_ll_cca_mode_t cca_mode; /*!< CCA mode */
} ieee802154_pib_t;
/**
void ieee802154_pib_init(void);
/**
void ieee802154_pib_update(void);
/**
*/
bool ieee802154_pib_is_pending(void);
/**
void ieee802154_pib_set_channel(uint8_t channel);
/**
*/
uint8_t ieee802154_pib_get_channel(void);
/**
void ieee802154_pib_set_power(int8_t power);
/**
*/
int8_t ieee802154_pib_get_power(void);
/**
void ieee802154_pib_set_promiscuous(bool enable);
/**
*/
bool ieee802154_pib_get_promiscuous(void);
/**
void ieee802154_pib_set_cca_threshold(int8_t cca_threshold);
/**
*/
int8_t ieee802154_pib_get_cca_threshold(void);
/**
void ieee802154_pib_set_cca_mode(ieee802154_ll_cca_mode_t cca_mode);
/**
*/
ieee802154_ll_cca_mode_t ieee802154_pib_get_cca_mode(void);
/**
void ieee802154_pib_set_auto_ack_tx(bool enable);
/**
*/
bool ieee802154_pib_get_auto_ack_tx(void);
/**
void ieee802154_pib_set_auto_ack_rx(bool enable);
/**
*/
bool ieee802154_pib_get_auto_ack_rx(void);
/**
void ieee802154_pib_set_enhance_ack_tx(bool enable);
/**
*/
bool ieee802154_pib_get_enhance_ack_tx(void);
/**
void ieee802154_pib_set_coordinator(bool enable);
/**
*/
bool ieee802154_pib_get_coordinator(void);
/**
void ieee802154_pib_set_pending_mode(ieee802154_ll_pending_mode_t pending_mode);
/**
*/
ieee802154_ll_pending_mode_t ieee802154_pib_get_pending_mode(void);
/**
void ieee802154_pib_set_rx_when_idle(bool enable);
/**
bool ieee802154_pib_get_rx_when_idle(void);
#ifdef __cplusplus
}
#endif
| 29 |
/*
*/
#pragma once
#include
#include
#include "sdkconfig.h"
#include "esp_log.h"
#include "esp_err.h"
#include "soc/soc.h"
#include "esp_ieee802154_frame.h"
#include "esp_ieee802154.h"
#ifdef __cplusplus
extern "C" {
#endif
#define IEEE802154_TAG "ieee802154"
// These three macros are in microseconds, used for transmit_at
#define IEEE802154_ED_TRIG_TX_RAMPUP_TIME_US 256
#define IEEE802154_TX_RAMPUP_TIME_US 98
#define IEEE802154_RX_RAMPUP_TIME_US 146
/**
*/
typedef enum {
IEEE802154_STATE_DISABLE, /*!< IEEE802154 radio state disable */
IEEE802154_STATE_IDLE, /*!< IEEE802154 radio state idle */
IEEE802154_STATE_SLEEP, /*!< IEEE802154 radio state sleep */
IEEE802154_STATE_RX, /*!< IEEE802154 radio state rx */
IEEE802154_STATE_TX_ACK, /*!< IEEE802154 radio state tx ack */
IEEE802154_STATE_TX_ENH_ACK, /*!< IEEE802154 radio state tx enh-ack */
IEEE802154_STATE_TX_CCA, /*! | 30 |
< IEEE802154 radio state cca trigger tx */
IEEE802154_STATE_TX, /*!< IEEE802154 radio state tx */
IEEE802154_STATE_TEST_TX, /*!< IEEE802154 radio state test mode tx */
IEEE802154_STATE_RX_ACK, /*!< IEEE802154 radio state rx ack */
IEEE802154_STATE_ED, /*!< IEEE802154 radio state ED */
IEEE802154_STATE_CCA, /*!< IEEE802154 radio state CCA */
} ieee802154_state_t;
/**
void ieee802154_enable(void);
/**
void ieee802154_disable(void);
/**
void ieee802154_rf_enable(void);
/**
void ieee802154_rf_disable(void);
/**
esp_err_t ieee802154_mac_init(void);
/**
esp_err_t ieee802154_mac_deinit(void);
/**
esp_err_t ieee802154_transmit(const uint8_t *frame, bool cca);
/**
esp_err_t ieee802154_receive(void);
/**
esp_err_t ieee802154_receive_handle_done(const uint8_t* frame);
/**
esp_err_t ieee802154_transmit_at(const uint8_t *frame, bool cca, uint32_t time);
/**
esp_err_t ieee802154_receive_at(uint32_t time);
/**
esp_err_t ieee802154_sleep(void);
/**
esp_err_t ieee802154_energy_detect(uint32_t duration);
/**
esp_err_t ieee802154_cca(void);
/**
int8_t ieee802154_get_recent_rssi(void);
/**
uint8_t ieee802154_get_recent_lqi(void);
/**
ieee802154_state_t ieee802154_get_state(void);
/** The following three functions are only used for internal test. | 30 |
**/
/**
extern void esp_ieee802154_cca_done(bool channel_free);
/**
extern void esp_ieee802154_receive_failed(uint16_t error);
/**
extern void esp_ieee802154_ed_failed(uint16_t error);
#if CONFIG_IEEE802154_TEST
#define IEEE802154_STATIC
#define IEEE802154_INLINE
extern void esp_ieee802154_timer0_done(void);
extern void esp_ieee802154_timer1_done(void);
#else
#define IEEE802154_STATIC static
#define IEEE802154_INLINE inline
#endif // CONFIG_IEEE802154_TEST
#ifdef __cplusplus
}
#endif
| 30 |
/*
*/
#pragma once
#include
#include
#include "esp_err.h"
#include "esp_ieee802154_frame.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef struct {
uint8_t short_addr[CONFIG_IEEE802154_PENDING_TABLE_SIZE][IEEE802154_FRAME_SHORT_ADDR_SIZE]; /*!< Short address table */
uint8_t ext_addr[CONFIG_IEEE802154_PENDING_TABLE_SIZE][IEEE802154_FRAME_EXT_ADDR_SIZE]; /*!< Extend address table */
uint32_t short_addr_mask; /*!< The mask which the index of short address table is used */
uint32_t ext_addr_mask; /*!< The mask which the index of extended address table is used */
} ieee802154_pending_table_t;
/**
esp_err_t ieee802154_add_pending_addr(const uint8_t *addr, bool is_short);
/**
esp_err_t ieee802154_clear_pending_addr(const uint8_t *addr, bool is_short);
/**
void ieee802154_reset_pending_table(bool is_short);
/**
bool ieee802154_ack_config_pending_bit(const uint8_t *frame);
#ifdef __cplusplus
}
#endif
| 31 |
/*
*/
#pragma once
#include
#include
#include "esp_ieee802154_dev.h"
#include "hal/ieee802154_ll.h"
#include "esp_timer.h"
#ifdef __cplusplus
extern "C" {
#endif
#if SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
#define IEEE802154_RF_ENABLE() ieee802154_rf_enable()
#define IEEE802154_RF_DISABLE() ieee802154_rf_disable()
#else
#define IEEE802154_RF_ENABLE()
#define IEEE802154_RF_DISABLE()
#endif // SOC_PM_MODEM_RETENTION_BY_REGDMA && CONFIG_FREERTOS_USE_TICKLESS_IDLE
#define IEEE802154_PROBE(a) do { \
IEEE802154_RECORD_EVENT(a); \
ieee802154_record_abort(a); \
IEEE802154_TXRX_STATISTIC(a); \
} while(0)
#if CONFIG_IEEE802154_RECORD_EVENT
#define IEEE802154_ASSERT_RECORD_EVENT_SIZE CONFIG_IEEE802154_RECORD_EVENT_SIZE
#define IEEE802154_RECORD_EVENT(a) do { \
g_ieee802154_probe.event[g_ieee802154_probe.event_index].event = a; \
g_ieee802154_probe.event[g_ieee802154_probe.event_index].state = ieee802154_get_state(); \
if (a == IEEE802154_EVENT_RX_ABORT) { \
g_ieee802154_probe. | 32 |
event[g_ieee802154_probe.event_index].abort_reason.rx \
= ieee802154_ll_get_rx_abort_reason(); \
} else if (a == IEEE802154_EVENT_TX_ABORT) { \
g_ieee802154_probe.event[g_ieee802154_probe.event_index].abort_reason.tx \
= ieee802154_ll_get_tx_abort_reason(); \
} \
g_ieee802154_probe.event[g_ieee802154_probe.event_index++].timestamp = esp_timer_get_time(); \
g_ieee802154_probe.event_index = (g_ieee802154_probe.event_index == IEEE802154_ASSERT_RECORD_EVENT_SIZE) ? \
0 : g_ieee802154_probe.event_index; \
} while(0)
/**
*/
typedef struct {
ieee802154_ll_events event; /*!< record current radio event */
ieee802154_state_t state; /*!< record current radio state */
union {
ieee802154_ll_rx_abort_reason_t rx;
ieee802154_ll_tx_abort_reason_t tx;
} abort_reason; /*!< record current radio abort reason */
uint64_t timestamp; /*! | 32 |
< record timestamp*/
} ieee802154_event_info_t;
#else
#define IEEE802154_RECORD_EVENT(a)
#endif // CONFIG_IEEE802154_RECORD_EVENT
#if CONFIG_IEEE802154_RECORD_STATE
#define IEEE802154_ASSERT_RECORD_STATE_SIZE CONFIG_IEEE802154_RECORD_STATE_SIZE
#define ieee802154_set_state(a) do { s_ieee802154_state = a; \
sprintf(g_ieee802154_probe.state[g_ieee802154_probe.state_index].line_str, "%d", __LINE__); \
g_ieee802154_probe.state[g_ieee802154_probe.state_index].timestamp = esp_timer_get_time(); \
g_ieee802154_probe.state[g_ieee802154_probe.state_index++].state = a; \
g_ieee802154_probe.state_index = \
(g_ieee802154_probe.state_index == IEEE802154_ASSERT_RECORD_STATE_SIZE) ? 0 : g_ieee802154_probe.state_index; \
} while(0)
/**
*/
typedef struct {
char line_str[5]; /*!< record which line in esp_ieee802154_dev.c changes the state */
ieee802154_state_t state; /*!< record current radio state */
uint64_t timestamp; /*! | 32 |
< record timestamp */
} ieee802154_state_info_t;
#else
#define ieee802154_set_state(state) (s_ieee802154_state = state)
#endif // CONFIG_IEEE802154_RECORD_STATE
#if CONFIG_IEEE802154_RECORD_CMD
#define IEEE802154_ASSERT_RECORD_CMD_SIZE CONFIG_IEEE802154_RECORD_CMD_SIZE
#define ieee802154_set_cmd(a) do { ieee802154_ll_set_cmd(a); \
sprintf(g_ieee802154_probe.cmd[g_ieee802154_probe.cmd_index].line_str, "%d", __LINE__); \
g_ieee802154_probe.cmd[g_ieee802154_probe.cmd_index].timestamp = esp_timer_get_time(); \
g_ieee802154_probe.cmd[g_ieee802154_probe.cmd_index++].cmd = a; \
g_ieee802154_probe.cmd_index = \
(g_ieee802154_probe.cmd_index == IEEE802154_ASSERT_RECORD_CMD_SIZE) ? 0 : g_ieee802154_probe.cmd_index; \
} while(0)
/**
*/
typedef struct {
char line_str[5]; /*!< record which line in esp_ieee802154_dev.c set the command */
ieee802154_ll_cmd_t cmd; /*!< record current command */
uint64_t timestamp; /*! | 32 |
< record timestamp */
} ieee802154_cmd_info_t;
#else
#define ieee802154_set_cmd(cmd) ieee802154_ll_set_cmd(cmd)
#endif //CONFIG_IEEE802154_RECORD_CMD
#if CONFIG_IEEE802154_RECORD_ABORT
#define IEEE802154_ASSERT_RECORD_ABORT_SIZE CONFIG_IEEE802154_RECORD_ABORT_SIZE
#define ieee802154_record_abort(a) do { \
if (a == IEEE802154_EVENT_RX_ABORT) { \
g_ieee802154_probe.abort[g_ieee802154_probe.abort_index].abort_reason.rx \
= ieee802154_ll_get_rx_abort_reason(); \
g_ieee802154_probe.abort[g_ieee802154_probe.abort_index].is_tx_abort = 0; \
g_ieee802154_probe.abort[g_ieee802154_probe.abort_index++].timestamp = esp_timer_get_time(); \
g_ieee802154_probe.abort_index = (g_ieee802154_probe.abort_index == IEEE802154_ASSERT_RECORD_ABORT_SIZE) ? \
0 : g_ieee802154_probe.abort_index; \
} else if (a == IEEE802154_EVENT_TX_ABORT) { \
g_ieee802154_probe.abort[g_ieee802154_probe. | 32 |
abort_index].abort_reason.tx \
= ieee802154_ll_get_tx_abort_reason();\
g_ieee802154_probe.abort[g_ieee802154_probe.abort_index].is_tx_abort = 1; \
g_ieee802154_probe.abort[g_ieee802154_probe.abort_index++].timestamp = esp_timer_get_time(); \
g_ieee802154_probe.abort_index = (g_ieee802154_probe.abort_index == IEEE802154_ASSERT_RECORD_ABORT_SIZE) ? \
0 : g_ieee802154_probe.abort_index; \
} \
} while(0)
/**
*/
typedef struct {
bool is_tx_abort; /*!< record current abort type */
union {
ieee802154_ll_rx_abort_reason_t rx;
ieee802154_ll_tx_abort_reason_t tx;
} abort_reason; /*!< record current radio abort reason */
uint64_t timestamp; /*!< record timestamp*/
} ieee802154_abort_info_t;
#else
#define ieee802154_record_abort(a)
#endif // CONFIG_IEEE802154_RECORD_ABORT
/**
*/
typedef struct {
#if CONFIG_IEEE802154_RECORD_EVENT
ieee802154_event_info_t event[IEEE802154_ASSERT_RECORD_EVENT_SIZE]; /*! | 32 |
< record radio event */
uint8_t event_index; /*!< the index of event */
#endif // CONFIG_IEEE802154_RECORD_EVENT
#if CONFIG_IEEE802154_RECORD_STATE
ieee802154_state_info_t state[IEEE802154_ASSERT_RECORD_STATE_SIZE]; /*!< record radio state */
uint8_t state_index; /*!< the index of state */
#endif // CONFIG_IEEE802154_RECORD_STATE
#if CONFIG_IEEE802154_RECORD_CMD
ieee802154_cmd_info_t cmd[IEEE802154_ASSERT_RECORD_CMD_SIZE]; /*!< record radio command */
uint8_t cmd_index; /*!< the index of command */
#endif // CONFIG_IEEE802154_RECORD_CMD
#if CONFIG_IEEE802154_RECORD_ABORT
ieee802154_abort_info_t abort[IEEE802154_ASSERT_RECORD_ABORT_SIZE]; /*!< record radio abort */
uint8_t abort_index; /*!< the index of abort */
#endif // CONFIG_IEEE802154_RECORD_ABORT
} ieee802154_probe_info_t;
extern ieee802154_probe_info_t g_ieee802154_probe;
#if CONFIG_IEEE802154_ASSERT
/**
void ieee802154_assert_print(void);
#define IEEE802154_ASSERT(a) do { \
if(! | 32 |
(a)) { \
ieee802154_assert_print(); \
assert(a); \
} \
} while (0)
#else // CONFIG_IEEE802154_ASSERT
#define IEEE802154_ASSERT(a) assert(a)
#endif // CONFIG_IEEE802154_ASSERT
#if CONFIG_IEEE802154_TXRX_STATISTIC
typedef struct ieee802154_txrx_statistic{
struct {
uint64_t nums;
uint64_t deferred_nums;
uint64_t done_nums;
struct {
uint64_t rx_ack_coex_break_nums; // IEEE802154_RX_ACK_ABORT_COEX_CNT_REG
uint64_t rx_ack_timeout_nums; // IEEE802154_RX_ACK_TIMEOUT_CNT_REG
uint64_t tx_coex_break_nums; // IEEE802154_TX_BREAK_COEX_CNT_REG
uint64_t tx_security_error_nums; // IEEE802154_TX_SECURITY_ERROR_CNT_REG
uint64_t cca_failed_nums; // IEEE802154_CCA_FAIL_CNT_REG
uint64_t cca_busy_nums; // IEEE802154_CCA_BUSY_CNT_REG
} abort;
} tx;
struct {
uint64_t done_nums;
struct {
uint64_t sfd_timeout_nums; // IEEE802154_SFD_TIMEOUT_CNT_REG
uint64_t crc_error_nums; // IEEE802154_CRC_ERROR_CNT_REG
uint64_t filter_fail_nums; // IEEE802154_RX_FILTER_FAIL_CNT_REG
uint64_t no_rss_nums; // IEEE802154_NO_RSS_DETECT_CNT_REG
uint64_t rx_coex_break_nums; // IEEE802154_RX_ABORT_COEX_CNT_REG
uint64_t rx_restart_nums; // IEEE802154_RX_RESTART_CNT_REG
uint64_t tx_ack_coex_break_nums; // IEEE802154_TX_ACK_ABORT_COEX_CNT_REG
uint64_t ed_abort_nums; // IEEE802154_ED_ABORT_CNT_REG
} abort;
} rx;
} ieee802154_txrx_statistic_t;
#define IEEE802154_TXRX_STATISTIC_CLEAR() do { \
ieee802154_txrx_statistic_clear();\
} while(0)
#define IEEE802154_TXRX_STATISTIC(a) do { \
ieee802154_txrx_statistic(a);\
} while(0)
#define IEEE802154_TX_DEFERRED_NUMS_UPDATE() do { \
ieee802154_tx_deferred_nums_update();\
} while(0)
#define IEEE802154_TX_NUMS_UPDATE() do { \
ieee802154_tx_nums_update();\
} while(0)
#define IEEE802154_TX_BREAK_COEX_NUMS_UPDATE() do { \
ieee802154_tx_break_coex_nums_update();\
} while(0)
void ieee802154_txrx_statistic_clear(void);
void ieee802154_txrx_statistic_print(void);
void ieee802154_txrx_statistic(ieee802154_ll_events events);
void ieee802154_tx_nums_update(void);
void ieee802154_tx_deferred_nums_update(void);
void ieee802154_tx_break_coex_nums_update(void);
#else
#define IEEE802154_TXRX_STATISTIC(a)
#define IEEE802154_TX_NUMS_UPDATE()
#define IEEE802154_TX_DEFERRED_NUMS_UPDATE()
#define IEEE802154_TXRX_STATISTIC_CLEAR()
#define IEEE802154_TX_BREAK_COEX_NUMS_UPDATE()
#endif // CONFIG_IEEE802154_TXRX_STATISTIC
// TODO: replace etm code using common interface
#define IEEE802154_ETM_CHANNEL0 0
#define IEEE802154_ETM_CHANNEL1 1
/**
*/
typedef enum {
IEEE802154_SCENE_IDLE, /*! | 32 |
< IEEE802154 radio coexistence scene IDLE */
IEEE802154_SCENE_TX, /*!< IEEE802154 radio coexistence scene TX */
IEEE802154_SCENE_RX, /*!< IEEE802154 radio coexistence scene RX */
IEEE802154_SCENE_TX_AT, /*!< IEEE802154 radio coexistence scene TX AT */
IEEE802154_SCENE_RX_AT, /*!< IEEE802154 radio coexistence scene RX AT */
} ieee802154_txrx_scene_t;
#if !CONFIG_IEEE802154_TEST && CONFIG_ESP_COEX_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
/**
void ieee802154_set_txrx_pti(ieee802154_txrx_scene_t txrx_scene);
#define IEEE802154_SET_TXRX_PTI(txrx_scene) ieee802154_set_txrx_pti(txrx_scene)
#else
#define IEEE802154_SET_TXRX_PTI(txrx_scene)
#endif // !CONFIG_IEEE802154_TEST && CONFIG_ESP_COEX_SW_COEXIST_ENABLE || CONFIG_EXTERNAL_COEX_ENABLE
/**
uint8_t ieee802154_freq_to_channel(uint8_t freq);
/**
uint8_t ieee802154_channel_to_freq(uint8_t channel);
// TZ-97: implement these two functions using ETM common interface
/**
void ieee802154_etm_set_event_task(uint32_t channel, uint32_t event, uint32_t task);
/**
void ieee802154_etm_channel_clear(uint32_t channel);
#ifdef __cplusplus
}
#endif
| 32 |
/*
*/
#pragma once
#include
#define IEEE802154_SECURITY_ADDR_SIZE 8
#define IEEE802154_SECURITY_KEY_SIZE 16
#ifdef __cplusplus
extern "C" {
#endif
/**
void ieee802154_transmit_security_config(uint8_t *frame, uint8_t *key, uint8_t *addr);
/**
*/
void ieee802154_sec_update(void);
#ifdef __cplusplus
}
#endif
| 33 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include "esp_log.h"
#include "esp_err.h"
/**
void ieee802154_timer0_start(void);
/**
void ieee802154_timer0_stop(void);
/**
esp_err_t ieee802154_timer0_set_threshold(uint32_t value);
/**
uint32_t ieee802154_timer0_get_value(void);
/**
void ieee802154_timer1_start(void);
/**
void ieee802154_timer1_stop(void);
/**
esp_err_t ieee802154_timer1_set_threshold(uint32_t value);
/**
uint32_t ieee802154_timer1_get_value(void);
#ifdef __cplusplus
}
#endif
| 34 |
/*
*/
#pragma once
#include
#include
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
#define IEEE802154_FRAME_INVALID_OFFSET 0xff
#define IEEE802154_FRAME_INVALID_ADDR_MODE 0xff
#define IEEE802154_FRAME_TYPE_OFFSET 1
#define IEEE802154_FRAME_TYPE_MASK 0x07
#define IEEE802154_FRAME_TYPE_BEACON 0x00
#define IEEE802154_FRAME_TYPE_DATA 0x01
#define IEEE802154_FRAME_TYPE_ACK 0x02
#define IEEE802154_FRAME_TYPE_COMMAND 0x03
#define IEEE802154_FRAME_TYPE_MULTIPURPOSE 0x05
#define IEEE802154_FRAME_TYPE_FRAGMENT 0x06
#define IEEE802154_FRAME_TYPE_EXTENDED 0x07
#define IEEE802154_FRAME_SECURITY_OFFSET 1
#define IEEE802154_FRAME_SECURITY_BIT BIT(3)
#define IEEE802154_FRAME_SECURITY_MASK 0x07
#define IEEE802154_FRAME_SECURITY_MIC_32 0x01
#define IEEE802154_FRAME_SECURITY_MIC_64 0x02
#define IEEE802154_FRAME_SECURITY_MIC_128 0x03
#define IEEE802154_FRAME_SECURITY_ENC_MIC_32 0x05
#define IEEE802154_FRAME_SECURITY_ENC_MIC_64 0x06
#define IEEE802154_FRAME_SECURITY_ENC_MIC_128 0x07
#define IEEE802154_FRAME_SECURITY_MIC_32_SIZE 4
#define IEEE802154_FRAME_SECURITY_MIC_64_SIZE 8
#define IEEE802154_FRAME_SECURITY_MIC_128_SIZE 16
#define IEEE802154_FRAME_KEY_ID_MODE_MASK 0x18
#define IEEE802154_FRAME_KEY_ID_MODE_1 0x08
#define IEEE802154_FRAME_KEY_ID_MODE_2 0x10
#define IEEE802154_FRAME_KEY_ID_MODE_3 0x18
#define IEEE802154_FRAME_KEY_ID_MODE_1_SIZE 1
#define IEEE802154_FRAME_KEY_ID_MODE_2_SIZE 5
#define IEEE802154_FRAME_KEY_ID_MODE_3_SIZE 9
#define IEEE802154_FRAME_COUNTER_SUPPRESS_BIT 0x20
#define IEEE802154_FRAME_COUNTER_SIZE 4
#define IEEE802154_FRAME_AR_OFFSET 1
#define IEEE802154_FRAME_AR_BIT BIT(5)
#define IEEE802154_FRAME_PANID_COMP_OFFSET 1
#define IEEE802154_FRAME_PANID_COMP_BIT BIT(6)
#define IEEE802154_FRAME_VERSION_OFFSET 2
#define IEEE802154_FRAME_VERSION_MASK 0x30
#define IEEE802154_FRAME_VERSION_0 0x00 // IEEE 802. | 35 |
15.4 - 2003
#define IEEE802154_FRAME_VERSION_1 0x10 // IEEE 802.15.4 - 2006 & 2011
#define IEEE802154_FRAME_VERSION_2 0x20 // IEEE 802.15.4 - 2015
#define IEEE802154_FRAME_VERSION_R 0x30 // Reserved
#define IEEE802154_FRAME_DSN_OFFSET 2
#define IEEE802154_FRAME_DSN_BIT BIT(0)
#define IEEE802154_FRAME_IE_OFFSET 2
#define IEEE802154_FRAME_IE_BIT BIT(1)
#define IEEE802154_FRAME_IE_HEAD_ID_MASK 0x3f80
#define IEEE802154_IE_TYPE_HT2 0x3f80
#define IEEE802154_FRAME_IE_SUBFIELD_LEN_MASK 0x007f
#define IEEE802154_FRAME_IE_HEAD_LEN 2
#define IEEE802154_FRAME_DST_MODE_OFFSET 2
#define IEEE802154_FRAME_DST_MODE_MASK 0x0C
#define IEEE802154_FRAME_DST_MODE_NONE 0x00
#define IEEE802154_FRAME_DST_MODE_SHORT 0x08
#define IEEE802154_FRAME_DST_MODE_EXT 0x0C
#define IEEE802154_FRAME_SRC_MODE_OFFSET 2
#define IEEE802154_FRAME_SRC_MODE_MASK 0xC0
#define IEEE802154_FRAME_SRC_MODE_NONE 0x00
#define IEEE802154_FRAME_SRC_MODE_SHORT 0x80
#define IEEE802154_FRAME_SRC_MODE_EXT 0xC0
#define IEEE802154_CMD_INVALID 0x00
#define IEEE802154_CMD_DATA_REQ 0x04
#define IEEE802154_FRAME_PHR_SIZE 1
#define IEEE802154_FRAME_FCF_SIZE 2
#define IEEE802154_FRAME_FCS_SIZE 2
#define IEEE802154_FRAME_DSN_SIZE 1
#define IEEE802154_FRAME_PANID_SIZE 2
#define IEEE802154_FRAME_SHORT_ADDR_SIZE 2
#define IEEE802154_FRAME_EXT_ADDR_SIZE 8
#define IEEE802154_FRAME_SE_HEAD_SIZE 1
#define IEEE802154_FRAME_COMMAND_ID_LEN 1
/**
uint8_t ieee802154_frame_get_type(const uint8_t *frame);
/**
uint8_t ieee802154_frame_get_version(const uint8_t *frame);
/**
bool ieee802154_frame_is_ack_required(const uint8_t *frame);
/**
uint8_t ieee802154_frame_get_dst_addr(const uint8_t *frame, uint8_t *addr);
/**
uint8_t ieee802154_frame_get_src_addr(const uint8_t *frame, uint8_t *addr);
/**
uint8_t ieee802154_frame_get_security_payload_offset(uint8_t *frame);
/**
esp_err_t ieee802154_frame_get_dest_panid(const uint8_t *frame, uint8_t *panid);
/**
esp_err_t ieee802154_frame_get_src_panid(const uint8_t *frame, uint8_t *panid);
#ifdef __cplusplus
}
#endif
| 35 |
/*
*/
#pragma once
#include
#include
#include "sdkconfig.h"
#include "esp_err.h"
#include "esp_ieee802154_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
esp_err_t esp_ieee802154_enable(void);
/**
*/
esp_err_t esp_ieee802154_disable(void);
/**
uint8_t esp_ieee802154_get_channel(void);
/**
*/
esp_err_t esp_ieee802154_set_channel(uint8_t channel);
/**
int8_t esp_ieee802154_get_txpower(void);
/**
*/
esp_err_t esp_ieee802154_set_txpower(int8_t power);
/**
bool esp_ieee802154_get_promiscuous(void);
/**
*/
esp_err_t esp_ieee802154_set_promiscuous(bool enable);
/**
esp_ieee802154_state_t esp_ieee802154_get_state(void);
/**
esp_err_t esp_ieee802154_sleep(void);
/**
esp_err_t esp_ieee802154_receive(void);
/**
esp_err_t esp_ieee802154_transmit(const uint8_t *frame, bool cca);
/**
*/
esp_err_t esp_ieee802154_set_ack_timeout(uint32_t timeout);
/**
uint16_t esp_ieee802154_get_panid(void);
/**
*/
esp_err_t esp_ieee802154_set_panid(uint16_t panid);
/**
uint16_t esp_ieee802154_get_short_address(void);
/**
*/
esp_err_t esp_ieee802154_set_short_address(uint16_t short_address);
/**
*/
esp_err_t esp_ieee802154_get_extended_address(uint8_t *ext_addr);
/**
*/
esp_err_t esp_ieee802154_set_extended_address(const uint8_t *ext_addr);
/**
uint16_t esp_ieee802154_get_multipan_panid(esp_ieee802154_multipan_index_t index);
/**
*/
esp_err_t esp_ieee802154_set_multipan_panid(esp_ieee802154_multipan_index_t index, uint16_t panid);
/**
uint16_t esp_ieee802154_get_multipan_short_address(esp_ieee802154_multipan_index_t index);
/**
*/
esp_err_t esp_ieee802154_set_multipan_short_address(esp_ieee802154_multipan_index_t index, uint16_t short_address);
/**
*/
esp_err_t esp_ieee802154_get_multipan_extended_address(esp_ieee802154_multipan_index_t index, uint8_t *ext_addr);
/**
*/
esp_err_t esp_ieee802154_set_multipan_extended_address(esp_ieee802154_multipan_index_t index, const uint8_t *ext_addr);
/**
uint8_t esp_ieee802154_get_multipan_enable(void);
/**
*/
esp_err_t esp_ieee802154_set_multipan_enable(uint8_t mask);
/**
bool esp_ieee802154_get_coordinator(void);
/**
*/
esp_err_t esp_ieee802154_set_coordinator(bool enable);
/**
esp_ieee802154_pending_mode_t esp_ieee802154_get_pending_mode(void);
/**
*/
esp_err_t esp_ieee802154_set_pending_mode(esp_ieee802154_pending_mode_t pending_mode);
/**
esp_err_t esp_ieee802154_add_pending_addr(const uint8_t *addr, bool is_short);
/**
esp_err_t esp_ieee802154_clear_pending_addr(const uint8_t *addr, bool is_short);
/**
*/
esp_err_t esp_ieee802154_reset_pending_table(bool is_short);
/**
int8_t esp_ieee802154_get_cca_threshold(void);
/**
*/
esp_err_t esp_ieee802154_set_cca_threshold(int8_t cca_threshold);
/**
esp_ieee802154_cca_mode_t esp_ieee802154_get_cca_mode(void);
/**
*/
esp_err_t esp_ieee802154_set_cca_mode(esp_ieee802154_cca_mode_t cca_mode);
/**
*/
esp_err_t esp_ieee802154_set_rx_when_idle(bool enable);
/**
bool esp_ieee802154_get_rx_when_idle(void);
/**
esp_err_t esp_ieee802154_energy_detect(uint32_t duration);
/**
esp_err_t esp_ieee802154_receive_handle_done(const uint8_t *frame);
/** Below are the events generated by IEEE 802. | 36 |
15.4 subsystem, which are in ISR context **/
/**
extern void esp_ieee802154_receive_done(uint8_t *frame, esp_ieee802154_frame_info_t *frame_info);
/**
extern void esp_ieee802154_receive_sfd_done(void);
/**
extern void esp_ieee802154_transmit_done(const uint8_t *frame, const uint8_t *ack, esp_ieee802154_frame_info_t *ack_frame_info);
/**
extern void esp_ieee802154_transmit_failed(const uint8_t *frame, esp_ieee802154_tx_error_t error);
/**
extern void esp_ieee802154_transmit_sfd_done(uint8_t *frame);
/**
extern void esp_ieee802154_energy_detect_done(int8_t power);
/**
esp_err_t esp_ieee802154_receive_at(uint32_t time);
/**
esp_err_t esp_ieee802154_transmit_at(const uint8_t *frame, bool cca, uint32_t time);
/**
int8_t esp_ieee802154_get_recent_rssi(void);
/**
uint8_t esp_ieee802154_get_recent_lqi(void);
/**
*/
esp_err_t esp_ieee802154_set_transmit_security(uint8_t *frame, uint8_t *key, uint8_t *addr);
/**
esp_err_t esp_ieee802154_enh_ack_generator(uint8_t *frame, esp_ieee802154_frame_info_t *frame_info, uint8_t* enhack_frame);
/**
*/
#if CONFIG_IEEE802154_TXRX_STATISTIC
/**
void esp_ieee802154_txrx_statistic_clear(void);
/**
void esp_ieee802154_txrx_statistic_print(void);
#endif // CONFIG_IEEE802154_TXRX_STATISTIC
#ifdef __cplusplus
}
#endif
| 36 |
/*
*/
#pragma once
#include
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
typedef enum {
ESP_IEEE802154_RADIO_DISABLE, /*!< Radio not up */
ESP_IEEE802154_RADIO_IDLE, /*!< Radio in the idle state */
ESP_IEEE802154_RADIO_SLEEP, /*!< Radio in the sleep state */
ESP_IEEE802154_RADIO_RECEIVE, /*!< Radio in the receive state */
ESP_IEEE802154_RADIO_TRANSMIT, /*!< Radio in the transmit state */
} esp_ieee802154_state_t;
/**
*/
typedef enum {
ESP_IEEE802154_TX_ERR_NONE, /*!< No transmit error */
ESP_IEEE802154_TX_ERR_CCA_BUSY, /*!< Channel is busy */
ESP_IEEE802154_TX_ERR_ABORT, /*!< Transmit abort */
ESP_IEEE802154_TX_ERR_NO_ACK, /*!< No Ack frame received until timeout */
ESP_IEEE802154_TX_ERR_INVALID_ACK, /*!< Invalid Ack frame */
ESP_IEEE802154_TX_ERR_COEXIST, /*!< Rejected by coexist system */
ESP_IEEE802154_TX_ERR_SECURITY, /*!< Invalid security configuration */
} esp_ieee802154_tx_error_t;
/**
*/
typedef enum {
ESP_IEEE802154_CCA_MODE_CARRIER, /*! | 37 |
< Carrier only */
ESP_IEEE802154_CCA_MODE_ED, /*!< Energy Detect only */
ESP_IEEE802154_CCA_MODE_CARRIER_OR_ED, /*!< Carrier or Energy Detect */
ESP_IEEE802154_CCA_MODE_CARRIER_AND_ED, /*!< Carrier and Energy Detect */
} esp_ieee802154_cca_mode_t;
/**
*/
typedef enum {
ESP_IEEE802154_AUTO_PENDING_DISABLE, /*!< Frame pending bit always set to 1 in the ack to Data Request */
ESP_IEEE802154_AUTO_PENDING_ENABLE, /*!< Frame pending bit set to 1 if src address matches, in the ack to Data Request */
ESP_IEEE802154_AUTO_PENDING_ENHANCED, /*!< Frame pending bit set to 1 if src address matches, in all ack frames */
ESP_IEEE802154_AUTO_PENDING_ZIGBEE, /*!< Frame pending bit set to 0 only if src address is short address and matches in table, in the ack to Data Request */
} esp_ieee802154_pending_mode_t;
/**
*/
typedef enum {
ESP_IEEE802154_MULTIPAN_0 = 0,
ESP_IEEE802154_MULTIPAN_1 = 1,
ESP_IEEE802154_MULTIPAN_2 = 2,
ESP_IEEE802154_MULTIPAN_3 = 3,
ESP_IEEE802154_MULTIPAN_MAX
} esp_ieee802154_multipan_index_t;
/**
typedef struct {
bool pending; /*! | 37 |
< The frame was acked with frame pending set */
bool process; /*!< The frame needs to be processed by the upper layer */
uint8_t channel; /*!< Channel */
int8_t rssi; /*!< RSSI */
uint8_t lqi; /*!< LQI */
uint64_t timestamp; /*!< The timestamp when the frame's SFD field was received */
} esp_ieee802154_frame_info_t;
#ifdef __cplusplus
}
#endif
| 37 |
/*
*/
#pragma once
#include
#include
// This file gets included from unity.h via unity_internals.h via unity_config.h
// It is inside #ifdef __cplusplus / extern "C" block, so we can
// only use C features here
// Define helpers to register test cases from multiple files
#define UNITY_EXPAND2(a, b) a ## b
#define UNITY_EXPAND(a, b) UNITY_EXPAND2(a, b)
#define UNITY_TEST_UID(what) UNITY_EXPAND(what, __LINE__)
#define UNITY_TEST_REG_HELPER reg_helper ## UNITY_TEST_UID
#define UNITY_TEST_DESC_UID desc ## UNITY_TEST_UID
// get count of __VA_ARGS__
#define PP_NARG(...) \
PP_NARG_(__VA_ARGS__,PP_RSEQ_N())
#define PP_NARG_(...) \
PP_ARG_N(__VA_ARGS__)
#define PP_ARG_N( \
_1, _2, _3, _4, _5, _6, _7, _8, _9, N, ...) N
#define PP_RSEQ_N() 9,8,7,6,5,4,3,2,1,0
// support max 5 test func now
#define FN_NAME_SET_1(a) {#a}
#define FN_NAME_SET_2(a, b) {#a, #b}
#define FN_NAME_SET_3(a, b, c) {#a, #b, #c}
#define FN_NAME_SET_4(a, b, c, d) {#a, #b, #c, #d}
#define FN_NAME_SET_5(a, b, c, d, e) {#a, #b, #c, #d, #e}
#define FN_NAME_SET2(n) FN_NAME_SET_##n
#define FN_NAME_SET(n, . | 38 |
..) FN_NAME_SET2(n)(__VA_ARGS__)
#define UNITY_TEST_FN_SET(...) \
static test_func UNITY_TEST_UID(test_functions)[] = {__VA_ARGS__}; \
static const char* UNITY_TEST_UID(test_fn_name)[] = FN_NAME_SET(PP_NARG(__VA_ARGS__), __VA_ARGS__)
typedef void (* test_func)(void);
typedef struct test_desc_t
{
const char* name;
const char* desc;
test_func* fn;
const char* file;
int line;
uint8_t test_fn_count;
const char ** test_fn_name;
struct test_desc_t* next;
} test_desc_t;
void unity_testcase_register(test_desc_t* desc);
/* Test case macro, a-la CATCH framework.
First argument is a free-form description,
second argument is (by convention) a list of identifiers, each one in square brackets.
Identifiers are used to group related tests, or tests with specific properties.
Use like:
TEST_CASE("Frobnicator forbnicates", "[frobnicator][rom]")
{
// test goes here
}
*/
#define TEST_CASE(name_, desc_) \
static void UNITY_TEST_UID(test_func_) (void); \
static void __attribute__((constructor)) UNITY_TEST_UID(test_reg_helper_) (void) \
{ \
static test_func test_fn_[] = {&UNITY_TEST_UID(test_func_)}; \
static test_desc_t UNITY_TEST_UID(test_desc_) = { \
. | 38 |
name = name_, \
.desc = desc_, \
.fn = test_fn_, \
.file = __FILE__, \
.line = __LINE__, \
.test_fn_count = 1, \
.test_fn_name = NULL, \
.next = NULL \
}; \
unity_testcase_register( & UNITY_TEST_UID(test_desc_) ); \
}\
static void UNITY_TEST_UID(test_func_) (void)
/*
#define TEST_CASE_MULTIPLE_STAGES(name_, desc_, ...) \
UNITY_TEST_FN_SET(__VA_ARGS__); \
static void __attribute__((constructor)) UNITY_TEST_UID(test_reg_helper_) (void) \
{ \
static test_desc_t UNITY_TEST_UID(test_desc_) = { \
.name = name_, \
.desc = desc_"[multi_stage]", \
.fn = UNITY_TEST_UID(test_functions), \
.file = __FILE__, \
.line = __LINE__, \
.test_fn_count = PP_NARG(__VA_ARGS__), \
.test_fn_name = UNITY_TEST_UID(test_fn_name), \
.next = NULL \
}; \
unity_testcase_register( & UNITY_TEST_UID(test_desc_) ); \
}
/*
#define TEST_CASE_MULTIPLE_DEVICES(name_, desc_, . | 38 |
..) \
UNITY_TEST_FN_SET(__VA_ARGS__); \
static void __attribute__((constructor)) UNITY_TEST_UID(test_reg_helper_) (void) \
{ \
static test_desc_t UNITY_TEST_UID(test_desc_) = { \
.name = name_, \
.desc = desc_"[multi_device]", \
.fn = UNITY_TEST_UID(test_functions), \
.file = __FILE__, \
.line = __LINE__, \
.test_fn_count = PP_NARG(__VA_ARGS__), \
.test_fn_name = UNITY_TEST_UID(test_fn_name), \
.next = NULL \
}; \
unity_testcase_register( & UNITY_TEST_UID(test_desc_) ); \
}
/**
*/
void unity_run_test_by_name(const char *name);
void unity_run_test_by_index(int test_index);
void unity_run_tests_by_tag(const char *tag, bool invert);
void unity_run_all_tests(void);
void unity_run_menu(void);
int unity_get_test_count(void);
bool unity_get_test_info(int test_index, test_desc_t* out_info);
#include "sdkconfig.h" //to get IDF_TARGET_xxx
#define CONFIG_IDF_TARGET_NA 0
/*
#define TEMPORARY_DISABLED_FOR_TARGETS(. | 38 |
..) (_UNITY_DFT_10(__VA_ARGS__, NA, NA, NA, NA, NA, NA, NA, NA, NA))
/*
*/
#define DISABLED_FOR_TARGETS(...) TEMPORARY_DISABLED_FOR_TARGETS(__VA_ARGS__)
#define _UNITY_DFT_10(TARGET, ...) (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_9(__VA_ARGS__))
#define _UNITY_DFT_9(TARGET, ...) (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_8(__VA_ARGS__))
#define _UNITY_DFT_8(TARGET, ...) (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_7(__VA_ARGS__))
#define _UNITY_DFT_7(TARGET, ...) (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_6(__VA_ARGS__))
#define _UNITY_DFT_6(TARGET, ...) (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_5(__VA_ARGS__))
#define _UNITY_DFT_5(TARGET, ...) (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_4(__VA_ARGS__))
#define _UNITY_DFT_4(TARGET, ...) (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_3(__VA_ARGS__))
#define _UNITY_DFT_3(TARGET, ...) (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_2(__VA_ARGS__))
#define _UNITY_DFT_2(TARGET, ...) (CONFIG_IDF_TARGET_##TARGET || _UNITY_DFT_1(__VA_ARGS__))
#define _UNITY_DFT_1(TARGET, . | 38 |
..) (CONFIG_IDF_TARGET_##TARGET)
| 38 |
/*
*/
#pragma once
#include
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "unity_test_utils_memory.h"
#include "unity_test_utils_cache.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void unity_utils_task_delete(TaskHandle_t thandle);
#ifdef __cplusplus
}
#endif
| 39 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void unity_utils_set_leak_level(size_t leak_level);
/**
*/
void unity_utils_record_free_mem(void);
/**
*/
void unity_utils_check_leak(unsigned int before_free,
unsigned int after_free,
const char *type,
unsigned int threshold);
/**
*/
void unity_utils_evaluate_leaks_direct(size_t threshold);
/**
*/
void unity_utils_evaluate_leaks(void);
/**
*/
void unity_utils_setup_heap_record(size_t num_heap_records);
#ifdef __cplusplus
}
#endif
| 40 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void unity_utils_run_cache_disable_stub(void (*post_cache_disable)(void *), void *user_ctx);
#ifdef __cplusplus
}
#endif
| 41 |
/*
*/
#ifndef UNITY_CONFIG_H
#define UNITY_CONFIG_H
// This file gets included from unity.h via unity_internals.h
// It is inside #ifdef __cplusplus / extern "C" block, so we can
// only use C features here
#include
#include
#include
#include "sdkconfig.h"
#ifdef CONFIG_UNITY_ENABLE_FLOAT
#define UNITY_INCLUDE_FLOAT
#else
#define UNITY_EXCLUDE_FLOAT
#endif //CONFIG_UNITY_ENABLE_FLOAT
#ifdef CONFIG_UNITY_ENABLE_DOUBLE
#define UNITY_INCLUDE_DOUBLE
#else
#define UNITY_EXCLUDE_DOUBLE
#endif //CONFIG_UNITY_ENABLE_DOUBLE
#ifdef CONFIG_UNITY_ENABLE_64BIT
#define UNITY_SUPPORT_64
#endif
#ifdef CONFIG_UNITY_ENABLE_COLOR
#define UNITY_OUTPUT_COLOR
#endif
#ifndef __cplusplus
#define UNITY_IS_NAN isnan
#define UNITY_IS_INF isinf
#else
#define UNITY_IS_NAN std::isnan
#define UNITY_IS_INF std::isinf
#endif
// Note, using __noreturn__ rather than noreturn
// https://github.com/espressif/esp-idf/issues/11339
#define UNITY_NORETURN __attribute__((__noreturn__))
#define UNITY_EXCLUDE_TIME_H
void unity_flush(void);
void unity_putc(int c);
void unity_gets(char* dst, size_t len);
void unity_exec_time_start(void);
void unity_exec_time_stop(void);
uint32_t unity_exec_time_get_ms(void);
#define UNITY_OUTPUT_CHAR(a) unity_putc(a)
#define UNITY_OUTPUT_FLUSH() unity_flush()
#define UNITY_EXEC_TIME_START() unity_exec_time_start()
#define UNITY_EXEC_TIME_STOP() unity_exec_time_stop()
#define UNITY_EXEC_TIME_MS() unity_exec_time_get_ms()
#ifdef CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER
#include "unity_test_runner. | 42 |
h"
#endif //CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER
#ifdef CONFIG_UNITY_ENABLE_FIXTURE
// Two separate "extras" options here:
// 1. Disable memory allocation wrappers in Unity Fixture
#define UNITY_FIXTURE_NO_EXTRAS
// 2. Add IDF-specific additions to Unity Fixture
#include "unity_fixture_extras.h"
#endif // CONFIG_UNITY_ENABLE_FIXTURE
// shorthand to check esp_err_t return code
#define TEST_ESP_OK(rc) TEST_ASSERT_EQUAL_HEX32(ESP_OK, rc)
#define TEST_ESP_ERR(err, rc) TEST_ASSERT_EQUAL_HEX32(err, rc)
#endif //UNITY_CONFIG_H
| 42 |
/*
*/
/* IDF-specific additions to "Unity Fixture".
*/
#pragma once
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
#if !defined(CONFIG_IDF_TARGET) || defined(CONFIG_IDF_TARGET_LINUX)
#define UNITY_MAYBE_EXIT(rc) do { exit(rc); } while(0)
#else
#define UNITY_MAYBE_EXIT(rc) do { (void) rc; } while(0)
#endif
/* A shorthand for running all tests called from one function "func_", from the app_main function.
*/
#define UNITY_MAIN_FUNC(func_) do { \
const char* argv[] = { "test", "-v" }; \
const int argc = sizeof(argv)/sizeof(argv[0]); \
int rc = UnityMain(argc, argv, func_); \
printf("\nTests finished, rc=%d\n", rc); \
UNITY_MAYBE_EXIT(rc); \
} while(0)
/* A shorthand for running one test group from the app_main function, when there is only
*/
#define UNITY_MAIN(group_) UNITY_MAIN_FUNC(TEST_ ## group_ ## _GROUP_RUNNER)
#ifdef __cplusplus
}
#endif
| 43 |
/*
*/
#include_next
#include "esp_debug_helpers.h"
/*
*/
/** Insert backtrace before longjmp (TEST_ABORT).
*/
#define longjmp(buf, val) do {esp_backtrace_print(100); longjmp(buf, val);} while(0)
| 44 |
/*
*/
#ifndef PHY_INIT_DATA_H
#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
#include "esp_phy_init.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
// constrain a value between 'low' and 'high', inclusive
#define LIMIT(val, low, high) ((val high) ? high : val)
#define PHY_INIT_MAGIC "PHYINIT"
// define the lowest tx power as LOWEST_PHY_TX_POWER
#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52)
#define PHY_TX_POWER_OFFSET 2
#define PHY_TX_POWER_NUM 14
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
#define PHY_CRC_ALGORITHM 1
#define PHY_COUNTRY_CODE_LEN 2
#define PHY_INIT_DATA_TYPE_OFFSET 126
#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
#endif
static const char __attribute__((section(".rodata"))) phy_init_magic_pre[] = PHY_INIT_MAGIC;
/**
*/
static const esp_phy_init_data_t phy_init_data= { {
0x00,
0x00,
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x44),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4a),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x46),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x46),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x42),
0x00,
0x00,
0x00,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0x74
} };
static const char __attribute__((section(". | 45 |
rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC;
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
/**
*/
typedef struct {
uint8_t control_info_checksum[4]; /*!< 4-byte control infomation checksum */
uint8_t multiple_bin_checksum[4]; /*!< 4-byte multiple bin checksum */
uint8_t check_algorithm; /*!< check algorithm */
uint8_t version; /*!< PHY init data bin version */
uint8_t number; /*!< PHY init data bin number */
uint8_t length[2]; /*!< Length of each PHY init data bin */
uint8_t reserved[19]; /*!< 19-byte reserved */
} __attribute__ ((packed)) phy_control_info_data_t;
/**
*/
typedef struct {
char cc[PHY_COUNTRY_CODE_LEN];
uint8_t type;
} phy_country_to_bin_type_t;
#endif
#ifdef __cplusplus
}
#endif
#endif /* PHY_INIT_DATA_H */
| 45 |
/*
*/
#ifndef PHY_INIT_DATA_H
#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
#include "esp_phy_init.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
// constrain a value between 'low' and 'high', inclusive
#define LIMIT(val, low, high) ((val high) ? high : val)
#define PHY_INIT_MAGIC "PHYINIT"
// define the lowest tx power as LOWEST_PHY_TX_POWER
#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52)
#define PHY_TX_POWER_OFFSET 2
#define PHY_TX_POWER_NUM 14
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
#define PHY_CRC_ALGORITHM 1
#define PHY_COUNTRY_CODE_LEN 2
#define PHY_INIT_DATA_TYPE_OFFSET 126
#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
#endif
static const char __attribute__((section(".rodata"))) phy_init_magic_pre[] = PHY_INIT_MAGIC;
/**
*/
static const esp_phy_init_data_t phy_init_data= { {
0x00,
0x00,
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x44),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4a),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x46),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x46),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x42),
0x00,
0x00,
0x00,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0x74
} };
static const char __attribute__((section(". | 46 |
rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC;
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
/**
*/
typedef struct {
uint8_t control_info_checksum[4]; /*!< 4-byte control infomation checksum */
uint8_t multiple_bin_checksum[4]; /*!< 4-byte multiple bin checksum */
uint8_t check_algorithm; /*!< check algorithm */
uint8_t version; /*!< PHY init data bin version */
uint8_t number; /*!< PHY init data bin number */
uint8_t length[2]; /*!< Length of each PHY init data bin */
uint8_t reserved[19]; /*!< 19-byte reserved */
} __attribute__ ((packed)) phy_control_info_data_t;
/**
*/
typedef struct {
char cc[PHY_COUNTRY_CODE_LEN];
uint8_t type;
} phy_country_to_bin_type_t;
#endif
#ifdef __cplusplus
}
#endif
#endif /* PHY_INIT_DATA_H */
| 46 |
/*
*/
#pragma once
#include
#include
#include "esp_err.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
/**
*/
typedef struct {
uint8_t params[128]; /*!< opaque PHY initialization parameters */
} esp_phy_init_data_t;
/**
*/
typedef enum {
PHY_MODEM_WIFI = 1, /*!< PHY modem WIFI */
PHY_MODEM_BT = 2, /*!< PHY modem BT */
PHY_MODEM_IEEE802154 = 4, /*!< PHY modem IEEE802154 */
} esp_phy_modem_t;
/**
*/
typedef struct {
uint8_t version[4]; /*!< PHY version */
uint8_t mac[6]; /*!< The MAC address of the station */
uint8_t opaque[1894]; /*!< calibration data */
} esp_phy_calibration_data_t;
/**
typedef enum {
PHY_RF_CAL_PARTIAL = 0x00000000, /*!< Do part of RF calibration. This should be used after power-on reset. */
PHY_RF_CAL_NONE = 0x00000001, /*!< Don't do any RF calibration. This mode is only suggested to be used after deep sleep reset. | 47 |
*/
PHY_RF_CAL_FULL = 0x00000002 /*!< Do full RF calibration. Produces best results, but also consumes a lot of time and current. Suggested to be used once. */
} esp_phy_calibration_mode_t;
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
/**
*/
typedef enum {
ESP_PHY_INIT_DATA_TYPE_DEFAULT = 0,
ESP_PHY_INIT_DATA_TYPE_SRRC,
ESP_PHY_INIT_DATA_TYPE_FCC,
ESP_PHY_INIT_DATA_TYPE_CE,
ESP_PHY_INIT_DATA_TYPE_NCC,
ESP_PHY_INIT_DATA_TYPE_KCC,
ESP_PHY_INIT_DATA_TYPE_MIC,
ESP_PHY_INIT_DATA_TYPE_IC,
ESP_PHY_INIT_DATA_TYPE_ACMA,
ESP_PHY_INIT_DATA_TYPE_ANATEL,
ESP_PHY_INIT_DATA_TYPE_ISED,
ESP_PHY_INIT_DATA_TYPE_WPC,
ESP_PHY_INIT_DATA_TYPE_OFCA,
ESP_PHY_INIT_DATA_TYPE_IFETEL,
ESP_PHY_INIT_DATA_TYPE_RCM,
ESP_PHY_INIT_DATA_TYPE_NUMBER,
} phy_init_data_type_t;
#endif
/**
*/
const esp_phy_init_data_t* esp_phy_get_init_data(void);
/**
*/
void esp_phy_release_init_data(const esp_phy_init_data_t* data);
/**
*/
esp_err_t esp_phy_load_cal_data_from_nvs(esp_phy_calibration_data_t* out_cal_data);
/**
*/
esp_err_t esp_phy_store_cal_data_to_nvs(const esp_phy_calibration_data_t* cal_data);
/**
*/
esp_err_t esp_phy_erase_cal_data_in_nvs(void);
/**
*/
void esp_phy_enable(esp_phy_modem_t modem);
/**
*/
void esp_phy_disable(esp_phy_modem_t modem);
/**
void esp_btbb_enable(void);
/**
void esp_btbb_disable(void);
/**
*/
void esp_phy_load_cal_and_init(void);
/**
*/
void esp_phy_modem_init(void);
/**
*/
void esp_phy_modem_deinit(void);
#if CONFIG_MAC_BB_PD
/**
*/
void esp_mac_bb_pd_mem_init(void);
/**
*/
void esp_mac_bb_pd_mem_deinit(void);
/**
*/
void esp_mac_bb_power_up(void);
/**
*/
void esp_mac_bb_power_down(void);
#endif
/**
void esp_phy_common_clock_enable(void);
/**
void esp_phy_common_clock_disable(void);
/**
*/
int64_t esp_phy_rf_get_on_ts(void);
/**
*/
esp_err_t esp_phy_update_country_info(const char *country);
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
/**
*/
esp_err_t esp_phy_apply_phy_init_data(uint8_t *init_data);
#endif
/**
*/
char * get_phy_version_str(void);
/**
*/
void phy_init_param_set(uint8_t param);
/**
*/
void phy_wifi_enable_set(uint8_t enable);
#ifdef __cplusplus
}
#endif
| 47 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include
#include
typedef enum {
//11b
PHY_RATE_1M = 0x0,
PHY_RATE_2M = 0x1,
PHY_RATE_5M5 = 0x2,
PHY_RATE_11M = 0x3,
//11g
PHY_RATE_6M = 0xb,
PHY_RATE_9M = 0xf,
PHY_RATE_12M = 0xa,
PHY_RATE_18M = 0xe,
PHY_RATE_24M = 0x9,
PHY_RATE_36M = 0xd,
PHY_RATE_48M = 0x8,
PHY_RATE_54M = 0xc,
//11n
PHY_RATE_MCS0 = 0x10,
PHY_RATE_MCS1 = 0x11,
PHY_RATE_MCS2 = 0x12,
PHY_RATE_MCS3 = 0x13,
PHY_RATE_MCS4 = 0x14,
PHY_RATE_MCS5 = 0x15,
PHY_RATE_MCS6 = 0x16,
PHY_RATE_MCS7 = 0x17,
PHY_WIFI_RATE_MAX
} esp_phy_wifi_rate_t;
typedef enum {
PHY_BLE_RATE_1M = 0,
PHY_BLE_RATE_2M,
PHY_BLE_RATE_125K,
PHY_BLE_RATE_500k,
PHY_BLE_RATE_MAX
} esp_phy_ble_rate_t;
typedef enum {
PHY_BLE_TYPE_1010 = 0,
PHY_BLE_TYPE_00001111 = 1,
PHY_BLE_TYPE_prbs9 = 2,
PHY_BLE_TYPE_00111100 = 4,
PHY_BLE_TYPE_MAX
} esp_phy_ble_type_t;
/**
*/
typedef struct {
uint32_t phy_rx_correct_count; /*! | 48 |
< The number of desired packets received */
int phy_rx_rssi; /*!< Average RSSI of desired packets */
uint32_t phy_rx_total_count; /*!< The number of total packets received */
uint32_t phy_rx_result_flag; /*!< 0 means no RX info; 1 means the lastest Wi-Fi RX info; 2 means the lastest BLE RX info. */
} esp_phy_rx_result_t;
/**
*/
void esp_wifi_power_domain_on(void);
/**
*/
void esp_wifi_power_domain_off(void);
/**
*/
void esp_phy_rftest_config(uint8_t conf);
/**
*/
void esp_phy_rftest_init(void);
/**
*/
void esp_phy_tx_contin_en(bool contin_en);
/**
**/
void esp_phy_cbw40m_en(bool en);
/**
*/
void esp_phy_wifi_tx(uint32_t chan, esp_phy_wifi_rate_t rate, int8_t backoff, uint32_t length_byte, uint32_t packet_delay, uint32_t packet_num);
/**
*/
void esp_phy_test_start_stop(uint8_t value);
/**
void esp_phy_wifi_rx(uint32_t chan, esp_phy_wifi_rate_t rate);
/**
void esp_phy_wifi_tx_tone(uint32_t start, uint32_t chan, uint32_t backoff);
/**
*/
void esp_phy_ble_tx(uint32_t txpwr, uint32_t chan, uint32_t len, esp_phy_ble_type_t data_type, uint32_t syncw, esp_phy_ble_rate_t rate, uint32_t tx_num_in);
/**
*/
void esp_phy_ble_rx(uint32_t chan, uint32_t syncw, esp_phy_ble_rate_t rate);
/**
*/
void esp_phy_bt_tx_tone(uint32_t start, uint32_t chan, uint32_t power);
/**
*/
void esp_phy_get_rx_result(esp_phy_rx_result_t *rx_result);
#ifdef __cplusplus
}
#endif
| 48 |
/*
*/
#pragma once
#include "esp_phy_init.h"
#ifdef __cplusplus
extern "C" {
#endif
#define ESP_CAL_DATA_CHECK_FAIL 1
typedef enum {
PHY_I2C_MST_CMD_TYPE_OFF = 0,
PHY_I2C_MST_CMD_TYPE_ON,
PHY_I2C_MST_CMD_TYPE_MAX
} phy_i2c_master_command_type_t;
typedef struct {
struct {
uint8_t start, end; /* the start and end index of phy i2c master command memory */
uint8_t host_id; /* phy i2c master host id */
} config[PHY_I2C_MST_CMD_TYPE_MAX];
} phy_i2c_master_command_attribute_t;
/**
*/
/**
*/
void phy_get_romfunc_addr(void);
/**
*/
int register_chipv7_phy(const esp_phy_init_data_t* init_data, esp_phy_calibration_data_t *cal_data, esp_phy_calibration_mode_t cal_mode);
/**
*/
uint32_t phy_get_rf_cal_version(void);
/**
*/
void phy_set_wifi_mode_only(bool wifi_only);
/**
*/
void coex_bt_high_prio(void);
/**
*/
void phy_wakeup_init(void);
/**
*/
void phy_close_rf(void);
#if !CONFIG_IDF_TARGET_ESP32
/**
*/
void phy_xpd_tsens(void);
#endif
#if CONFIG_IDF_TARGET_ESP32C3
/**
*/
void phy_init_flag(void);
#endif
#if CONFIG_IDF_TARGET_ESP32C6
/**
*/
void phy_i2c_master_mem_cfg(phy_i2c_master_command_attribute_t *attr);
#endif
/**
*/
uint8_t phy_dig_reg_backup(bool backup_en, uint32_t *mem_addr);
#if CONFIG_MAC_BB_PD
/**
*/
void phy_freq_mem_backup(bool backup_en, uint32_t *mem);
#endif
#if CONFIG_ESP_PHY_ENABLE_USB
/**
*/
void phy_bbpll_en_usb(bool en);
#endif
#if CONFIG_IDF_TARGET_ESP32S2
/**
*/
void phy_eco_version_sel(uint8_t chip_ver);
#endif
#if CONFIG_ESP_PHY_IMPROVE_RX_11B
/**
*/
void phy_improve_rx_special(bool enable);
#endif
/**
void phy_track_pll_init(void);
/**
void phy_track_pll_deinit(void);
/**
void phy_set_modem_flag(esp_phy_modem_t modem);
/**
*/
void phy_clr_modem_flag(esp_phy_modem_t modem);
/**
esp_phy_modem_t phy_get_modem_flag(void);
/**
_lock_t phy_get_lock(void);
/**
void phy_track_pll(void);
#ifdef __cplusplus
}
#endif
| 49 |
/*
*/
#pragma once
#include
#ifdef __cplusplus
extern "C" {
#endif
/**
*/
void bt_bb_v2_init_cmplx(int print_version);
#ifdef __cplusplus
}
#endif
| 50 |
/*
*/
#ifndef PHY_INIT_DATA_H
#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
#include "esp_phy_init.h"
#include "sdkconfig.h"
// constrain a value between 'low' and 'high', inclusive
#define LIMIT(val, low, high) ((val high) ? high : val)
#define PHY_INIT_MAGIC "PHYINIT"
// define the lowest tx power as LOWEST_PHY_TX_POWER
#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52)
#define PHY_TX_POWER_OFFSET 44
#define PHY_TX_POWER_NUM 5
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
#define PHY_CRC_ALGORITHM 1
#define PHY_COUNTRY_CODE_LEN 2
#define PHY_INIT_DATA_TYPE_OFFSET 126
#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
#endif
static const char phy_init_magic_pre[] = PHY_INIT_MAGIC;
/**
*/
static const esp_phy_init_data_t phy_init_data= { {
3,
3,
0x05,
0x09,
0x06,
0x05,
0x03,
0x06,
0x05,
0x04,
0x06,
0x04,
0x05,
0x00,
0x00,
0x00,
0x00,
0x05,
0x09,
0x06,
0x05,
0x03,
0x06,
0x05,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0x00,
0xfc,
0xfc,
0xfe,
0xf0,
0xf0,
0xf0,
0xe0,
0xe0,
0xe0,
0x18,
0x18,
0x18,
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 40, 78),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 40, 72),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 40, 66),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 40, 60),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 40, 56),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 40, 52),
0,
1,
1,
2,
2,
3,
4,
5,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
} };
static const char phy_init_magic_post[] = PHY_INIT_MAGIC;
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
/**
*/
typedef struct {
uint8_t control_info_checksum[4]; /*! | 51 |
< 4-byte control infomation checksum */
uint8_t multiple_bin_checksum[4]; /*!< 4-byte multiple bin checksum */
uint8_t check_algorithm; /*!< check algorithm */
uint8_t version; /*!< PHY init data bin version */
uint8_t number; /*!< PHY init data bin number */
uint8_t length[2]; /*!< Length of each PHY init data bin */
uint8_t reserved[19]; /*!< 19-byte reserved */
} __attribute__ ((packed)) phy_control_info_data_t;
/**
*/
typedef struct {
char cc[PHY_COUNTRY_CODE_LEN];
uint8_t type;
} phy_country_to_bin_type_t;
#endif
#endif /* PHY_INIT_DATA_H */
| 51 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
// btbb sleep retention reg
#define BB_PART_0_SIZE 93
#define BB_PART_1_SIZE 62
#define BB_PART_2_SIZE 19
#define BB_PART_0_ADDR 0x600A2000
#define BB_PART_1_ADDR 0x600A2800
#define BB_PART_2_ADDR 0x600A2C00
#ifdef __cplusplus
}
#endif
| 52 |
/*
*/
#ifndef PHY_INIT_DATA_H
#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
#include "esp_phy_init.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
// constrain a value between 'low' and 'high', inclusive
#define LIMIT(val, low, high) ((val high) ? high : val)
#define PHY_INIT_MAGIC "PHYINIT"
// define the lowest tx power as LOWEST_PHY_TX_POWER
#define PHY_TX_POWER_LOWEST LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 52)
#define PHY_TX_POWER_OFFSET 2
#define PHY_TX_POWER_NUM 14
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
#define PHY_CRC_ALGORITHM 1
#define PHY_COUNTRY_CODE_LEN 2
#define PHY_INIT_DATA_TYPE_OFFSET 126
#define PHY_SUPPORT_MULTIPLE_BIN_OFFSET 125
#endif
static const char __attribute__((section(".rodata"))) phy_init_magic_pre[] = PHY_INIT_MAGIC;
/**
*/
static const esp_phy_init_data_t phy_init_data= { {
0x01,
0x00,
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x54),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x50),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x4c),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x48),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x44),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x3C),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x3C),
LIMIT(CONFIG_ESP_PHY_MAX_TX_POWER * 4, 0, 0x3C),
0x00,
0x00,
0x00,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0xff,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0x70
} };
static const char __attribute__((section(". | 53 |
rodata"))) phy_init_magic_post[] = PHY_INIT_MAGIC;
#if CONFIG_ESP_PHY_MULTIPLE_INIT_DATA_BIN
/**
*/
typedef struct {
uint8_t control_info_checksum[4]; /*!< 4-byte control infomation checksum */
uint8_t multiple_bin_checksum[4]; /*!< 4-byte multiple bin checksum */
uint8_t check_algorithm; /*!< check algorithm */
uint8_t version; /*!< PHY init data bin version */
uint8_t number; /*!< PHY init data bin number */
uint8_t length[2]; /*!< Length of each PHY init data bin */
uint8_t reserved[19]; /*!< 19-byte reserved */
} __attribute__ ((packed)) phy_control_info_data_t;
/**
*/
typedef struct {
char cc[PHY_COUNTRY_CODE_LEN];
uint8_t type;
} phy_country_to_bin_type_t;
#endif
#ifdef __cplusplus
}
#endif
#endif /* PHY_INIT_DATA_H */
| 53 |
/*
*/
#ifndef PHY_INIT_DATA_H
#define PHY_INIT_DATA_H /* don't use #pragma once here, we compile this file sometimes */
#include "esp_phy_init.h"
#include "sdkconfig.h"
#ifdef __cplusplus
extern "C" {
#endif
// There is no init data for H4 right now, could be added when necessary.
#ifdef __cplusplus
}
#endif
#endif /* PHY_INIT_DATA_H */
| 54 |
/*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
// btbb sleep retention reg
#define BB_PART_0_SIZE 93
#define BB_PART_1_SIZE 62
#define BB_PART_2_SIZE 19
#define BB_PART_0_ADDR 0x600A2000
#define BB_PART_1_ADDR 0x600A2800
#define BB_PART_2_ADDR 0x600A2C00
#ifdef __cplusplus
}
#endif
| 55 |
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